TimeQuest Timing Analyzer report for atari800core
Sun Oct  5 21:50:37 2014
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow 1200mV 85C Model Fmax Summary
  7. Timing Closure Recommendations
  8. Slow 1200mV 85C Model Setup Summary
  9. Slow 1200mV 85C Model Hold Summary
 10. Slow 1200mV 85C Model Recovery Summary
 11. Slow 1200mV 85C Model Removal Summary
 12. Slow 1200mV 85C Model Minimum Pulse Width Summary
 13. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 14. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 15. Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 16. Slow 1200mV 85C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 17. Slow 1200mV 85C Model Setup: 'altera_reserved_tck'
 18. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 19. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 20. Slow 1200mV 85C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 21. Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 22. Slow 1200mV 85C Model Hold: 'altera_reserved_tck'
 23. Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 24. Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 25. Slow 1200mV 85C Model Recovery: 'altera_reserved_tck'
 26. Slow 1200mV 85C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 27. Slow 1200mV 85C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 28. Slow 1200mV 85C Model Removal: 'altera_reserved_tck'
 29. Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 30. Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 31. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 32. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 33. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 34. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'
 35. Slow 1200mV 85C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 36. Slow 1200mV 85C Model Minimum Pulse Width: 'altera_reserved_tck'
 37. Slow 1200mV 85C Model Minimum Pulse Width: 'FPGA_CLK'
 38. Setup Times
 39. Hold Times
 40. Clock to Output Times
 41. Minimum Clock to Output Times
 42. Output Enable Times
 43. Minimum Output Enable Times
 44. Output Disable Times
 45. Minimum Output Disable Times
 46. Slow 1200mV 85C Model Metastability Report
 47. Slow 1200mV 0C Model Fmax Summary
 48. Slow 1200mV 0C Model Setup Summary
 49. Slow 1200mV 0C Model Hold Summary
 50. Slow 1200mV 0C Model Recovery Summary
 51. Slow 1200mV 0C Model Removal Summary
 52. Slow 1200mV 0C Model Minimum Pulse Width Summary
 53. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 54. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 55. Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 56. Slow 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 57. Slow 1200mV 0C Model Setup: 'altera_reserved_tck'
 58. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 59. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 60. Slow 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 61. Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 62. Slow 1200mV 0C Model Hold: 'altera_reserved_tck'
 63. Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 64. Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 65. Slow 1200mV 0C Model Recovery: 'altera_reserved_tck'
 66. Slow 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 67. Slow 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 68. Slow 1200mV 0C Model Removal: 'altera_reserved_tck'
 69. Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 70. Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 71. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 72. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 73. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 74. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'
 75. Slow 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 76. Slow 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'
 77. Slow 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'
 78. Setup Times
 79. Hold Times
 80. Clock to Output Times
 81. Minimum Clock to Output Times
 82. Output Enable Times
 83. Minimum Output Enable Times
 84. Output Disable Times
 85. Minimum Output Disable Times
 86. Slow 1200mV 0C Model Metastability Report
 87. Fast 1200mV 0C Model Setup Summary
 88. Fast 1200mV 0C Model Hold Summary
 89. Fast 1200mV 0C Model Recovery Summary
 90. Fast 1200mV 0C Model Removal Summary
 91. Fast 1200mV 0C Model Minimum Pulse Width Summary
 92. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 93. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
 94. Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 95. Fast 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
 96. Fast 1200mV 0C Model Setup: 'altera_reserved_tck'
 97. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
 98. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
 99. Fast 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
100. Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
101. Fast 1200mV 0C Model Hold: 'altera_reserved_tck'
102. Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
103. Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
104. Fast 1200mV 0C Model Recovery: 'altera_reserved_tck'
105. Fast 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
106. Fast 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
107. Fast 1200mV 0C Model Removal: 'altera_reserved_tck'
108. Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
109. Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
110. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'
111. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'
112. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'
113. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'
114. Fast 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'
115. Fast 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'
116. Fast 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'
117. Setup Times
118. Hold Times
119. Clock to Output Times
120. Minimum Clock to Output Times
121. Output Enable Times
122. Minimum Output Enable Times
123. Output Disable Times
124. Minimum Output Disable Times
125. Fast 1200mV 0C Model Metastability Report
126. Multicorner Timing Analysis Summary
127. Setup Times
128. Hold Times
129. Clock to Output Times
130. Minimum Clock to Output Times
131. Board Trace Model Assignments
132. Input Transition Times
133. Signal Integrity Metrics (Slow 1200mv 0c Model)
134. Signal Integrity Metrics (Slow 1200mv 85c Model)
135. Signal Integrity Metrics (Fast 1200mv 0c Model)
136. Setup Transfers
137. Hold Transfers
138. Recovery Transfers
139. Removal Transfers
140. Report TCCS
141. Report RSKM
142. Unconstrained Paths
143. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; atari800core                                                      ;
; Device Family      ; Cyclone IV E                                                      ;
; Device Name        ; EP4CE15E22C7                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Enabled                                                           ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.24        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;  23.7%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------+
; SDC File List                                        ;
+------------------+--------+--------------------------+
; SDC File Path    ; Status ; Read at                  ;
+------------------+--------+--------------------------+
; atari800core.sdc ; OK     ; Sun Oct  5 21:50:01 2014 ;
+------------------+--------+--------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                                                                                                                                                                                              ;
+-------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+------------------------------------------------------------------------------+---------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+
; Clock Name                                                                    ; Type      ; Period  ; Frequency  ; Rise  ; Fall    ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master                                                                       ; Source                                                                          ; Targets                                                                           ;
+-------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+------------------------------------------------------------------------------+---------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 11.747  ; 85.13 MHz  ; 0.000 ; 5.873   ; 50.00      ; 1         ; 3           ;       ;        ;           ;            ; false    ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] } ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 35.242  ; 28.38 MHz  ; 0.000 ; 17.621  ; 50.00      ; 1         ; 1           ;       ;        ;           ;            ; false    ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] } ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ; Generated ; 11.747  ; 85.13 MHz  ; 7.341 ; 13.214  ; 50.00      ; 1         ; 3           ; 225.0 ;        ;           ;            ; false    ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] } ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Generated ; 8.810   ; 113.51 MHz ; 0.000 ; 4.405   ; 50.00      ; 1         ; 4           ;       ;        ;           ;            ; false    ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] } ;
; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; Generated ; 35.242  ; 28.38 MHz  ; 0.000 ; 17.621  ; 50.00      ; 40        ; 227         ;       ;        ;           ;            ; false    ; FPGA_CLK                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]  ; { \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] }  ;
; altera_reserved_tck                                                           ; Base      ; 100.000 ; 10.0 MHz   ; 0.000 ; 50.000  ;            ;           ;             ;       ;        ;           ;            ;          ;                                                                              ;                                                                                 ; { altera_reserved_tck }                                                           ;
; FPGA_CLK                                                                      ; Base      ; 200.000 ; 5.0 MHz    ; 0.000 ; 100.000 ;            ;           ;             ;       ;        ;           ;            ;          ;                                                                              ;                                                                                 ; { FPGA_CLK }                                                                      ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; Generated ; 66.666  ; 15.0 MHz   ; 0.000 ; 33.333  ; 50.00      ; 1         ; 3           ;       ;        ;           ;            ; false    ; FPGA_CLK                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                          ; { mcc_pll3|altpll_component|auto_generated|pll1|clk[0] }                          ;
+-------------------------------------------------------------------------------+-----------+---------+------------+-------+---------+------------+-----------+-------------+-------+--------+-----------+------------+----------+------------------------------------------------------------------------------+---------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Fmax Summary                                                                                  ;
+------------+-----------------+-------------------------------------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                                                    ; Note ;
+------------+-----------------+-------------------------------------------------------------------------------+------+
; 50.83 MHz  ; 50.83 MHz       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 67.31 MHz  ; 67.31 MHz       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;      ;
; 106.36 MHz ; 106.36 MHz      ; altera_reserved_tck                                                           ;      ;
; 139.92 MHz ; 139.92 MHz      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;      ;
; 234.41 MHz ; 234.41 MHz      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;      ;
+------------+-----------------+-------------------------------------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


----------------------------------
; Timing Closure Recommendations ;
----------------------------------
HTML report is unavailable in plain text report export.


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup Summary                                                                    ;
+-------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                         ; Slack  ; End Point TNS ;
+-------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -9.105 ; -933.886      ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.424  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.544  ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 25.905 ; 0.000         ;
; altera_reserved_tck                                                           ; 45.299 ; 0.000         ;
+-------------------------------------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold Summary                                                                    ;
+-------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                         ; Slack ; End Point TNS ;
+-------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.340 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.353 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 0.388 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.413 ; 0.000         ;
; altera_reserved_tck                                                           ; 0.413 ; 0.000         ;
+-------------------------------------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery Summary                                                                 ;
+-------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                         ; Slack  ; End Point TNS ;
+-------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 5.680  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.052  ; 0.000         ;
; altera_reserved_tck                                                           ; 47.708 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 63.525 ; 0.000         ;
+-------------------------------------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal Summary                                                                 ;
+-------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                         ; Slack ; End Point TNS ;
+-------------------------------------------------------------------------------+-------+---------------+
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 0.187 ; 0.000         ;
; altera_reserved_tck                                                           ; 1.245 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.478 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2.347 ; 0.000         ;
+-------------------------------------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width Summary                                                      ;
+-------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                         ; Slack  ; End Point TNS ;
+-------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.130  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.595  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.340 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; 17.594 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 33.013 ; 0.000         ;
; altera_reserved_tck                                                           ; 49.470 ; 0.000         ;
; FPGA_CLK                                                                      ; 99.796 ; 0.000         ;
+-------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                        ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                        ; To Node                                                                                                                 ; Launch Clock                                         ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; -9.105 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.341     ; 6.910      ;
; -8.872 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.987     ; 7.031      ;
; -8.829 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.957     ; 7.018      ;
; -8.753 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.930     ; 6.969      ;
; -8.702 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.890      ;
; -8.696 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.884      ;
; -8.613 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.367     ; 6.392      ;
; -8.590 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.931     ; 6.805      ;
; -8.543 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.731      ;
; -8.520 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.957     ; 6.709      ;
; -8.513 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.921     ; 6.738      ;
; -8.417 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.982     ; 6.581      ;
; -8.409 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.946     ; 6.609      ;
; -8.405 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.931     ; 6.620      ;
; -8.293 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.346     ; 6.093      ;
; -8.270 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[2]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.361     ; 6.055      ;
; -8.270 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.005     ; 6.411      ;
; -8.241 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.931     ; 6.456      ;
; -8.226 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.005     ; 6.367      ;
; -8.220 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.408      ;
; -8.179 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.948     ; 6.377      ;
; -8.144 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.948     ; 6.342      ;
; -8.140 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.363     ; 5.923      ;
; -8.091 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.985     ; 6.252      ;
; -8.067 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.361     ; 5.852      ;
; -8.051 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.946     ; 6.251      ;
; -8.049 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.946     ; 6.249      ;
; -8.033 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.363     ; 5.816      ;
; -8.024 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.212      ;
; -8.024 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.212      ;
; -8.022 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.210      ;
; -8.020 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[42] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.208      ;
; -7.998 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.930     ; 6.214      ;
; -7.995 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.930     ; 6.211      ;
; -7.985 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.946     ; 6.185      ;
; -7.938 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.930     ; 6.154      ;
; -7.921 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.359     ; 5.708      ;
; -7.916 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.975     ; 6.087      ;
; -7.915 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.985     ; 6.076      ;
; -7.901 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.930     ; 6.117      ;
; -7.893 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.367     ; 5.672      ;
; -7.881 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.975     ; 6.052      ;
; -7.877 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.359     ; 5.664      ;
; -7.853 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.041      ;
; -7.853 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.041      ;
; -7.852 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.040      ;
; -7.851 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.039      ;
; -7.850 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.038      ;
; -7.850 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.038      ;
; -7.832 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.020      ;
; -7.830 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 6.018      ;
; -7.789 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.957     ; 5.978      ;
; -7.750 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.964     ; 5.932      ;
; -7.706 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.964     ; 5.888      ;
; -7.705 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.369     ; 5.482      ;
; -7.698 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.949     ; 5.895      ;
; -7.687 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.359     ; 5.474      ;
; -7.674 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.938     ; 5.882      ;
; -7.672 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.949     ; 5.869      ;
; -7.670 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.369     ; 5.447      ;
; -7.663 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.949     ; 5.860      ;
; -7.659 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 5.847      ;
; -7.658 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[17] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.958     ; 5.846      ;
; -7.647 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.365     ; 5.428      ;
; -7.647 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.975     ; 5.818      ;
; -7.637 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.949     ; 5.834      ;
; -7.634 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.930     ; 5.850      ;
; -7.633 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.938     ; 5.841      ;
; -7.606 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.975     ; 5.777      ;
; -7.577 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.384     ; 5.339      ;
; -7.561 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.976     ; 5.731      ;
; -7.559 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.000     ; 5.705      ;
; -7.543 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.976     ; 5.713      ;
; -7.536 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.384     ; 5.298      ;
; -7.526 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.976     ; 5.696      ;
; -7.524 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.000     ; 5.670      ;
; -7.516 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.384     ; 5.278      ;
; -7.508 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.365     ; 5.289      ;
; -7.508 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.976     ; 5.678      ;
; -7.502 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.365     ; 5.283      ;
; -7.498 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.976     ; 5.668      ;
; -7.496 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.365     ; 5.277      ;
; -7.486 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.963     ; 5.669      ;
; -7.483 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.956     ; 5.673      ;
; -7.476 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.948     ; 5.674      ;
; -7.475 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.384     ; 5.237      ;
; -7.464 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.948     ; 5.662      ;
; -7.463 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.976     ; 5.633      ;
; -7.445 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.963     ; 5.628      ;
; -7.431 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.385     ; 5.192      ;
; -7.428 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.365     ; 5.209      ;
; -7.426 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.948     ; 5.624      ;
; -7.423 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.948     ; 5.621      ;
; -7.418 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.957     ; 5.607      ;
; -7.405 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.976     ; 5.575      ;
; -7.403 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.381     ; 5.168      ;
; -7.399 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[23]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.368     ; 5.177      ;
; -7.396 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.385     ; 5.157      ;
; -7.368 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.381     ; 5.133      ;
; -7.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.365     ; 5.144      ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                     ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                     ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.424 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 11.027     ;
; 0.458 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.192     ; 10.980     ;
; 0.538 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.178     ; 10.914     ;
; 0.560 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.192     ; 10.878     ;
; 0.563 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.876     ;
; 0.597 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.204     ; 10.829     ;
; 0.620 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 10.827     ;
; 0.643 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.192     ; 10.795     ;
; 0.645 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.178     ; 10.807     ;
; 0.655 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 10.796     ;
; 0.663 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 10.788     ;
; 0.697 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.190     ; 10.743     ;
; 0.699 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.204     ; 10.727     ;
; 0.730 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.176     ; 10.724     ;
; 0.744 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.695     ;
; 0.758 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.681     ;
; 0.759 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.195     ; 10.676     ;
; 0.761 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.190     ; 10.679     ;
; 0.763 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 10.688     ;
; 0.791 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.185     ; 10.654     ;
; 0.794 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.645     ;
; 0.802 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.204     ; 10.624     ;
; 0.804 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.190     ; 10.636     ;
; 0.812 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.627     ;
; 0.816 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.623     ;
; 0.820 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.619     ;
; 0.822 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.617     ;
; 0.825 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.194     ; 10.611     ;
; 0.856 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.583     ;
; 0.859 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.207     ; 10.564     ;
; 0.869 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.188     ; 10.573     ;
; 0.880 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.189     ; 10.561     ;
; 0.883 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.203     ; 10.544     ;
; 0.900 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.202     ; 10.528     ;
; 0.902 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.537     ;
; 0.906 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.174     ; 10.550     ;
; 0.910 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 10.541     ;
; 0.917 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.203     ; 10.510     ;
; 0.950 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 10.483     ;
; 0.951 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.203     ; 10.476     ;
; 0.955 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.203     ; 10.472     ;
; 0.961 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.207     ; 10.462     ;
; 0.968 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.203     ; 10.459     ;
; 1.004 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.200     ; 10.426     ;
; 1.006 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.433     ;
; 1.011 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.193     ; 10.426     ;
; 1.015 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.203     ; 10.412     ;
; 1.021 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.198     ; 10.411     ;
; 1.035 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[4]                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.207     ; 10.388     ;
; 1.040 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.204     ; 10.386     ;
; 1.049 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.390     ;
; 1.052 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.194     ; 10.384     ;
; 1.056 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.194     ; 10.380     ;
; 1.065 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 10.379     ;
; 1.073 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 10.378     ;
; 1.086 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.207     ; 10.337     ;
; 1.098 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.193     ; 10.339     ;
; 1.107 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.192     ; 10.331     ;
; 1.118 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.192     ; 10.320     ;
; 1.131 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.308     ;
; 1.142 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.204     ; 10.284     ;
; 1.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.206     ; 10.279     ;
; 1.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.205     ; 10.273     ;
; 1.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 10.298     ;
; 1.162 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.205     ; 10.263     ;
; 1.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.194     ; 10.272     ;
; 1.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.176     ; 10.281     ;
; 1.196 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 10.255     ;
; 1.201 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.190     ; 10.239     ;
; 1.202 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.195     ; 10.233     ;
; 1.209 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.192     ; 10.229     ;
; 1.213 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.206     ; 10.211     ;
; 1.217 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.206     ; 10.207     ;
; 1.230 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.206     ; 10.194     ;
; 1.231 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.206     ; 10.193     ;
; 1.237 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.202     ;
; 1.254 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[0]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.185     ;
; 1.254 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.205     ; 10.171     ;
; 1.267 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.204     ; 10.159     ;
; 1.268 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[5]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.207     ; 10.155     ;
; 1.273 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.178     ; 10.179     ;
; 1.279 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.160     ;
; 1.279 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.190     ; 10.161     ;
; 1.291 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.199     ; 10.140     ;
; 1.294 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.145     ;
; 1.304 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 10.147     ;
; 1.311 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.194     ; 10.125     ;
; 1.312 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.188     ; 10.130     ;
; 1.312 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.188     ; 10.130     ;
; 1.314 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.125     ;
; 1.314 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 10.120     ;
; 1.317 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 10.129     ;
; 1.326 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.203     ; 10.101     ;
; 1.329 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.206     ; 10.095     ;
; 1.334 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.192     ; 10.104     ;
; 1.343 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.202     ; 10.085     ;
; 1.345 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.191     ; 10.094     ;
; 1.346 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 10.105     ;
; 1.346 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.178     ; 10.106     ;
; 1.347 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 10.086     ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                         ;
+-------+-------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 4.544 ; svideo_yout_dly2[5]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.081     ; 4.068      ;
; 4.546 ; svideo_yout_dly2[4]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.081     ; 4.066      ;
; 4.634 ; svideo_yout_dly2[5]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.975      ;
; 4.636 ; svideo_yout_dly2[4]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.973      ;
; 4.643 ; svideo_yout_dly2[5]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.966      ;
; 4.645 ; svideo_yout_dly2[4]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.964      ;
; 4.715 ; svideo_yout_dly2[5]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.896      ;
; 4.717 ; svideo_yout_dly2[4]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.894      ;
; 4.743 ; svideo_yout_dly2[5]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.868      ;
; 4.745 ; svideo_yout_dly2[4]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.866      ;
; 4.747 ; svideo_yout_dly2[5]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.864      ;
; 4.749 ; svideo_yout_dly2[4]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.862      ;
; 4.823 ; svideo_yout_dly2[2]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.081     ; 3.789      ;
; 4.832 ; svideo_yout_dly2[7]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.081     ; 3.780      ;
; 4.859 ; svideo_yout_dly2[3]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.081     ; 3.753      ;
; 4.867 ; svideo_yout_dly2[6]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.081     ; 3.745      ;
; 4.868 ; svideo_yout_dly2[5]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.743      ;
; 4.870 ; svideo_yout_dly2[4]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.741      ;
; 4.878 ; svideo_yout_dly2[4]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.083     ; 3.732      ;
; 4.883 ; svideo_yout_dly2[5]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.083     ; 3.727      ;
; 4.913 ; svideo_yout_dly2[2]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.696      ;
; 4.922 ; svideo_yout_dly2[7]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.687      ;
; 4.922 ; svideo_yout_dly2[2]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.687      ;
; 4.931 ; svideo_yout_dly2[7]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.678      ;
; 4.949 ; svideo_yout_dly2[3]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.660      ;
; 4.957 ; svideo_yout_dly2[6]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.652      ;
; 4.958 ; svideo_yout_dly2[3]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.651      ;
; 4.966 ; svideo_yout_dly2[6]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.643      ;
; 4.994 ; svideo_yout_dly2[2]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.617      ;
; 5.003 ; svideo_yout_dly2[7]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.608      ;
; 5.022 ; svideo_yout_dly2[2]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.589      ;
; 5.026 ; svideo_yout_dly2[2]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.585      ;
; 5.030 ; svideo_yout_dly2[3]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.581      ;
; 5.031 ; svideo_yout_dly2[7]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.580      ;
; 5.035 ; svideo_yout_dly2[7]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.576      ;
; 5.038 ; svideo_yout_dly2[6]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.573      ;
; 5.058 ; svideo_yout_dly2[3]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.553      ;
; 5.062 ; svideo_yout_dly2[3]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.549      ;
; 5.066 ; svideo_yout_dly2[6]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.545      ;
; 5.070 ; svideo_yout_dly2[6]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.541      ;
; 5.147 ; svideo_yout_dly2[2]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.464      ;
; 5.156 ; svideo_yout_dly2[7]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.455      ;
; 5.162 ; svideo_yout_dly2[2]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.083     ; 3.448      ;
; 5.171 ; svideo_yout_dly2[7]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.083     ; 3.439      ;
; 5.183 ; svideo_yout_dly2[6]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.083     ; 3.427      ;
; 5.183 ; svideo_yout_dly2[3]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.428      ;
; 5.186 ; svideo_yout_dly2[3]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.083     ; 3.424      ;
; 5.191 ; svideo_yout_dly2[6]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 3.420      ;
; 5.528 ; svideo_yout_dly2[0]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.081     ; 3.084      ;
; 5.544 ; svideo_yout_dly2[1]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.081     ; 3.068      ;
; 5.601 ; svideo_yout_dly2[1]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.008      ;
; 5.604 ; svideo_yout_dly2[1]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 3.005      ;
; 5.618 ; svideo_yout_dly2[0]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 2.991      ;
; 5.627 ; svideo_yout_dly2[0]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.084     ; 2.982      ;
; 5.699 ; svideo_yout_dly2[0]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 2.912      ;
; 5.707 ; svideo_yout_dly2[1]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 2.904      ;
; 5.709 ; svideo_yout_dly2[1]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 2.902      ;
; 5.713 ; svideo_yout_dly2[1]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 2.898      ;
; 5.727 ; svideo_yout_dly2[0]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 2.884      ;
; 5.731 ; svideo_yout_dly2[0]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 2.880      ;
; 5.821 ; svideo_yout_dly2[1]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.083     ; 2.789      ;
; 5.852 ; svideo_yout_dly2[0]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 2.759      ;
; 5.857 ; svideo_yout_dly2[1]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.082     ; 2.754      ;
; 5.867 ; svideo_yout_dly2[0]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.083     ; 2.743      ;
; 6.116 ; svideo:svideo|luma[2]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.181     ; 2.511      ;
; 6.208 ; cvbs1_out[9]            ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.079     ; 2.406      ;
; 6.242 ; luma_saturated[1]       ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.070     ; 2.496      ;
; 6.248 ; svideo:svideo|luma[2]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.181     ; 2.379      ;
; 6.261 ; luma_saturated[1]       ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.070     ; 2.477      ;
; 6.267 ; svideo:svideo|luma[2]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.181     ; 2.360      ;
; 6.273 ; svideo:svideo|chroma[0] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.353      ;
; 6.333 ; cvbs1_out[3]            ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.080     ; 2.280      ;
; 6.347 ; svideo:svideo|chroma[1] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.279      ;
; 6.352 ; svideo:svideo|luma[3]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.181     ; 2.275      ;
; 6.362 ; svideo:svideo|luma[3]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.181     ; 2.265      ;
; 6.365 ; cvbs1_out[4]            ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.080     ; 2.248      ;
; 6.366 ; svideo:svideo|chroma[1] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.260      ;
; 6.369 ; cvbs1_out[2]            ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.080     ; 2.244      ;
; 6.374 ; luma_saturated[1]       ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.070     ; 2.364      ;
; 6.380 ; svideo:svideo|luma[2]   ; luma_saturated[5]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.181     ; 2.247      ;
; 6.388 ; svideo:svideo|luma[1]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.238      ;
; 6.388 ; svideo:svideo|luma_2[0] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.069     ; 2.351      ;
; 6.393 ; luma_saturated[1]       ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.070     ; 2.345      ;
; 6.398 ; luma_saturated[0]       ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.070     ; 2.340      ;
; 6.399 ; svideo:svideo|luma[2]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.181     ; 2.228      ;
; 6.399 ; svideo:svideo|luma[1]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.227      ;
; 6.400 ; svideo:svideo|chroma[2] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.226      ;
; 6.405 ; svideo:svideo|chroma[0] ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.221      ;
; 6.410 ; svideo:svideo|chroma[0] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.216      ;
; 6.420 ; svideo:svideo|luma[0]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.206      ;
; 6.433 ; svideo:svideo|luma[0]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.193      ;
; 6.454 ; svideo:svideo|luma[4]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.172      ;
; 6.458 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.069     ; 2.281      ;
; 6.475 ; svideo:svideo|luma_2[4] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.068     ; 2.265      ;
; 6.477 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.069     ; 2.262      ;
; 6.479 ; svideo:svideo|chroma[1] ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.147      ;
; 6.480 ; svideo:svideo|chroma[3] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.182     ; 2.146      ;
; 6.484 ; svideo:svideo|luma[3]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.181     ; 2.143      ;
; 6.491 ; luma_saturated[5]       ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.070     ; 2.247      ;
; 6.494 ; svideo:svideo|luma[3]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.181     ; 2.133      ;
+-------+-------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                     ; To Node                                            ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 25.905 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 7.347      ;
; 25.905 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 7.347      ;
; 26.050 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 7.133      ;
; 26.050 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 7.133      ;
; 26.230 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 7.022      ;
; 26.230 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 7.022      ;
; 26.253 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.930      ;
; 26.253 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.930      ;
; 26.381 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.802      ;
; 26.381 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.802      ;
; 26.427 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.825      ;
; 26.427 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.825      ;
; 26.509 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.743      ;
; 26.509 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.743      ;
; 26.559 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.693      ;
; 26.559 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.693      ;
; 26.576 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.676      ;
; 26.576 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.676      ;
; 26.648 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.604      ;
; 26.648 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.604      ;
; 26.660 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.523      ;
; 26.660 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.523      ;
; 26.677 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.506      ;
; 26.677 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.506      ;
; 26.792 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.391      ;
; 26.792 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.391      ;
; 26.863 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.320      ;
; 26.863 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.320      ;
; 26.901 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.351      ;
; 26.901 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.351      ;
; 26.906 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.122     ; 6.293      ;
; 26.906 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.122     ; 6.293      ;
; 26.906 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.122     ; 6.293      ;
; 26.906 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.122     ; 6.293      ;
; 26.906 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.122     ; 6.293      ;
; 26.931 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.252      ;
; 26.931 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.252      ;
; 26.968 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.284      ;
; 26.968 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.284      ;
; 26.991 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.192      ;
; 26.991 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.192      ;
; 26.995 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.188      ;
; 26.995 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.188      ;
; 26.997 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.186      ;
; 26.997 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.186      ;
; 27.045 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.074     ; 6.202      ;
; 27.098 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.154      ;
; 27.098 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.154      ;
; 27.110 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 6.091      ;
; 27.119 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 6.082      ;
; 27.119 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 6.082      ;
; 27.123 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 6.078      ;
; 27.123 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 6.078      ;
; 27.123 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.060      ;
; 27.123 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 6.060      ;
; 27.167 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 6.034      ;
; 27.180 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.072      ;
; 27.180 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.072      ;
; 27.222 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[0]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.084     ; 6.015      ;
; 27.230 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.022      ;
; 27.230 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 6.022      ;
; 27.256 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 5.927      ;
; 27.285 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 5.953      ;
; 27.286 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 5.952      ;
; 27.286 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.083     ; 5.952      ;
; 27.287 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 5.896      ;
; 27.287 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 5.896      ;
; 27.293 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 5.959      ;
; 27.293 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 5.959      ;
; 27.313 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.888      ;
; 27.319 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 5.933      ;
; 27.319 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.069     ; 5.933      ;
; 27.322 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.879      ;
; 27.322 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.879      ;
; 27.323 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.073     ; 5.925      ;
; 27.326 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.875      ;
; 27.326 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.875      ;
; 27.327 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.874      ;
; 27.328 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.073     ; 5.920      ;
; 27.328 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.873      ;
; 27.328 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.873      ;
; 27.329 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.872      ;
; 27.330 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.871      ;
; 27.330 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.871      ;
; 27.336 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.865      ;
; 27.349 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.073     ; 5.899      ;
; 27.351 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.073     ; 5.897      ;
; 27.361 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.091     ; 5.869      ;
; 27.361 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.091     ; 5.869      ;
; 27.361 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.091     ; 5.869      ;
; 27.361 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.091     ; 5.869      ;
; 27.361 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.091     ; 5.869      ;
; 27.361 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.091     ; 5.869      ;
; 27.361 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.091     ; 5.869      ;
; 27.361 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.091     ; 5.869      ;
; 27.361 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.091     ; 5.869      ;
; 27.370 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.120     ; 5.831      ;
; 27.403 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.074     ; 5.844      ;
; 27.419 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 5.764      ;
; 27.419 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.138     ; 5.764      ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                        ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 45.299 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.184      ; 4.883      ;
; 45.469 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.171      ; 4.700      ;
; 45.530 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.184      ; 4.652      ;
; 45.916 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.185      ; 4.267      ;
; 46.016 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.185      ; 4.167      ;
; 46.152 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.185      ; 4.031      ;
; 46.318 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.170      ; 3.850      ;
; 46.381 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.184      ; 3.801      ;
; 46.546 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.191      ; 3.643      ;
; 46.578 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.180      ; 3.600      ;
; 46.643 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.170      ; 3.525      ;
; 46.991 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.170      ; 3.177      ;
; 47.204 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.184      ; 2.978      ;
; 47.253 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.169      ; 2.914      ;
; 47.264 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.169      ; 2.903      ;
; 47.304 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.169      ; 2.863      ;
; 47.410 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.183      ; 2.771      ;
; 47.492 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.182      ; 2.688      ;
; 47.658 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.184      ; 2.524      ;
; 47.780 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.179      ; 2.397      ;
; 47.873 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.179      ; 2.304      ;
; 48.078 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                               ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.186      ; 2.106      ;
; 48.409 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.186      ; 1.775      ;
; 48.409 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.186      ; 1.775      ;
; 95.194 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.453      ;
; 95.197 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.449      ;
; 95.209 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.438      ;
; 95.214 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.432      ;
; 95.283 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.364      ;
; 95.291 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.356      ;
; 95.293 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.354      ;
; 95.300 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.347      ;
; 95.300 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.346      ;
; 95.301 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.345      ;
; 95.304 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.342      ;
; 95.329 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.317      ;
; 95.337 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.310      ;
; 95.345 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.301      ;
; 95.346 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.351     ; 4.301      ;
; 95.444 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.352     ; 4.202      ;
; 95.649 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.290      ;
; 95.649 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.290      ;
; 95.649 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.290      ;
; 95.649 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.290      ;
; 95.649 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.290      ;
; 95.649 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.290      ;
; 95.649 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.290      ;
; 95.649 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 4.290      ;
; 95.732 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 4.208      ;
; 95.732 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 4.208      ;
; 95.732 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 4.208      ;
; 95.732 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 4.208      ;
; 95.732 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 4.208      ;
; 95.732 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 4.208      ;
; 95.732 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 4.208      ;
; 95.732 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.058     ; 4.208      ;
; 95.755 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 4.181      ;
; 95.755 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 4.181      ;
; 95.755 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 4.181      ;
; 95.755 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 4.181      ;
; 95.755 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 4.181      ;
; 95.755 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 4.181      ;
; 95.755 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 4.181      ;
; 95.755 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 4.181      ;
; 95.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.107      ;
; 95.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.107      ;
; 95.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.107      ;
; 95.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.107      ;
; 95.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 4.107      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 4.120      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 4.120      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 4.120      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 4.120      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 4.120      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 4.120      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 4.120      ;
; 95.822 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 4.120      ;
; 95.970 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 3.954      ;
; 95.970 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 3.954      ;
; 95.970 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 3.954      ;
; 95.970 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 3.954      ;
; 95.970 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 3.954      ;
; 96.011 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 3.912      ;
; 96.011 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 3.912      ;
; 96.011 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 3.912      ;
; 96.011 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 3.912      ;
; 96.011 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 3.912      ;
; 96.119 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.087     ; 3.792      ;
; 96.119 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.087     ; 3.792      ;
; 96.119 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.087     ; 3.792      ;
; 96.119 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.087     ; 3.792      ;
; 96.128 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 3.796      ;
; 96.128 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 3.796      ;
; 96.128 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 3.796      ;
; 96.128 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 3.796      ;
; 96.128 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 3.796      ;
; 96.134 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.807      ;
; 96.144 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.078     ; 3.776      ;
; 96.144 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.078     ; 3.776      ;
; 96.144 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.078     ; 3.776      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.340 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[1]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 0.997      ;
; 0.340 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[3]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 0.997      ;
; 0.347 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[7]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.004      ;
; 0.350 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.007      ;
; 0.350 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[4]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.007      ;
; 0.360 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.013      ;
; 0.360 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.013      ;
; 0.361 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.018      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.015      ;
; 0.364 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.018      ;
; 0.364 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.018      ;
; 0.366 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.019      ;
; 0.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.022      ;
; 0.372 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.026      ;
; 0.377 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.031      ;
; 0.378 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.032      ;
; 0.379 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[5]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.036      ;
; 0.379 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.033      ;
; 0.379 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.033      ;
; 0.381 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.034      ;
; 0.381 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.034      ;
; 0.381 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.034      ;
; 0.381 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.034      ;
; 0.381 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.035      ;
; 0.382 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.036      ;
; 0.382 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.036      ;
; 0.384 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.037      ;
; 0.384 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.037      ;
; 0.384 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.037      ;
; 0.385 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.038      ;
; 0.386 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.039      ;
; 0.387 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.040      ;
; 0.388 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.041      ;
; 0.388 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.041      ;
; 0.388 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.041      ;
; 0.389 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[2]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.435      ; 1.046      ;
; 0.389 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.043      ;
; 0.390 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.043      ;
; 0.390 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.043      ;
; 0.391 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.044      ;
; 0.391 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.045      ;
; 0.392 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.046      ;
; 0.392 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.046      ;
; 0.393 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.046      ;
; 0.393 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.046      ;
; 0.396 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.049      ;
; 0.397 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.050      ;
; 0.397 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.050      ;
; 0.400 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|cntr_4pf:cntr1|counter_reg_bit[0]    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~portb_address_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.434      ; 1.056      ;
; 0.400 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|cntr_4pf:cntr1|counter_reg_bit[0]    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_address_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.433      ; 1.055      ;
; 0.400 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.053      ;
; 0.403 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 1.057      ;
; 0.408 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.061      ;
; 0.410 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.063      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.064      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 1.064      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.060      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.059      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[0]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[0]                                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[7]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[7]                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg                                                                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23]                                                                                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24]                                                                                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[9]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[9]                                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28]                                                                                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29]                                                                                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                                                                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30]                                                                                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[15]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[15]                                                                                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31]                                                                                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[6]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[6]                                                                                                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchPage                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchPage                                                                                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                                                                                                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect                                                                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[11]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[11]                                                                                                                                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                                                                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[6]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[6]                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg                                                                                                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[6]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[6]                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_control_reg[5]                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_control_reg[5]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|cb2_edge_reg                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|cb2_edge_reg                                                                                                                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CB2_output_reg                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CB2_output_reg                                                                                                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[8]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[8]                                                                                                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.071      ; 0.669      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                            ;
+-------+---------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.353 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 0.717      ;
; 0.353 ; svideo:svideo|luma[9]     ; svideo:svideo|luma_1[9]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 0.717      ;
; 0.355 ; svideo:svideo|luma[8]     ; svideo:svideo|luma_1[8]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 0.719      ;
; 0.439 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.695      ;
; 0.440 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.696      ;
; 0.440 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.696      ;
; 0.441 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.696      ;
; 0.442 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.697      ;
; 0.442 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.697      ;
; 0.506 ; svideo:svideo|luma[0]     ; luma_saturated[0]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 0.869      ;
; 0.514 ; svideo:svideo|luma[0]     ; svideo:svideo|luma_1[0]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 0.877      ;
; 0.523 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 0.886      ;
; 0.523 ; svideo:svideo|luma[5]     ; svideo:svideo|luma_1[5]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 0.886      ;
; 0.524 ; svideo:svideo|luma[7]     ; svideo:svideo|luma_1[7]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 0.888      ;
; 0.525 ; svideo:svideo|luma[9]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 0.888      ;
; 0.589 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.844      ;
; 0.595 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.851      ;
; 0.603 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.859      ;
; 0.606 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.862      ;
; 0.610 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.866      ;
; 0.611 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.866      ;
; 0.611 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.867      ;
; 0.612 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.868      ;
; 0.630 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.886      ;
; 0.631 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.887      ;
; 0.631 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.887      ;
; 0.631 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.887      ;
; 0.632 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.888      ;
; 0.633 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.889      ;
; 0.633 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.889      ;
; 0.634 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 0.890      ;
; 0.646 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.901      ;
; 0.648 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.903      ;
; 0.651 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.906      ;
; 0.651 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.906      ;
; 0.665 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 0.920      ;
; 0.678 ; svideo:svideo|luma[6]     ; svideo:svideo|luma_1[6]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.041      ;
; 0.704 ; svideo:svideo|chroma[3]   ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.068      ;
; 0.708 ; svideo:svideo|chroma[5]   ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.072      ;
; 0.712 ; svideo:svideo|chroma[8]   ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.076      ;
; 0.715 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.078      ;
; 0.717 ; svideo:svideo|chroma[8]   ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.081      ;
; 0.719 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.082      ;
; 0.738 ; svideo:svideo|luma[0]     ; luma_saturated[1]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.101      ;
; 0.745 ; svideo:svideo|chroma[4]   ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.109      ;
; 0.746 ; svideo:svideo|chroma[6]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.110      ;
; 0.747 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.110      ;
; 0.747 ; svideo:svideo|luma[5]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.110      ;
; 0.748 ; svideo:svideo|chroma[7]   ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.112      ;
; 0.749 ; svideo:svideo|chroma[2]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.113      ;
; 0.763 ; svideo:svideo|luma[8]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.126      ;
; 0.775 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.031      ;
; 0.777 ; svideo:svideo|luma[1]     ; luma_saturated[1]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.140      ;
; 0.800 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.055      ;
; 0.803 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.058      ;
; 0.809 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.065      ;
; 0.810 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.066      ;
; 0.811 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.067      ;
; 0.812 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.067      ;
; 0.813 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.068      ;
; 0.813 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.068      ;
; 0.813 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.069      ;
; 0.815 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.071      ;
; 0.815 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.071      ;
; 0.835 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.091      ;
; 0.848 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.103      ;
; 0.871 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.126      ;
; 0.873 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.129      ;
; 0.925 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.289      ;
; 0.950 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.161      ; 1.315      ;
; 0.957 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.321      ;
; 0.964 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.219      ;
; 0.964 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.219      ;
; 0.978 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.233      ;
; 0.978 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.233      ;
; 0.978 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.233      ;
; 0.983 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.238      ;
; 0.983 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.238      ;
; 0.983 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.238      ;
; 1.020 ; svideo:svideo|chroma[3]   ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.384      ;
; 1.021 ; svideo:svideo|chroma[1]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.385      ;
; 1.021 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.277      ;
; 1.022 ; svideo:svideo|chroma[5]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.386      ;
; 1.024 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.070      ; 1.280      ;
; 1.031 ; svideo:svideo|luma[6]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.394      ;
; 1.048 ; svideo:svideo|luma[0]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.411      ;
; 1.049 ; svideo:svideo|luma[7]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.412      ;
; 1.053 ; svideo:svideo|luma[0]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.416      ;
; 1.054 ; svideo:svideo|luma[7]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.417      ;
; 1.062 ; svideo:svideo|chroma[7]   ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.426      ;
; 1.065 ; svideo:svideo|luma[4]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.428      ;
; 1.074 ; svideo:svideo|chroma[4]   ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.438      ;
; 1.075 ; svideo:svideo|chroma[6]   ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.439      ;
; 1.076 ; svideo:svideo|luma[5]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.439      ;
; 1.076 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.069      ; 1.331      ;
; 1.077 ; svideo:svideo|luma[8]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.440      ;
; 1.078 ; svideo:svideo|chroma[2]   ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.442      ;
; 1.078 ; svideo:svideo|chroma[0]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.442      ;
; 1.080 ; svideo:svideo|chroma[4]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.160      ; 1.444      ;
; 1.081 ; svideo:svideo|luma[5]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.159      ; 1.444      ;
+-------+---------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                                                     ;
+-------+---------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                           ; To Node                                                                                                                                                                           ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.388 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[2]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_address_reg0 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.425      ; 1.035      ;
; 0.398 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[1]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_address_reg0 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.425      ; 1.045      ;
; 0.400 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[0]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_address_reg0 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.425      ; 1.047      ;
; 0.413 ; reset_usbdrv                                                        ; reset_usbdrv                                                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                                                                                                                                              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                                                                                                                                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                                                                                                                                              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start           ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start                                                                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[1]                                                       ; cntr_reset[1]                                                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[2]                                                       ; cntr_reset[2]                                                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[5]                                                       ; cntr_reset[5]                                                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; cntr_reset[6]                                                       ; cntr_reset[6]                                                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end                                                                                                                          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2_end                                                                                                               ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait4                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait4                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack_end                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end                                                                                                               ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3             ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3                                                                                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle                                                                                                                          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|start_sendcom                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|start_sendcom                                                                                                                                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                                                                                                                                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid                                                                                                                                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.669      ;
+-------+---------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                  ;
+-------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                       ; To Node                                                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.413 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                           ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.418 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.674      ;
; 0.449 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 0.813      ;
; 0.452 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 0.816      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 0.818      ;
; 0.456 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 0.820      ;
; 0.480 ; seq_reg[9]                                                                                                      ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.736      ;
; 0.595 ; seq_reg[10]                                                                                                     ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.851      ;
; 0.599 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.855      ;
; 0.601 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                                                                       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.857      ;
; 0.601 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.857      ;
; 0.607 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.863      ;
; 0.627 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.883      ;
; 0.632 ; seq_reg[4]                                                                                                      ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.888      ;
; 0.639 ; seq_reg[5]                                                                                                      ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.895      ;
; 0.642 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19] ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.006      ;
; 0.644 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.900      ;
; 0.644 ; sdram_ctrl:sdram_controller|r_psel[0]                                                                           ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.901      ;
; 0.647 ; seq_reg[11]                                                                                                     ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.903      ;
; 0.647 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.903      ;
; 0.647 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.903      ;
; 0.648 ; seq_reg[7]                                                                                                      ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 0.903      ;
; 0.649 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.905      ;
; 0.650 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.906      ;
; 0.650 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.906      ;
; 0.657 ; seq_reg[8]                                                                                                      ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.913      ;
; 0.662 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.918      ;
; 0.667 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.923      ;
; 0.688 ; sdram_ctrl:sdram_controller|r_rd_reg                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.944      ;
; 0.698 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.954      ;
; 0.698 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.062      ;
; 0.699 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.063      ;
; 0.703 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.067      ;
; 0.704 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.068      ;
; 0.717 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.973      ;
; 0.733 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.989      ;
; 0.750 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.006      ;
; 0.755 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.011      ;
; 0.764 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.128      ;
; 0.765 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.129      ;
; 0.766 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.130      ;
; 0.767 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.131      ;
; 0.775 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.139      ;
; 0.776 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.140      ;
; 0.789 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24] ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.160      ; 1.154      ;
; 0.813 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.069      ;
; 0.814 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.070      ;
; 0.836 ; seq_reg[1]                                                                                                      ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.091      ;
; 0.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28] ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.160      ; 1.226      ;
; 0.862 ; seq_reg[0]                                                                                                      ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.119      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31] ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.160      ; 1.227      ;
; 0.864 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17] ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.160      ; 1.229      ;
; 0.864 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25] ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.160      ; 1.229      ;
; 0.865 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18] ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.229      ;
; 0.865 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[27] ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.160      ; 1.230      ;
; 0.866 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16] ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.160      ; 1.231      ;
; 0.866 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23] ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.160      ; 1.231      ;
; 0.875 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30] ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.160      ; 1.240      ;
; 0.876 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.132      ;
; 0.879 ; seq_reg[10]                                                                                                     ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.073      ; 1.138      ;
; 0.882 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21] ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.246      ;
; 0.883 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[26] ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.247      ;
; 0.888 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]  ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.252      ;
; 0.906 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.162      ;
; 0.939 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.199      ;
; 0.941 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.201      ;
; 0.942 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 1.202      ;
; 0.962 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.218      ;
; 0.964 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.220      ;
; 0.974 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.229      ;
; 0.974 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.230      ;
; 0.975 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.231      ;
; 0.976 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.232      ;
; 0.977 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.233      ;
; 0.977 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.233      ;
; 0.979 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.235      ;
; 0.980 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.236      ;
; 0.981 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 1.236      ;
; 0.981 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.237      ;
; 0.981 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10] ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.345      ;
; 0.982 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.238      ;
; 0.982 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.238      ;
; 0.994 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1                                                       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.250      ;
; 1.028 ; sdram_ctrl:sdram_controller|r_rd_reg                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.284      ;
; 1.029 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.393      ;
; 1.029 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.159      ; 1.393      ;
; 1.070 ; seq_reg[6]                                                                                                      ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.326      ;
; 1.074 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.328      ;
; 1.083 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.339      ;
; 1.084 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.338      ;
; 1.088 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 1.344      ;
+-------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                             ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.413 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.414 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.669      ;
; 0.419 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.674      ;
; 0.419 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.674      ;
; 0.419 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.674      ;
; 0.433 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.689      ;
; 0.434 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.689      ;
; 0.437 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.692      ;
; 0.438 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.694      ;
; 0.439 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.694      ;
; 0.440 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.695      ;
; 0.440 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.695      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.441 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.696      ;
; 0.442 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.697      ;
; 0.442 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.697      ;
; 0.443 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.698      ;
; 0.447 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.703      ;
; 0.447 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.703      ;
; 0.448 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.704      ;
; 0.449 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.705      ;
; 0.450 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.705      ;
; 0.451 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.707      ;
; 0.452 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.707      ;
; 0.452 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.708      ;
; 0.453 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.709      ;
; 0.453 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.708      ;
; 0.454 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.710      ;
; 0.456 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.712      ;
; 0.462 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.717      ;
; 0.462 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.717      ;
; 0.462 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.717      ;
; 0.462 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.718      ;
; 0.463 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.718      ;
; 0.463 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.718      ;
; 0.464 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.720      ;
; 0.465 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[15]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.720      ;
; 0.470 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.350      ; 1.042      ;
; 0.470 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.726      ;
; 0.472 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.069      ; 0.727      ;
; 0.475 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.731      ;
; 0.482 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.055      ;
; 0.482 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.350      ; 1.054      ;
; 0.484 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 0.740      ;
; 0.487 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.060      ;
; 0.487 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.068      ;
; 0.491 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.064      ;
; 0.493 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.073      ;
; 0.497 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.350      ; 1.069      ;
; 0.498 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.071      ;
; 0.499 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.072      ;
; 0.502 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.083      ;
; 0.504 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.350      ; 1.076      ;
; 0.510 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.090      ;
; 0.510 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.090      ;
; 0.513 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.093      ;
; 0.513 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.093      ;
; 0.516 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.089      ;
; 0.516 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.350      ; 1.088      ;
; 0.519 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.092      ;
; 0.519 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.100      ;
; 0.525 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.351      ; 1.098      ;
; 0.525 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.350      ; 1.097      ;
; 0.529 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.110      ;
; 0.541 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.122      ;
; 0.543 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.123      ;
; 0.544 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.359      ; 1.125      ;
; 0.545 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.358      ; 1.125      ;
; 0.546 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.350      ; 1.118      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                      ;
+-------+---------------------------------------+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                                                                     ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 5.680 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.155     ; 5.911      ;
; 5.683 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.897      ;
; 5.683 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.897      ;
; 5.683 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.897      ;
; 5.683 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.897      ;
; 5.683 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.897      ;
; 5.685 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.895      ;
; 5.685 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.895      ;
; 5.693 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.167     ; 5.886      ;
; 5.693 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.167     ; 5.886      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|state                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.183     ; 5.524      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[7]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.169     ; 5.538      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[6]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.169     ; 5.538      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[4]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.169     ; 5.538      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[3]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.169     ; 5.538      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[5]                                                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.171     ; 5.536      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[4]                                                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.171     ; 5.536      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[9]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[8]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[7]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[6]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[4]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[4]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.186     ; 5.521      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[0]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.180     ; 5.527      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[1]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.180     ; 5.527      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[2]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.180     ; 5.527      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[3]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.180     ; 5.527      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[4]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.180     ; 5.527      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[5]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.180     ; 5.527      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[6]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.180     ; 5.527      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[7]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.180     ; 5.527      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_reset_reg                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.180     ; 5.527      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.183     ; 5.524      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[1]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.169     ; 5.538      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[1]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.186     ; 5.521      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[1]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.186     ; 5.521      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[5]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[4]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[3]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[1]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[31]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.175     ; 5.532      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[31]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.174     ; 5.533      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[31]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.174     ; 5.533      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[31]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.175     ; 5.532      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[8]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.186     ; 5.521      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[8]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.186     ; 5.521      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[2]                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[0]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[12]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.171     ; 5.536      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[4]                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.171     ; 5.536      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[5]                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.171     ; 5.536      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[1]                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.172     ; 5.535      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[5]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.169     ; 5.538      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[5]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[5]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.186     ; 5.521      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[5]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.186     ; 5.521      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[24]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.174     ; 5.533      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[24]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.174     ; 5.533      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[24]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.175     ; 5.532      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[24]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.175     ; 5.532      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[20]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.186     ; 5.521      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[20]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.175     ; 5.532      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[20]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.175     ; 5.532      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[16]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.175     ; 5.532      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[16]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.175     ; 5.532      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.174     ; 5.533      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[16]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.174     ; 5.533      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[2]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.174     ; 5.533      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[2]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.170     ; 5.537      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[2]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.186     ; 5.521      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[2]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.186     ; 5.521      ;
; 6.039 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|mosi~en                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.183     ; 5.524      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[8]                                                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.172     ; 5.534      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[6]                                                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.172     ; 5.534      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[3]                                                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.172     ; 5.534      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[2]                                                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.184     ; 5.522      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[1]                                                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.184     ; 5.522      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[1]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[4]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[5]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[6]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|enabled_out_reg ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[7]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.178     ; 5.528      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.165     ; 5.541      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.165     ; 5.541      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[2]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.165     ; 5.541      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[3]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.165     ; 5.541      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[4]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.165     ; 5.541      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|enabled_out_reg ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.179     ; 5.527      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[3]                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.179     ; 5.527      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[5]                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.179     ; 5.527      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
; 6.040 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.166     ; 5.540      ;
+-------+---------------------------------------+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                        ;
+-------+------------------------+----------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                      ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+----------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 8.052 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.285     ; 3.286      ;
; 8.129 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.194     ; 3.307      ;
; 8.129 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.194     ; 3.307      ;
; 8.145 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.206     ; 3.279      ;
; 8.145 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.195     ; 3.290      ;
; 8.146 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.206     ; 3.278      ;
; 8.146 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.207     ; 3.277      ;
; 8.146 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.207     ; 3.277      ;
; 8.148 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 3.285      ;
; 8.148 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 3.285      ;
; 8.148 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.208     ; 3.274      ;
; 8.148 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.209     ; 3.273      ;
; 8.148 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 3.285      ;
; 8.148 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 3.285      ;
; 8.148 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.209     ; 3.273      ;
; 8.148 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 3.285      ;
; 8.150 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.345     ; 3.127      ;
; 8.158 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.234     ; 3.240      ;
; 8.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.333     ; 3.127      ;
; 8.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.336     ; 3.124      ;
; 8.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.333     ; 3.127      ;
; 8.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.336     ; 3.124      ;
; 8.162 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.333     ; 3.127      ;
; 8.163 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.346     ; 3.113      ;
; 8.163 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.346     ; 3.113      ;
; 8.163 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.347     ; 3.112      ;
; 8.163 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.345     ; 3.114      ;
; 8.163 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.346     ; 3.113      ;
; 8.163 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.347     ; 3.112      ;
; 8.163 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.347     ; 3.112      ;
; 8.165 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.337     ; 3.120      ;
; 8.165 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.352     ; 3.105      ;
; 8.170 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.222     ; 3.240      ;
; 8.170 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.222     ; 3.240      ;
; 8.170 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.222     ; 3.240      ;
; 8.170 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.225     ; 3.237      ;
; 8.170 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.225     ; 3.237      ;
; 8.171 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.234     ; 3.227      ;
; 8.171 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.236     ; 3.225      ;
; 8.171 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.236     ; 3.225      ;
; 8.171 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.236     ; 3.225      ;
; 8.171 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.235     ; 3.226      ;
; 8.171 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.235     ; 3.226      ;
; 8.171 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.235     ; 3.226      ;
; 8.173 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.226     ; 3.233      ;
; 8.173 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.241     ; 3.218      ;
; 8.235 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 3.314      ;
; 8.235 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 3.314      ;
; 8.394 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.195     ; 3.041      ;
; 8.394 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.195     ; 3.041      ;
; 8.394 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.195     ; 3.041      ;
; 8.394 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.206     ; 3.030      ;
; 8.394 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.195     ; 3.041      ;
; 8.394 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.195     ; 3.041      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.641 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.894      ;
; 8.642 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.907      ;
; 8.642 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.907      ;
; 8.642 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.907      ;
; 8.642 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.907      ;
; 8.657 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.187     ; 2.901      ;
; 8.657 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.206     ; 2.882      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.877      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.891      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.891      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 2.890      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 2.890      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.891      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.891      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 2.890      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 2.890      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 2.890      ;
; 8.658 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.197     ; 2.890      ;
+-------+------------------------+----------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                           ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 47.708 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.179      ; 2.469      ;
; 96.999 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.946      ;
; 96.999 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.946      ;
; 96.999 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.946      ;
; 96.999 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.946      ;
; 97.098 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.847      ;
; 97.098 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.847      ;
; 97.098 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.847      ;
; 97.098 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 2.847      ;
; 97.387 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.556      ;
; 97.387 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.556      ;
; 97.387 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.556      ;
; 97.387 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.556      ;
; 97.426 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 2.512      ;
; 97.426 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 2.512      ;
; 97.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.054     ; 2.389      ;
; 97.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.054     ; 2.389      ;
; 97.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.054     ; 2.389      ;
; 97.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.054     ; 2.389      ;
; 97.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.054     ; 2.389      ;
; 97.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.054     ; 2.389      ;
; 97.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.054     ; 2.389      ;
; 97.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.054     ; 2.389      ;
; 97.555 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.054     ; 2.389      ;
; 97.617 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.326      ;
; 97.617 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.326      ;
; 97.617 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.326      ;
; 97.617 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.326      ;
; 97.623 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 2.308      ;
; 97.639 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 2.284      ;
; 97.639 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 2.284      ;
; 97.639 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 2.284      ;
; 97.639 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 2.284      ;
; 97.639 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 2.284      ;
; 97.639 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 2.284      ;
; 97.639 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 2.284      ;
; 97.639 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 2.284      ;
; 97.639 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 2.284      ;
; 97.639 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.075     ; 2.284      ;
; 97.733 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 2.191      ;
; 97.733 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 2.191      ;
; 97.733 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 2.191      ;
; 97.733 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 2.191      ;
; 97.733 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 2.191      ;
; 97.733 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 2.191      ;
; 97.733 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 2.191      ;
; 97.733 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 2.191      ;
; 97.733 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 2.191      ;
; 97.733 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 2.191      ;
; 97.779 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.061     ; 2.158      ;
; 98.006 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.918      ;
; 98.006 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.918      ;
; 98.006 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.918      ;
; 98.006 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.074     ; 1.918      ;
; 98.029 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.909      ;
; 98.029 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.909      ;
; 98.029 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.909      ;
; 98.029 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.909      ;
; 98.029 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.909      ;
; 98.029 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.909      ;
; 98.029 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.909      ;
; 98.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 1.912      ;
; 98.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 1.912      ;
; 98.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 1.912      ;
; 98.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 1.912      ;
; 98.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 1.912      ;
; 98.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 1.912      ;
; 98.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 1.912      ;
; 98.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 1.912      ;
; 98.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 1.912      ;
; 98.031 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.912      ;
; 98.031 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.912      ;
; 98.031 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.912      ;
; 98.070 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 1.871      ;
; 98.070 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 1.871      ;
; 98.070 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 1.871      ;
; 98.090 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.060     ; 1.848      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
; 98.280 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 1.649      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                             ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.085     ; 3.044      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.085     ; 3.044      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.085     ; 3.044      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.085     ; 3.044      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.085     ; 3.044      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.085     ; 3.044      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.085     ; 3.044      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.045      ;
; 63.525 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.085     ; 3.044      ;
; 63.526 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.044      ;
; 63.526 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.083     ; 3.045      ;
; 63.526 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.083     ; 3.045      ;
; 63.526 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.083     ; 3.045      ;
; 63.526 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.084     ; 3.044      ;
; 63.527 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.083     ; 3.044      ;
; 63.527 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.083     ; 3.044      ;
; 65.464 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.272      ; 3.462      ;
; 65.464 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.272      ; 3.462      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.052      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.052      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.052      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.270      ; 3.052      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
; 65.872 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.271      ; 3.053      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                             ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.882      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.882      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.882      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.882      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.187 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 2.883      ;
; 0.188 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.883      ;
; 0.188 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.883      ;
; 0.188 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.883      ;
; 0.188 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.883      ;
; 0.188 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.883      ;
; 0.188 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.883      ;
; 0.188 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.883      ;
; 0.188 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.883      ;
; 0.188 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.883      ;
; 0.188 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.509      ; 2.883      ;
; 0.576 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 3.272      ;
; 0.576 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.510      ; 3.272      ;
; 2.630 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 2.873      ;
; 2.630 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 2.873      ;
; 2.631 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 2.874      ;
; 2.631 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 2.874      ;
; 2.631 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 2.874      ;
; 2.632 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.873      ;
; 2.632 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.873      ;
; 2.632 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.873      ;
; 2.632 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.873      ;
; 2.632 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.873      ;
; 2.632 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.873      ;
; 2.632 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.873      ;
; 2.632 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.873      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.056      ; 2.875      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.056      ; 2.875      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.056      ; 2.875      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.056      ; 2.875      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.056      ; 2.875      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.056      ; 2.875      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
; 2.633 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.055      ; 2.874      ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                            ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.245  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.501      ;
; 1.447  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.080      ; 1.713      ;
; 1.487  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.082      ; 1.755      ;
; 1.487  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.082      ; 1.755      ;
; 1.487  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.082      ; 1.755      ;
; 1.495  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.080      ; 1.761      ;
; 1.495  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.080      ; 1.761      ;
; 1.495  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.080      ; 1.761      ;
; 1.495  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.080      ; 1.761      ;
; 1.495  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.080      ; 1.761      ;
; 1.495  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.080      ; 1.761      ;
; 1.495  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.080      ; 1.761      ;
; 1.501  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 1.770      ;
; 1.501  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 1.770      ;
; 1.501  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 1.770      ;
; 1.501  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 1.770      ;
; 1.501  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 1.770      ;
; 1.501  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 1.770      ;
; 1.501  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 1.770      ;
; 1.501  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 1.770      ;
; 1.501  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 1.770      ;
; 1.508  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 1.778      ;
; 1.508  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 1.778      ;
; 1.508  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.084      ; 1.778      ;
; 1.515  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.766      ;
; 1.515  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.766      ;
; 1.515  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.766      ;
; 1.515  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 1.766      ;
; 1.777  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.042      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.065      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.065      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.065      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.065      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.065      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.065      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.065      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.065      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.065      ;
; 1.814  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.065      ; 2.065      ;
; 1.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.130      ;
; 1.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.130      ;
; 1.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.130      ;
; 1.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.130      ;
; 1.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.130      ;
; 1.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.130      ;
; 1.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.130      ;
; 1.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.130      ;
; 1.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.130      ;
; 1.880  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.064      ; 2.130      ;
; 1.889  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.073      ; 2.148      ;
; 1.941  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 2.210      ;
; 1.941  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 2.210      ;
; 1.941  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 2.210      ;
; 1.941  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 2.210      ;
; 1.944  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.215      ;
; 1.944  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.215      ;
; 1.944  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.215      ;
; 1.944  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.215      ;
; 1.944  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.215      ;
; 1.944  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.215      ;
; 1.944  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.215      ;
; 1.944  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.215      ;
; 1.944  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.085      ; 2.215      ;
; 2.118  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.383      ;
; 2.118  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.383      ;
; 2.133  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 2.402      ;
; 2.133  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 2.402      ;
; 2.133  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 2.402      ;
; 2.133  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.083      ; 2.402      ;
; 2.417  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.086      ; 2.689      ;
; 2.417  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.086      ; 2.689      ;
; 2.417  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.086      ; 2.689      ;
; 2.417  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.086      ; 2.689      ;
; 2.486  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.086      ; 2.758      ;
; 2.486  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.086      ; 2.758      ;
; 2.486  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.086      ; 2.758      ;
; 2.486  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.086      ; 2.758      ;
; 51.795 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; -50.000      ; 0.322      ; 2.323      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 1.478 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.067      ;
; 1.478 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.067      ;
; 1.478 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.067      ;
; 1.478 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.067      ;
; 1.478 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.067      ;
; 1.478 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.067      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.492 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.066      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.362      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.362      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.362      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.362      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.362      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.362      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.362      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 2.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.416      ; 3.022      ;
; 3.238 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[5]                                                                                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.494      ; 3.918      ;
; 3.270 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[1]                                                                                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.471      ; 3.927      ;
; 3.281 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.457      ; 3.924      ;
; 3.281 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.457      ; 3.924      ;
; 3.281 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.457      ; 3.924      ;
; 3.281 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.456      ; 3.923      ;
; 3.281 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.456      ; 3.923      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                      ;
+-------+------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 2.347 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.153      ; 2.705      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.147      ; 2.699      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.147      ; 2.699      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.147      ; 2.699      ;
; 2.347 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.147      ; 2.699      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.150      ; 2.703      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.150      ; 2.703      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.150      ; 2.703      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.150      ; 2.703      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.150      ; 2.703      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.152      ; 2.705      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.152      ; 2.705      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.150      ; 2.703      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.151      ; 2.704      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.151      ; 2.704      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.151      ; 2.704      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.151      ; 2.704      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.150      ; 2.703      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.151      ; 2.704      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.150      ; 2.703      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.156      ; 2.709      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.146      ; 2.699      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.146      ; 2.699      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.146      ; 2.699      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.146      ; 2.699      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.146      ; 2.699      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.146      ; 2.699      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.137      ; 2.690      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.151      ; 2.704      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.149      ; 2.702      ;
; 2.348 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.152      ; 2.705      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.349 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.686      ;
; 2.360 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.146      ; 2.711      ;
; 2.360 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.146      ; 2.711      ;
; 2.360 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.146      ; 2.711      ;
; 2.360 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.146      ; 2.711      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.361 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.698      ;
; 2.600 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.128      ; 2.857      ;
; 2.600 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.128      ; 2.857      ;
; 2.600 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.129      ; 2.858      ;
; 2.600 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.129      ; 2.858      ;
; 2.600 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.128      ; 2.857      ;
; 2.601 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.847      ;
; 2.749 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.147      ; 3.101      ;
; 2.749 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.147      ; 3.101      ;
+-------+------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+---------------------------+
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.130 ; 4.350        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.131 ; 4.351        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.131 ; 4.351        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.131 ; 4.351        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.131 ; 4.351        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.131 ; 4.351        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.131 ; 4.351        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.247 ; 4.400        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.247 ; 4.400        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.247 ; 4.400        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.247 ; 4.400        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.247 ; 4.400        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.247 ; 4.400        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.247 ; 4.400        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.247 ; 4.400        ; 0.153          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.252 ; 4.410        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.252 ; 4.410        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.252 ; 4.410        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.252 ; 4.410        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.252 ; 4.410        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.252 ; 4.410        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.252 ; 4.410        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.252 ; 4.410        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.271 ; 4.459        ; 0.188          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.595 ; 5.815        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                      ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                      ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[5]                                                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[6]                                                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[7]                                                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[8]                                                ;
; 5.596 ; 5.816        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[9]                                                ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.598 ; 5.818        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.599 ; 5.819        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.601 ; 5.821        ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.656 ; 5.814        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[0]                   ;
; 5.656 ; 5.814        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[1]                   ;
; 5.656 ; 5.814        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[2]                   ;
; 5.656 ; 5.814        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[3]                   ;
; 5.656 ; 5.814        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[6]                   ;
; 5.657 ; 5.815        ; 0.158          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[10]                  ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                               ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                                                                                                                                                                                                          ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]                                                                                          ;
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                                                                                                                ;
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                                                                                                                ;
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                                                                                                                ;
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                                                                                                                ;
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                                                                                                                ;
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                                                                                                                ;
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[7]                                                                                                                ;
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                                                                                                                ;
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                                                                                                                ;
; 17.340 ; 17.560       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                                                                                                                ;
; 17.341 ; 17.561       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[14]                                                                                                                                           ;
; 17.341 ; 17.561       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[5]                                                                                                                                            ;
; 17.341 ; 17.561       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[9]                                                                                                                                            ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[0]                                                                                                          ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[1]                                                                                                          ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[2]                                                                                                          ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[3]                                                                                                          ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_gah:cntr3|counter_reg_bit[0] ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_gah:cntr3|counter_reg_bit[1] ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_gah:cntr3|counter_reg_bit[2] ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_gah:cntr3|counter_reg_bit[3] ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4                             ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][0]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][1]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][2]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][3]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][4]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][5]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][6]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][7]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][0]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][1]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][2]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][3]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][4]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][5]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][6]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][7]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][0]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][1]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][2]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][3]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][4]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][5]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][6]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][7]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][0]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][1]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][2]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][3]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][4]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][5]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][6]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][7]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[5][0]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[5][1]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[5][2]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[5][3]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[5][4]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[5][5]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[5][6]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[5][7]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[8][0]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[8][1]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[8][2]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[8][3]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[8][4]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[8][5]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[8][6]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[8][7]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[9][0]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[9][1]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[9][2]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[9][3]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[9][4]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[9][5]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[9][6]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[9][7]                                                                                                   ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[0][0]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[0][1]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[0][2]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[0][3]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[0][4]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[0][5]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[0][6]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[0][7]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[1][0]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[1][1]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[1][2]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[1][3]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[1][4]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[1][5]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[1][6]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[1][7]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[2][0]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[2][1]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[2][2]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[2][3]                                                                                                  ;
; 17.345 ; 17.565       ; 0.220          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:pokey1_mirror|digit_reg[2][4]                                                                                                  ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                  ;
+--------+--------------+----------------+------------------+------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                        ; Clock Edge ; Target                                                                                             ;
+--------+--------------+----------------+------------------+------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------+
; 17.594 ; 17.594       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.594 ; 17.594       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.594 ; 17.594       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.594 ; 17.594       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.594 ; 17.594       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 17.599 ; 17.599       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.599 ; 17.599       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.604 ; 17.604       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.637 ; 17.637       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.642 ; 17.642       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.642 ; 17.642       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.646 ; 17.646       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.646 ; 17.646       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.646 ; 17.646       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.646 ; 17.646       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.646 ; 17.646       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
+--------+--------------+----------------+------------------+------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                            ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                       ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp2_prev~_emulated          ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf1                  ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[0]              ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[1]              ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[2]              ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[3]              ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_out[3]             ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                  ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                  ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                  ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                  ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[0]       ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[1]       ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[2]       ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[3]       ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[4]       ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[5]       ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[6]       ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[7]       ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[8]       ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[9]       ;
; 33.013 ; 33.233       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                         ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]                ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]                ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]                ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]                ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]                ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf2                 ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated          ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf2                  ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid             ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]                 ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                 ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                 ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch                       ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3           ;
; 33.014 ; 33.234       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4           ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[0]               ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[1]               ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[2]               ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[3]               ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[5]               ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[6]               ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[7]               ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[8]               ;
; 33.015 ; 33.235       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[9]               ;
; 33.017 ; 33.237       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~en                   ;
; 33.017 ; 33.237       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus~en                    ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[0]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[1]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[2]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[3]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[4]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[5]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[6]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[7]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[8]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[1]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[2]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[3]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]              ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                 ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf1                 ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~reg0                 ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                 ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus~reg0                  ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[0]           ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[1]           ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[2]           ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[3]           ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[4]           ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[5]           ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[6]           ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[7]           ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rden_sig                    ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                  ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle           ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send1      ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send2      ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_released ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start    ;
; 33.018 ; 33.238       ; 0.220          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send1          ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'altera_reserved_tck'                                                                                                                                                                                                                                                     ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock               ; Clock Edge ; Target                                                                                                                                                                                                                ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 49.470 ; 49.705       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.470 ; 49.705       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.472 ; 49.707       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.472 ; 49.707       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.473 ; 49.708       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.475 ; 49.710       ; 0.235          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.536 ; 49.756       ; 0.220          ; High Pulse Width ; altera_reserved_tck ; Fall       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.580 ; 49.768       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                             ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                             ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                             ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                                                             ;
; 49.581 ; 49.769       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                                                                                                                                                 ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                      ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[2]                                                                                                                      ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[3]                                                                                                                      ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[0]                                                                                                                 ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[1]                                                                                                                 ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[2]                                                                                                                 ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[3]                                                                                                                 ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8]                                                                                                                      ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ;
; 49.584 ; 49.772       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ;
; 49.585 ; 49.773       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.585 ; 49.773       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.585 ; 49.773       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.585 ; 49.773       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.585 ; 49.773       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.585 ; 49.773       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.585 ; 49.773       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.585 ; 49.773       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.587 ; 49.775       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.587 ; 49.775       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.587 ; 49.775       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.587 ; 49.775       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.587 ; 49.775       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.587 ; 49.775       ; 0.188          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                                                       ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                                                 ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------------------------------+
; 99.796  ; 99.796       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.796  ; 99.796       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.798  ; 99.798       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                                   ;
; 99.798  ; 99.798       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout                         ;
; 99.818  ; 99.818       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                       ;
; 99.850  ; 99.850       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 99.852  ; 99.852       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                                 ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                       ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                       ;
; 100.147 ; 100.147      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                                 ;
; 100.149 ; 100.149      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.182 ; 100.182      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                       ;
; 100.200 ; 100.200      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                                   ;
; 100.200 ; 100.200      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout                         ;
; 100.202 ; 100.202      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.202 ; 100.202      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                                               ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                            ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 2.724 ; 2.903 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.708 ; 2.887 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.717 ; 2.896 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.709 ; 2.888 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.708 ; 2.887 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.656 ; 2.834 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.717 ; 2.896 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.724 ; 2.903 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 4.084 ; 4.240 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 2.633 ; 2.821 ; Rise       ; altera_reserved_tck                                                           ;
; altera_reserved_tms ; altera_reserved_tck ; 7.754 ; 7.920 ; Rise       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 4.827 ; 5.292 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 1.086 ; 1.473 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 4.452 ; 4.917 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 1.151 ; 1.558 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 5.337 ; 5.800 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 1.508 ; 1.941 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -1.783 ; -1.961 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -1.828 ; -2.007 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -1.828 ; -2.007 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -1.828 ; -2.007 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -1.831 ; -2.010 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -1.840 ; -2.019 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -1.832 ; -2.011 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -1.831 ; -2.010 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -1.783 ; -1.961 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -1.840 ; -2.019 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -1.847 ; -2.026 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -1.842 ; -2.021 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -1.842 ; -2.021 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -1.842 ; -2.021 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -1.841 ; -2.020 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -1.841 ; -2.020 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -1.841 ; -2.020 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -3.097 ; -3.244 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; -0.198 ; -0.297 ; Rise       ; altera_reserved_tck                                                           ;
; altera_reserved_tms ; altera_reserved_tck ; -1.562 ; -1.685 ; Rise       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; -4.005 ; -4.454 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; -0.172 ; -0.538 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; -3.643 ; -4.093 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; -0.267 ; -0.653 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; -3.747 ; -4.223 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; -0.336 ; -0.722 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                    ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 5.688  ; 5.935  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 3.087  ; 2.874  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 3.087  ; 2.874  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 3.072  ; 2.859  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 2.251  ; 2.177  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 5.688  ; 5.935  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 3.073  ; 2.860  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 3.073  ; 2.860  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 5.701  ; 5.948  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 5.701  ; 5.948  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 2.264  ; 2.190  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 2.265  ; 2.191  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 3.085  ; 2.872  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 5.024  ; 5.448  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 5.024  ; 5.448  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 5.015  ; 5.439  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.410  ; 2.389  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 3.272  ; 3.118  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 3.086  ; 2.873  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 3.443  ; 3.298  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 5.008  ; 5.432  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 5.014  ; 5.438  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 3.442  ; 3.297  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 3.442  ; 3.297  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 3.086  ; 2.873  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 3.085  ; 2.872  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 5.703  ; 5.950  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 6.620  ; 6.993  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 4.756  ; 4.708  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 5.376  ; 5.349  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 4.842  ; 4.799  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 5.909  ; 5.858  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 11.879 ;        ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 12.229 ; Fall       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 4.868  ; 5.254  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 2.252  ; 2.178  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.868  ; 5.254  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 2.251  ; 2.177  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 2.254  ; 2.180  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 4.870  ; 5.256  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.870  ; 5.256  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 12.504 ; 13.475 ; Fall       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 5.962  ; 6.004  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 8.235  ; 8.230  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 8.849  ; 8.407  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 7.845  ; 7.847  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                            ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 1.524  ; 1.450  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 2.324  ; 2.116  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 2.324  ; 2.116  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 2.327  ; 2.119  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 2.327  ; 2.119  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 2.315  ; 2.107  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 2.315  ; 2.107  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 2.313  ; 2.105  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 1.524  ; 1.450  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 4.929  ; 5.181  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 2.314  ; 2.106  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 2.324  ; 2.116  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 2.314  ; 2.106  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 1.536  ; 1.462  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 4.941  ; 5.193  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 1.536  ; 1.462  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 1.538  ; 1.464  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 2.326  ; 2.118  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 1.683  ; 1.663  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.694  ; 2.556  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.694  ; 2.556  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.694  ; 2.556  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 4.297  ; 4.722  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 4.288  ; 4.713  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.683  ; 1.663  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.511  ; 2.364  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.326  ; 2.118  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.682  ; 2.544  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 4.281  ; 4.706  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.680  ; 2.542  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.680  ; 2.542  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.680  ; 2.542  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 4.287  ; 4.712  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.681  ; 2.543  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.681  ; 2.543  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 2.315  ; 2.107  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 2.326  ; 2.118  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 2.326  ; 2.118  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 4.943  ; 5.195  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 5.740  ; 6.113  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 3.845  ; 3.796  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 4.440  ; 4.411  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 3.927  ; 3.883  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 4.948  ; 4.903  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 11.092 ;        ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 11.443 ; Fall       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 1.524  ; 1.450  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 1.525  ; 1.451  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.141  ; 4.527  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 1.524  ; 1.450  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 1.527  ; 1.453  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 1.526  ; 1.452  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 1.526  ; 1.452  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 1.526  ; 1.452  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 1.526  ; 1.452  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.143  ; 4.529  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 10.183 ; 11.158 ; Fall       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 5.339  ; 5.379  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 7.512  ; 7.507  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 8.225  ; 7.783  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 7.137  ; 7.139  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                     ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.368 ; 3.292 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 4.897 ; 4.821 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 4.897 ; 4.821 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 4.897 ; 4.821 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.952 ; 7.313 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 7.304 ; 7.665 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.352 ; 4.266 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 4.371 ; 4.285 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 4.522 ; 4.374 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 4.319 ; 4.243 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.455 ; 6.816 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.684 ; 3.608 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.684 ; 3.608 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.684 ; 3.608 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.798 ; 6.159 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.368 ; 3.292 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.368 ; 3.292 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 5.124 ; 4.976 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 6.637 ; 6.561 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 7.888 ; 7.802 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 8.726 ; 9.087 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 7.864 ; 7.778 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                             ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.528 ; 2.452 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.996 ; 3.920 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.996 ; 3.920 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.996 ; 3.920 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.067 ; 6.428 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.404 ; 6.765 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.466 ; 3.380 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.484 ; 3.398 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.594 ; 3.446 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.441 ; 3.365 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.589 ; 5.950 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.832 ; 2.756 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.832 ; 2.756 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.832 ; 2.756 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.958 ; 5.319 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.528 ; 2.452 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.528 ; 2.452 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 4.172 ; 4.024 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.994 ; 5.918 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 7.187 ; 7.101 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 8.097 ; 8.458 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 7.163 ; 7.077 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                            ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.300     ; 3.376     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 4.799     ; 4.875     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 4.799     ; 4.875     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 4.799     ; 4.875     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 7.316     ; 6.955     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 7.663     ; 7.302     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.273     ; 4.359     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 4.281     ; 4.367     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 4.358     ; 4.506     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 4.230     ; 4.306     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 6.821     ; 6.460     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.617     ; 3.693     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.617     ; 3.693     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.617     ; 3.693     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 6.166     ; 5.805     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.300     ; 3.376     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.300     ; 3.376     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 5.063     ; 5.211     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 6.576     ; 6.652     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 7.803     ; 7.889     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 9.103     ; 8.742     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 7.775     ; 7.861     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                    ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.460     ; 2.536     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.899     ; 3.975     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.899     ; 3.975     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.899     ; 3.975     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.430     ; 6.069     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.764     ; 6.403     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.387     ; 3.473     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.394     ; 3.480     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.430     ; 3.578     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.353     ; 3.429     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.955     ; 5.594     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.764     ; 2.840     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.764     ; 2.840     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.764     ; 2.840     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.327     ; 4.966     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.460     ; 2.536     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.460     ; 2.536     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 4.107     ; 4.255     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.932     ; 6.008     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 7.102     ; 7.188     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 8.474     ; 8.113     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 7.075     ; 7.161     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+


----------------------------------------------
; Slow 1200mV 85C Model Metastability Report ;
----------------------------------------------
No synchronizer chains to report.


+---------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Fmax Summary                                                                                   ;
+------------+-----------------+-------------------------------------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                                                    ; Note ;
+------------+-----------------+-------------------------------------------------------------------------------+------+
; 55.03 MHz  ; 55.03 MHz       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 73.5 MHz   ; 73.5 MHz        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;      ;
; 117.32 MHz ; 117.32 MHz      ; altera_reserved_tck                                                           ;      ;
; 153.96 MHz ; 153.96 MHz      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;      ;
; 256.67 MHz ; 256.67 MHz      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;      ;
+------------+-----------------+-------------------------------------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup Summary                                                                     ;
+-------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                         ; Slack  ; End Point TNS ;
+-------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -8.312 ; -845.104      ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1.360  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.914  ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 26.530 ; 0.000         ;
; altera_reserved_tck                                                           ; 45.738 ; 0.000         ;
+-------------------------------------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold Summary                                                                     ;
+-------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                         ; Slack ; End Point TNS ;
+-------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.327 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.345 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 0.362 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.363 ; 0.000         ;
; altera_reserved_tck                                                           ; 0.363 ; 0.000         ;
+-------------------------------------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery Summary                                                                  ;
+-------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                         ; Slack  ; End Point TNS ;
+-------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 6.309  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.429  ; 0.000         ;
; altera_reserved_tck                                                           ; 48.032 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 63.834 ; 0.000         ;
+-------------------------------------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal Summary                                                                  ;
+-------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                         ; Slack ; End Point TNS ;
+-------------------------------------------------------------------------------+-------+---------------+
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 0.132 ; 0.000         ;
; altera_reserved_tck                                                           ; 1.149 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.337 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2.104 ; 0.000         ;
+-------------------------------------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width Summary                                                       ;
+-------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                         ; Slack  ; End Point TNS ;
+-------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.128  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.595  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.322 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; 17.589 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 32.949 ; 0.000         ;
; altera_reserved_tck                                                           ; 49.385 ; 0.000         ;
; FPGA_CLK                                                                      ; 99.778 ; 0.000         ;
+-------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                         ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                        ; To Node                                                                                                                 ; Launch Clock                                         ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; -8.312 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.070     ; 6.389      ;
; -8.081 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.747     ; 6.481      ;
; -8.005 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.715     ; 6.437      ;
; -7.976 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.693     ; 6.430      ;
; -7.897 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.715     ; 6.329      ;
; -7.892 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.716     ; 6.323      ;
; -7.835 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.095     ; 5.887      ;
; -7.793 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.694     ; 6.246      ;
; -7.756 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.683     ; 6.220      ;
; -7.741 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.715     ; 6.173      ;
; -7.725 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.715     ; 6.157      ;
; -7.673 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.741     ; 6.079      ;
; -7.662 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.707     ; 6.102      ;
; -7.623 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.694     ; 6.076      ;
; -7.558 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.075     ; 5.630      ;
; -7.532 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[2]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.090     ; 5.589      ;
; -7.528 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.764     ; 5.911      ;
; -7.474 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.694     ; 5.927      ;
; -7.463 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.717     ; 5.893      ;
; -7.461 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.764     ; 5.844      ;
; -7.422 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.710     ; 5.859      ;
; -7.407 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.090     ; 5.464      ;
; -7.371 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.745     ; 5.773      ;
; -7.355 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.710     ; 5.792      ;
; -7.338 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.088     ; 5.397      ;
; -7.329 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.707     ; 5.769      ;
; -7.321 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.707     ; 5.761      ;
; -7.303 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.716     ; 5.734      ;
; -7.303 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.717     ; 5.733      ;
; -7.302 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.717     ; 5.732      ;
; -7.298 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[42] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.716     ; 5.729      ;
; -7.298 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.090     ; 5.355      ;
; -7.274 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.689     ; 5.732      ;
; -7.264 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.689     ; 5.722      ;
; -7.259 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.707     ; 5.699      ;
; -7.216 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.087     ; 5.276      ;
; -7.192 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.746     ; 5.593      ;
; -7.192 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.732     ; 5.607      ;
; -7.191 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.693     ; 5.645      ;
; -7.183 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.689     ; 5.641      ;
; -7.169 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.095     ; 5.221      ;
; -7.149 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.087     ; 5.209      ;
; -7.125 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.732     ; 5.540      ;
; -7.118 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.717     ; 5.548      ;
; -7.118 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.717     ; 5.548      ;
; -7.117 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.717     ; 5.547      ;
; -7.116 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.717     ; 5.546      ;
; -7.115 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.717     ; 5.545      ;
; -7.114 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.717     ; 5.544      ;
; -7.112 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.715     ; 5.544      ;
; -7.111 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.715     ; 5.543      ;
; -7.062 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.715     ; 5.494      ;
; -7.054 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.724     ; 5.477      ;
; -7.043 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.095     ; 5.095      ;
; -7.035 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.711     ; 5.471      ;
; -7.017 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.699     ; 5.465      ;
; -6.993 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.087     ; 5.053      ;
; -6.987 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.724     ; 5.410      ;
; -6.976 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.095     ; 5.028      ;
; -6.969 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.731     ; 5.385      ;
; -6.968 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.711     ; 5.404      ;
; -6.965 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.716     ; 5.396      ;
; -6.954 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.711     ; 5.390      ;
; -6.953 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[17] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.716     ; 5.384      ;
; -6.951 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.699     ; 5.399      ;
; -6.930 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.689     ; 5.388      ;
; -6.919 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.111     ; 4.955      ;
; -6.917 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.758     ; 5.306      ;
; -6.903 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.731     ; 5.319      ;
; -6.887 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.711     ; 5.323      ;
; -6.864 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.095     ; 4.916      ;
; -6.861 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.732     ; 5.276      ;
; -6.859 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.111     ; 4.895      ;
; -6.853 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.111     ; 4.889      ;
; -6.850 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.758     ; 5.239      ;
; -6.835 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.734     ; 5.248      ;
; -6.817 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.723     ; 5.241      ;
; -6.798 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.710     ; 5.235      ;
; -6.796 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.715     ; 5.228      ;
; -6.794 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.732     ; 5.209      ;
; -6.793 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.111     ; 4.829      ;
; -6.790 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.734     ; 5.203      ;
; -6.787 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.710     ; 5.224      ;
; -6.769 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.109     ; 4.807      ;
; -6.768 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.734     ; 5.181      ;
; -6.751 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.723     ; 5.175      ;
; -6.749 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.107     ; 4.789      ;
; -6.742 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.095     ; 4.794      ;
; -6.739 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.715     ; 5.171      ;
; -6.732 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.710     ; 5.169      ;
; -6.731 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.094     ; 4.784      ;
; -6.723 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.734     ; 5.136      ;
; -6.721 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.710     ; 5.158      ;
; -6.711 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.094     ; 4.764      ;
; -6.702 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.109     ; 4.740      ;
; -6.699 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.733     ; 5.113      ;
; -6.694 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.095     ; 4.746      ;
; -6.682 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -2.107     ; 4.722      ;
; -6.677 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.732     ; 5.092      ;
; -6.668 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.709     ; 5.106      ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                     ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 1.360 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.159     ; 10.115     ;
; 1.387 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 10.077     ;
; 1.417 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.161     ; 10.056     ;
; 1.433 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.163     ; 10.038     ;
; 1.463 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.159     ; 10.012     ;
; 1.506 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.958      ;
; 1.519 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.171     ; 9.944      ;
; 1.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.171     ; 9.937      ;
; 1.532 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 9.929      ;
; 1.535 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.165     ; 9.934      ;
; 1.550 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.161     ; 9.923      ;
; 1.553 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.899      ;
; 1.558 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.906      ;
; 1.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.157     ; 9.908      ;
; 1.581 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.883      ;
; 1.599 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.175     ; 9.860      ;
; 1.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.160     ; 9.857      ;
; 1.629 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.171     ; 9.834      ;
; 1.639 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.169     ; 9.826      ;
; 1.649 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.815      ;
; 1.652 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.812      ;
; 1.653 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.799      ;
; 1.661 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.803      ;
; 1.673 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.791      ;
; 1.685 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 9.766      ;
; 1.690 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.160     ; 9.784      ;
; 1.701 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.177     ; 9.756      ;
; 1.716 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 9.745      ;
; 1.719 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.169     ; 9.746      ;
; 1.724 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.728      ;
; 1.735 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.169     ; 9.730      ;
; 1.747 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.705      ;
; 1.777 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 9.685      ;
; 1.793 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.155     ; 9.686      ;
; 1.805 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.181     ; 9.648      ;
; 1.813 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 9.648      ;
; 1.815 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.637      ;
; 1.818 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.634      ;
; 1.821 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.175     ; 9.638      ;
; 1.827 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.625      ;
; 1.839 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.613      ;
; 1.840 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.161     ; 9.633      ;
; 1.840 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.610      ;
; 1.856 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 9.606      ;
; 1.872 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.179     ; 9.583      ;
; 1.886 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.177     ; 9.571      ;
; 1.901 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[4]                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.549      ;
; 1.916 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 9.545      ;
; 1.940 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.175     ; 9.519      ;
; 1.942 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.508      ;
; 1.951 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.158     ; 9.525      ;
; 1.959 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.167     ; 9.508      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.185     ; 9.477      ;
; 1.975 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.160     ; 9.499      ;
; 2.006 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 9.455      ;
; 2.011 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.439      ;
; 2.022 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.171     ; 9.441      ;
; 2.023 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 9.438      ;
; 2.024 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.160     ; 9.450      ;
; 2.025 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[0]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.439      ;
; 2.032 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.171     ; 9.431      ;
; 2.034 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.416      ;
; 2.049 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.403      ;
; 2.064 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[5]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.386      ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.174     ; 9.394      ;
; 2.070 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.161     ; 9.403      ;
; 2.092 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 9.359      ;
; 2.096 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.368      ;
; 2.102 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.348      ;
; 2.105 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.175     ; 9.354      ;
; 2.105 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.345      ;
; 2.114 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.336      ;
; 2.117 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.347      ;
; 2.119 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.178     ; 9.337      ;
; 2.122 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.174     ; 9.338      ;
; 2.126 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.324      ;
; 2.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.171     ; 9.328      ;
; 2.141 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 9.321      ;
; 2.143 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.174     ; 9.317      ;
; 2.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.308      ;
; 2.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 9.303      ;
; 2.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.164     ; 9.319      ;
; 2.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[4]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.184     ; 9.299      ;
; 2.190 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 9.272      ;
; 2.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 9.271      ;
; 2.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 9.260      ;
; 2.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.170     ; 9.273      ;
; 2.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[0]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.261      ;
; 2.204 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 9.258      ;
; 2.207 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.177     ; 9.250      ;
; 2.222 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 9.239      ;
; 2.227 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.159     ; 9.248      ;
; 2.230 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.222      ;
; 2.234 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[18]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.160     ; 9.240      ;
; 2.241 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.169     ; 9.224      ;
; 2.243 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 9.208      ;
; 2.248 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.158     ; 9.228      ;
; 2.253 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 9.199      ;
; 2.259 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|sic_8xxx_enable                   ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.159     ; 9.216      ;
; 2.266 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[21]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.160     ; 9.208      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                          ;
+-------+-------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 4.914 ; svideo_yout_dly2[5]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.707      ;
; 4.916 ; svideo_yout_dly2[4]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.705      ;
; 5.007 ; svideo_yout_dly2[5]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.612      ;
; 5.009 ; svideo_yout_dly2[4]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.610      ;
; 5.015 ; svideo_yout_dly2[4]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.604      ;
; 5.019 ; svideo_yout_dly2[5]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.600      ;
; 5.054 ; svideo_yout_dly2[5]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.567      ;
; 5.056 ; svideo_yout_dly2[4]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.565      ;
; 5.099 ; svideo_yout_dly2[5]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.522      ;
; 5.101 ; svideo_yout_dly2[4]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.520      ;
; 5.105 ; svideo_yout_dly2[5]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.516      ;
; 5.107 ; svideo_yout_dly2[4]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.514      ;
; 5.185 ; svideo_yout_dly2[2]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.436      ;
; 5.192 ; svideo_yout_dly2[7]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.429      ;
; 5.207 ; svideo_yout_dly2[3]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.414      ;
; 5.210 ; svideo_yout_dly2[5]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.410      ;
; 5.212 ; svideo_yout_dly2[4]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.408      ;
; 5.213 ; svideo_yout_dly2[4]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.407      ;
; 5.214 ; svideo_yout_dly2[6]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.407      ;
; 5.217 ; svideo_yout_dly2[5]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.403      ;
; 5.278 ; svideo_yout_dly2[2]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.341      ;
; 5.283 ; svideo_yout_dly2[6]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.336      ;
; 5.284 ; svideo_yout_dly2[6]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.335      ;
; 5.285 ; svideo_yout_dly2[7]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.334      ;
; 5.286 ; svideo_yout_dly2[3]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.333      ;
; 5.287 ; svideo_yout_dly2[3]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.332      ;
; 5.290 ; svideo_yout_dly2[2]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.329      ;
; 5.297 ; svideo_yout_dly2[7]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 3.322      ;
; 5.325 ; svideo_yout_dly2[2]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.296      ;
; 5.332 ; svideo_yout_dly2[7]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.289      ;
; 5.347 ; svideo_yout_dly2[3]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.274      ;
; 5.354 ; svideo_yout_dly2[6]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.267      ;
; 5.370 ; svideo_yout_dly2[2]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.251      ;
; 5.376 ; svideo_yout_dly2[2]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.245      ;
; 5.377 ; svideo_yout_dly2[7]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.244      ;
; 5.383 ; svideo_yout_dly2[7]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.238      ;
; 5.387 ; svideo_yout_dly2[6]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.234      ;
; 5.390 ; svideo_yout_dly2[3]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.231      ;
; 5.390 ; svideo_yout_dly2[6]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.231      ;
; 5.393 ; svideo_yout_dly2[3]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 3.228      ;
; 5.481 ; svideo_yout_dly2[2]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.139      ;
; 5.482 ; svideo_yout_dly2[6]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.138      ;
; 5.485 ; svideo_yout_dly2[3]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.135      ;
; 5.488 ; svideo_yout_dly2[7]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.132      ;
; 5.503 ; svideo_yout_dly2[3]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.117      ;
; 5.510 ; svideo_yout_dly2[6]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.110      ;
; 5.517 ; svideo_yout_dly2[2]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.103      ;
; 5.524 ; svideo_yout_dly2[7]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 3.096      ;
; 5.816 ; svideo_yout_dly2[0]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 2.805      ;
; 5.820 ; svideo_yout_dly2[1]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 2.801      ;
; 5.866 ; svideo_yout_dly2[1]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 2.753      ;
; 5.867 ; svideo_yout_dly2[1]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 2.752      ;
; 5.909 ; svideo_yout_dly2[0]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 2.710      ;
; 5.921 ; svideo_yout_dly2[0]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.078     ; 2.698      ;
; 5.956 ; svideo_yout_dly2[0]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 2.665      ;
; 5.970 ; svideo_yout_dly2[1]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 2.651      ;
; 5.973 ; svideo_yout_dly2[1]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 2.648      ;
; 5.974 ; svideo_yout_dly2[1]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 2.647      ;
; 6.001 ; svideo_yout_dly2[0]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 2.620      ;
; 6.007 ; svideo_yout_dly2[0]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.076     ; 2.614      ;
; 6.065 ; svideo_yout_dly2[1]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 2.555      ;
; 6.103 ; svideo_yout_dly2[1]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 2.517      ;
; 6.112 ; svideo_yout_dly2[0]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 2.508      ;
; 6.132 ; svideo_yout_dly2[0]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.077     ; 2.488      ;
; 6.412 ; svideo:svideo|luma[2]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.236      ;
; 6.423 ; cvbs1_out[9]            ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.074     ; 2.200      ;
; 6.491 ; cvbs1_out[3]            ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.074     ; 2.132      ;
; 6.516 ; svideo:svideo|chroma[0] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.132      ;
; 6.522 ; cvbs1_out[4]            ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.074     ; 2.101      ;
; 6.523 ; luma_saturated[1]       ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.063     ; 2.223      ;
; 6.528 ; svideo:svideo|luma[2]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.120      ;
; 6.552 ; luma_saturated[1]       ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.063     ; 2.194      ;
; 6.557 ; svideo:svideo|luma[2]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.091      ;
; 6.562 ; cvbs1_out[2]            ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.074     ; 2.061      ;
; 6.569 ; svideo:svideo|luma[3]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.079      ;
; 6.598 ; svideo:svideo|luma[3]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.050      ;
; 6.618 ; svideo:svideo|luma_2[0] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.063     ; 2.128      ;
; 6.619 ; svideo:svideo|chroma[1] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.029      ;
; 6.619 ; svideo:svideo|luma[1]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.162     ; 2.028      ;
; 6.628 ; svideo:svideo|chroma[2] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.020      ;
; 6.628 ; luma_saturated[0]       ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.063     ; 2.118      ;
; 6.632 ; svideo:svideo|chroma[0] ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.016      ;
; 6.639 ; luma_saturated[1]       ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.063     ; 2.107      ;
; 6.644 ; svideo:svideo|luma[2]   ; luma_saturated[5]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.004      ;
; 6.648 ; svideo:svideo|chroma[1] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 2.000      ;
; 6.648 ; svideo:svideo|luma[1]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.162     ; 1.999      ;
; 6.661 ; svideo:svideo|chroma[0] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 1.987      ;
; 6.662 ; svideo:svideo|luma[0]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.162     ; 1.985      ;
; 6.668 ; luma_saturated[1]       ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.063     ; 2.078      ;
; 6.673 ; svideo:svideo|luma[2]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 1.975      ;
; 6.678 ; svideo:svideo|luma_2[4] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.062     ; 2.069      ;
; 6.679 ; svideo:svideo|luma[0]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.162     ; 1.968      ;
; 6.685 ; svideo:svideo|luma[3]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 1.963      ;
; 6.710 ; svideo:svideo|luma[4]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.162     ; 1.937      ;
; 6.714 ; svideo:svideo|luma[3]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 1.934      ;
; 6.715 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.062     ; 2.032      ;
; 6.718 ; cvbs1_out[5]            ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.075     ; 1.904      ;
; 6.734 ; svideo:svideo|luma_2[0] ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.063     ; 2.012      ;
; 6.735 ; svideo:svideo|chroma[1] ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.161     ; 1.913      ;
; 6.735 ; svideo:svideo|luma[1]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.162     ; 1.912      ;
+-------+-------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                 ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                     ; To Node                                            ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 26.530 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.717      ;
; 26.530 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.717      ;
; 26.646 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 6.490      ;
; 26.646 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 6.490      ;
; 26.818 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.429      ;
; 26.818 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.429      ;
; 26.820 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 6.316      ;
; 26.820 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 6.316      ;
; 26.939 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 6.197      ;
; 26.939 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 6.197      ;
; 26.988 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.259      ;
; 26.988 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.259      ;
; 27.067 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.180      ;
; 27.067 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.180      ;
; 27.104 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.143      ;
; 27.104 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.143      ;
; 27.121 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.126      ;
; 27.121 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.126      ;
; 27.137 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.999      ;
; 27.137 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.999      ;
; 27.201 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.046      ;
; 27.201 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 6.046      ;
; 27.221 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.915      ;
; 27.221 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.915      ;
; 27.283 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.853      ;
; 27.283 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.853      ;
; 27.311 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.825      ;
; 27.311 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.825      ;
; 27.355 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.169     ; 5.798      ;
; 27.355 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.169     ; 5.798      ;
; 27.355 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.169     ; 5.798      ;
; 27.355 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.169     ; 5.798      ;
; 27.355 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.169     ; 5.798      ;
; 27.392 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.855      ;
; 27.392 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.855      ;
; 27.430 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.706      ;
; 27.430 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.706      ;
; 27.437 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.699      ;
; 27.437 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.699      ;
; 27.457 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.679      ;
; 27.457 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.679      ;
; 27.492 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.755      ;
; 27.492 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.755      ;
; 27.502 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.634      ;
; 27.502 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.634      ;
; 27.560 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.592      ;
; 27.562 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.685      ;
; 27.562 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.685      ;
; 27.563 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.589      ;
; 27.563 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.589      ;
; 27.567 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.585      ;
; 27.567 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.585      ;
; 27.576 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.560      ;
; 27.576 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.560      ;
; 27.609 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.543      ;
; 27.610 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.080     ; 5.632      ;
; 27.626 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[0]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.090     ; 5.606      ;
; 27.641 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.606      ;
; 27.641 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.606      ;
; 27.692 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.087     ; 5.543      ;
; 27.693 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.087     ; 5.542      ;
; 27.693 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.087     ; 5.542      ;
; 27.695 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.552      ;
; 27.695 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.552      ;
; 27.712 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.424      ;
; 27.712 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.424      ;
; 27.734 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 5.510      ;
; 27.734 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.418      ;
; 27.737 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.415      ;
; 27.737 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.415      ;
; 27.739 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 5.505      ;
; 27.741 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.411      ;
; 27.741 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.411      ;
; 27.743 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 5.501      ;
; 27.744 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.078     ; 5.500      ;
; 27.747 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.186     ; 5.389      ;
; 27.751 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.476      ;
; 27.751 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.476      ;
; 27.751 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.476      ;
; 27.751 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.476      ;
; 27.751 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.476      ;
; 27.751 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.476      ;
; 27.751 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.476      ;
; 27.751 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.476      ;
; 27.751 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.095     ; 5.476      ;
; 27.755 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.397      ;
; 27.756 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.396      ;
; 27.756 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.396      ;
; 27.757 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.395      ;
; 27.758 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.394      ;
; 27.758 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.394      ;
; 27.760 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.392      ;
; 27.775 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.472      ;
; 27.775 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.472      ;
; 27.780 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.467      ;
; 27.780 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.075     ; 5.467      ;
; 27.783 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.369      ;
; 27.853 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.299      ;
; 27.856 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.296      ;
; 27.856 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.170     ; 5.296      ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                        ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 45.738 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.266      ; 4.527      ;
; 45.934 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.255      ; 4.320      ;
; 45.987 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.266      ; 4.278      ;
; 46.296 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.267      ; 3.970      ;
; 46.447 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.267      ; 3.819      ;
; 46.525 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.267      ; 3.741      ;
; 46.742 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 3.510      ;
; 46.756 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.266      ; 3.509      ;
; 46.908 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.263      ; 3.354      ;
; 46.910 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.273      ; 3.362      ;
; 46.974 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 3.278      ;
; 47.304 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 2.948      ;
; 47.524 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.266      ; 2.741      ;
; 47.584 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 2.668      ;
; 47.596 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 2.656      ;
; 47.632 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.253      ; 2.620      ;
; 47.714 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.265      ; 2.550      ;
; 47.815 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.265      ; 2.449      ;
; 47.978 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.266      ; 2.287      ;
; 48.042 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.261      ; 2.218      ;
; 48.180 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.260      ; 2.079      ;
; 48.368 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                               ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.268      ; 1.899      ;
; 48.654 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.268      ; 1.613      ;
; 48.666 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.268      ; 1.601      ;
; 95.640 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 4.049      ;
; 95.655 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 4.034      ;
; 95.659 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.311     ; 4.029      ;
; 95.668 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.311     ; 4.020      ;
; 95.727 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.962      ;
; 95.732 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.957      ;
; 95.735 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.954      ;
; 95.740 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.311     ; 3.948      ;
; 95.740 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.311     ; 3.948      ;
; 95.743 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.946      ;
; 95.743 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.311     ; 3.945      ;
; 95.765 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.311     ; 3.923      ;
; 95.772 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.917      ;
; 95.780 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.311     ; 3.908      ;
; 95.781 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.310     ; 3.908      ;
; 95.857 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.311     ; 3.831      ;
; 96.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 3.916      ;
; 96.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 3.916      ;
; 96.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 3.916      ;
; 96.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 3.916      ;
; 96.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 3.916      ;
; 96.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 3.916      ;
; 96.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 3.916      ;
; 96.030 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.053     ; 3.916      ;
; 96.104 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 3.844      ;
; 96.104 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 3.844      ;
; 96.104 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 3.844      ;
; 96.104 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 3.844      ;
; 96.104 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 3.844      ;
; 96.104 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 3.844      ;
; 96.104 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 3.844      ;
; 96.104 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 3.844      ;
; 96.110 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.832      ;
; 96.110 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.832      ;
; 96.110 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.832      ;
; 96.110 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.832      ;
; 96.110 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.832      ;
; 96.110 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.832      ;
; 96.110 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.832      ;
; 96.110 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.057     ; 3.832      ;
; 96.191 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 3.739      ;
; 96.191 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 3.739      ;
; 96.191 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 3.739      ;
; 96.191 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 3.739      ;
; 96.191 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 3.739      ;
; 96.205 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 3.744      ;
; 96.205 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 3.744      ;
; 96.205 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 3.744      ;
; 96.205 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 3.744      ;
; 96.205 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 3.744      ;
; 96.205 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 3.744      ;
; 96.205 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 3.744      ;
; 96.205 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.050     ; 3.744      ;
; 96.366 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 3.565      ;
; 96.366 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 3.565      ;
; 96.366 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 3.565      ;
; 96.366 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 3.565      ;
; 96.366 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 3.565      ;
; 96.370 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 3.560      ;
; 96.370 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 3.560      ;
; 96.370 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 3.560      ;
; 96.370 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 3.560      ;
; 96.370 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 3.560      ;
; 96.388 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.079     ; 3.532      ;
; 96.388 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.079     ; 3.532      ;
; 96.388 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.079     ; 3.532      ;
; 96.388 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.079     ; 3.532      ;
; 96.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.079     ; 3.506      ;
; 96.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.079     ; 3.506      ;
; 96.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[1]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.079     ; 3.506      ;
; 96.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.079     ; 3.506      ;
; 96.462 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 3.467      ;
; 96.462 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 3.467      ;
; 96.462 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 3.467      ;
; 96.462 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.070     ; 3.467      ;
; 96.473 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 3.458      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                             ;
+-------+---------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.327 ; svideo:svideo|luma[9]     ; svideo:svideo|luma_1[9]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.658      ;
; 0.328 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.659      ;
; 0.329 ; svideo:svideo|luma[8]     ; svideo:svideo|luma_1[8]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.660      ;
; 0.404 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.638      ;
; 0.405 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.639      ;
; 0.405 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.639      ;
; 0.406 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.640      ;
; 0.407 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.641      ;
; 0.407 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.641      ;
; 0.471 ; svideo:svideo|luma[0]     ; luma_saturated[0]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.802      ;
; 0.475 ; svideo:svideo|luma[0]     ; svideo:svideo|luma_1[0]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.806      ;
; 0.480 ; svideo:svideo|luma[7]     ; svideo:svideo|luma_1[7]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.811      ;
; 0.483 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.814      ;
; 0.484 ; svideo:svideo|luma[5]     ; svideo:svideo|luma_1[5]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.815      ;
; 0.487 ; svideo:svideo|luma[9]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.818      ;
; 0.544 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.777      ;
; 0.552 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.786      ;
; 0.557 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.791      ;
; 0.557 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.791      ;
; 0.558 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.792      ;
; 0.558 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.792      ;
; 0.559 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.793      ;
; 0.560 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.793      ;
; 0.579 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.813      ;
; 0.580 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.814      ;
; 0.581 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.815      ;
; 0.582 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.815      ;
; 0.583 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.817      ;
; 0.583 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.817      ;
; 0.584 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.817      ;
; 0.584 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.817      ;
; 0.589 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.823      ;
; 0.590 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.824      ;
; 0.594 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.828      ;
; 0.594 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.828      ;
; 0.609 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.843      ;
; 0.632 ; svideo:svideo|luma[6]     ; svideo:svideo|luma_1[6]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.963      ;
; 0.657 ; svideo:svideo|chroma[3]   ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.988      ;
; 0.661 ; svideo:svideo|chroma[5]   ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.992      ;
; 0.664 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.995      ;
; 0.665 ; svideo:svideo|chroma[8]   ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.996      ;
; 0.668 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 0.999      ;
; 0.669 ; svideo:svideo|chroma[8]   ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.000      ;
; 0.682 ; svideo:svideo|luma[0]     ; luma_saturated[1]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.013      ;
; 0.690 ; svideo:svideo|chroma[4]   ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.021      ;
; 0.691 ; svideo:svideo|chroma[6]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.022      ;
; 0.695 ; svideo:svideo|chroma[7]   ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.026      ;
; 0.696 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.027      ;
; 0.696 ; svideo:svideo|luma[5]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.027      ;
; 0.698 ; svideo:svideo|chroma[2]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.029      ;
; 0.700 ; svideo:svideo|luma[8]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.031      ;
; 0.701 ; svideo:svideo|luma[1]     ; luma_saturated[1]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.032      ;
; 0.720 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.954      ;
; 0.741 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.974      ;
; 0.743 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 0.978      ;
; 0.744 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.977      ;
; 0.751 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.985      ;
; 0.753 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.986      ;
; 0.754 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.987      ;
; 0.755 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 0.988      ;
; 0.756 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.990      ;
; 0.756 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.990      ;
; 0.756 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.990      ;
; 0.758 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.992      ;
; 0.758 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 0.992      ;
; 0.773 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 1.008      ;
; 0.786 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.019      ;
; 0.788 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.022      ;
; 0.837 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.143      ; 1.169      ;
; 0.846 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.143      ; 1.178      ;
; 0.867 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.143      ; 1.199      ;
; 0.875 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.109      ;
; 0.875 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.109      ;
; 0.882 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.116      ;
; 0.882 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.116      ;
; 0.882 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.116      ;
; 0.893 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.127      ;
; 0.893 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.127      ;
; 0.893 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.127      ;
; 0.935 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 1.170      ;
; 0.939 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.064      ; 1.174      ;
; 0.941 ; svideo:svideo|luma[7]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.272      ;
; 0.942 ; svideo:svideo|chroma[3]   ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.273      ;
; 0.942 ; svideo:svideo|chroma[1]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.273      ;
; 0.946 ; svideo:svideo|chroma[5]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.277      ;
; 0.949 ; svideo:svideo|luma[6]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.280      ;
; 0.953 ; svideo:svideo|luma[0]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.284      ;
; 0.954 ; svideo:svideo|chroma[4]   ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.285      ;
; 0.955 ; svideo:svideo|chroma[6]   ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.286      ;
; 0.965 ; svideo:svideo|luma[1]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.296      ;
; 0.967 ; svideo:svideo|luma[5]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.298      ;
; 0.968 ; svideo:svideo|luma[0]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.299      ;
; 0.969 ; svideo:svideo|luma[7]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.300      ;
; 0.969 ; svideo:svideo|chroma[2]   ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.300      ;
; 0.974 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.208      ;
; 0.974 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.208      ;
; 0.976 ; luma_saturated[5]         ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.062      ; 1.209      ;
; 0.982 ; svideo:svideo|luma[4]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.142      ; 1.313      ;
; 0.985 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.219      ;
; 0.985 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.063      ; 1.219      ;
+-------+---------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                  ; To Node                                                                                                                                                                                                                               ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.345 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[4]                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 0.935      ;
; 0.349 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[1]                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 0.939      ;
; 0.349 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[3]                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 0.939      ;
; 0.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[7]                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 0.945      ;
; 0.357 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[0]                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 0.947      ;
; 0.357 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[6]                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 0.947      ;
; 0.358 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[0]                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.386      ; 0.945      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                                                                                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[11]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[11]                                                                                                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[0]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                                                                                                    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[7]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[7]                                                                                                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player0|shift_reg[7]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player0|shift_reg[7]                                                                                                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[1]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[12]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[12]                                                                                                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[2]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[4]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                          ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                                                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|b_r[31]                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|b_r[31]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                                                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[0]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[0]                                                                                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[8]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[8]                                                                                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[4]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[4]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[5]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[5]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[6]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[6]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[7]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[7]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[0]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[5]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[5]                                                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[0]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[2]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[1]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[3]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[6]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[4]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[5]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[3]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[7]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_out_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_out_reg                                                                                                                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|twotone_reg                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|twotone_reg                                                                                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[4]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[4]                                                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[3]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[3]                                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_64_div|count_reg[0]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_64_div|count_reg[1]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_64_div|count_reg[1]                                                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[6]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[0]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[1]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[2]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[3]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[4]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[5]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[7]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[1]                                                                                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 0.597      ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                        ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                           ; To Node                                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.362 ; reset_usbdrv                                                        ; reset_usbdrv                                                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.362 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait1                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait1                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|val                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                    ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[1]                                                       ; cntr_reset[1]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[2]                                                       ; cntr_reset[2]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[5]                                                       ; cntr_reset[5]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; cntr_reset[6]                                                       ; cntr_reset[6]                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.Idle                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.Idle                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.reset_start           ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_send_com.reset_start           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[6]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[7]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[2]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[3]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[3]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[4]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[5]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_tosend[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp_previous                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm_previous                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm_previous                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start           ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt2_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt2_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt3_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt3_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3             ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3             ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_for_deviceconnect  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_for_deviceconnect  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|detach_ack                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|detach_ack                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait6                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait6                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_ack_end            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_ack_end            ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait2                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait2                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
+-------+---------------------------------------------------------------------+---------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                   ;
+-------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                       ; To Node                                                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.363 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                           ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.597      ;
; 0.374 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.608      ;
; 0.404 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 0.736      ;
; 0.407 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 0.739      ;
; 0.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 0.741      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 0.743      ;
; 0.442 ; seq_reg[9]                                                                                                      ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.675      ;
; 0.541 ; seq_reg[10]                                                                                                     ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.774      ;
; 0.548 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.782      ;
; 0.554 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.787      ;
; 0.554 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.787      ;
; 0.556 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                                                                       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.790      ;
; 0.568 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19] ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 0.900      ;
; 0.577 ; seq_reg[4]                                                                                                      ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.811      ;
; 0.583 ; seq_reg[5]                                                                                                      ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.817      ;
; 0.587 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.820      ;
; 0.588 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.822      ;
; 0.590 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.824      ;
; 0.592 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.826      ;
; 0.593 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.827      ;
; 0.594 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.828      ;
; 0.595 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.829      ;
; 0.596 ; seq_reg[7]                                                                                                      ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.829      ;
; 0.598 ; seq_reg[11]                                                                                                     ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.831      ;
; 0.600 ; seq_reg[8]                                                                                                      ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.833      ;
; 0.602 ; sdram_ctrl:sdram_controller|r_psel[0]                                                                           ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.836      ;
; 0.607 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.841      ;
; 0.613 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.847      ;
; 0.630 ; sdram_ctrl:sdram_controller|r_rd_reg                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.863      ;
; 0.635 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 0.967      ;
; 0.635 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 0.967      ;
; 0.638 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 0.871      ;
; 0.640 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 0.972      ;
; 0.640 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 0.972      ;
; 0.651 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.885      ;
; 0.667 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.901      ;
; 0.684 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.918      ;
; 0.692 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.024      ;
; 0.693 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.025      ;
; 0.694 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.928      ;
; 0.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.026      ;
; 0.696 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.028      ;
; 0.698 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24] ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.141      ; 1.029      ;
; 0.704 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.036      ;
; 0.704 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.036      ;
; 0.756 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.990      ;
; 0.756 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 0.990      ;
; 0.772 ; seq_reg[1]                                                                                                      ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.005      ;
; 0.775 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25] ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.107      ;
; 0.777 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16] ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.109      ;
; 0.777 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30] ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.141      ; 1.108      ;
; 0.778 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23] ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.141      ; 1.109      ;
; 0.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21] ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.112      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[26] ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.113      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28] ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.141      ; 1.112      ;
; 0.782 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31] ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.141      ; 1.113      ;
; 0.783 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17] ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.115      ;
; 0.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18] ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.117      ;
; 0.788 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[27] ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.120      ;
; 0.796 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]  ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.128      ;
; 0.799 ; seq_reg[0]                                                                                                      ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.033      ;
; 0.812 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.046      ;
; 0.816 ; seq_reg[10]                                                                                                     ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.065      ; 1.052      ;
; 0.830 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.063      ;
; 0.872 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10] ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.142      ; 1.204      ;
; 0.873 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 1.110      ;
; 0.874 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.108      ;
; 0.875 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 1.112      ;
; 0.875 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 1.112      ;
; 0.878 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.112      ;
; 0.879 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.113      ;
; 0.880 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.114      ;
; 0.881 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.115      ;
; 0.881 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.115      ;
; 0.882 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.116      ;
; 0.889 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.123      ;
; 0.891 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.125      ;
; 0.892 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.126      ;
; 0.892 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.126      ;
; 0.893 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.127      ;
; 0.896 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.129      ;
; 0.898 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.131      ;
; 0.913 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1                                                       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.147      ;
; 0.944 ; sdram_ctrl:sdram_controller|r_rd_reg                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.177      ;
; 0.945 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.145      ; 1.280      ;
; 0.946 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.145      ; 1.281      ;
; 0.973 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.207      ;
; 0.984 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.218      ;
; 0.989 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 1.221      ;
; 0.990 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.224      ;
; 0.991 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 1.225      ;
+-------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                             ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.363 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.597      ;
; 0.364 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.364 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.597      ;
; 0.374 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.608      ;
; 0.375 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.608      ;
; 0.375 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.608      ;
; 0.392 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.626      ;
; 0.392 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.626      ;
; 0.394 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.628      ;
; 0.398 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.631      ;
; 0.404 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.638      ;
; 0.404 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.638      ;
; 0.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.639      ;
; 0.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.639      ;
; 0.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.639      ;
; 0.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.639      ;
; 0.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.639      ;
; 0.405 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.639      ;
; 0.406 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.639      ;
; 0.406 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.639      ;
; 0.406 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.640      ;
; 0.407 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.641      ;
; 0.407 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.640      ;
; 0.407 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.640      ;
; 0.407 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.641      ;
; 0.408 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.642      ;
; 0.409 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.643      ;
; 0.409 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.643      ;
; 0.410 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.644      ;
; 0.412 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.645      ;
; 0.412 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.646      ;
; 0.413 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.646      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.647      ;
; 0.414 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.648      ;
; 0.415 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.649      ;
; 0.415 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.648      ;
; 0.416 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.650      ;
; 0.424 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.658      ;
; 0.425 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.659      ;
; 0.425 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.659      ;
; 0.425 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.659      ;
; 0.425 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.659      ;
; 0.425 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.659      ;
; 0.425 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.659      ;
; 0.427 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.660      ;
; 0.428 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.662      ;
; 0.429 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.662      ;
; 0.431 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[15]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.665      ;
; 0.445 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.679      ;
; 0.463 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.309      ; 0.973      ;
; 0.473 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.309      ; 0.983      ;
; 0.474 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 0.985      ;
; 0.478 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 0.989      ;
; 0.480 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.317      ; 0.998      ;
; 0.481 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 0.992      ;
; 0.486 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 0.997      ;
; 0.487 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 0.998      ;
; 0.487 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.309      ; 0.997      ;
; 0.487 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.004      ;
; 0.493 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.309      ; 1.003      ;
; 0.495 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.317      ; 1.013      ;
; 0.500 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.017      ;
; 0.501 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.309      ; 1.011      ;
; 0.502 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.019      ;
; 0.503 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.020      ;
; 0.505 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.316      ; 1.022      ;
; 0.507 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 1.018      ;
; 0.509 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 1.020      ;
; 0.510 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.743      ;
; 0.511 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.062      ; 0.744      ;
; 0.511 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.317      ; 1.029      ;
; 0.514 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.309      ; 1.024      ;
; 0.515 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.749      ;
; 0.515 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.749      ;
; 0.516 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.750      ;
; 0.516 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 0.750      ;
; 0.516 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.310      ; 1.027      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                      ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                                                                                    ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 6.309 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.137     ; 5.301      ;
; 6.311 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 5.290      ;
; 6.311 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 5.290      ;
; 6.312 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 5.289      ;
; 6.312 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 5.289      ;
; 6.312 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 5.289      ;
; 6.312 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 5.289      ;
; 6.312 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 5.289      ;
; 6.317 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 5.284      ;
; 6.317 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 5.284      ;
; 6.621 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[0]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.969      ;
; 6.621 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[1]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.969      ;
; 6.621 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[2]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.969      ;
; 6.621 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[3]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.969      ;
; 6.621 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[4]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.969      ;
; 6.621 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[5]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.969      ;
; 6.621 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[6]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.969      ;
; 6.621 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[7]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.969      ;
; 6.621 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.969      ;
; 6.621 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.969      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[4]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[5]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[6]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[7]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.978      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[0]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[1]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[2]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[3]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[4]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[5]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[6]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[7]                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.149     ; 4.976      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqen_reg[1]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqen_reg[0]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.622 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.976      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[1]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.976      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.976      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.976      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[4]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.976      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[5]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.976      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[6]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.976      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|enabled_out_reg                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.976      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0]          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[1]          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[2]          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[3]          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[4]          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[5]          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 4.978      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 4.978      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[2]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 4.978      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[3]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 4.978      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[4]                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.146     ; 4.978      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|enabled_out_reg                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.148     ; 4.976      ;
; 6.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|key_held_reg           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.147     ; 4.977      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[7]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.156     ; 4.967      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.157     ; 4.966      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.158     ; 4.965      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[3]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.158     ; 4.965      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[5]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.158     ; 4.965      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.158     ; 4.965      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.158     ; 4.965      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.156     ; 4.967      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[6]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.156     ; 4.967      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[3]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.156     ; 4.967      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[4]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.158     ; 4.965      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[6]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.158     ; 4.965      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.158     ; 4.965      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[0]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.158     ; 4.965      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[3]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.156     ; 4.967      ;
; 6.624 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[1]                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.156     ; 4.967      ;
+-------+---------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                         ;
+-------+------------------------+----------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                      ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+----------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 8.429 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.259     ; 2.941      ;
; 8.502 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.959      ;
; 8.502 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.959      ;
; 8.511 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.315     ; 2.801      ;
; 8.514 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.185     ; 2.935      ;
; 8.514 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.187     ; 2.933      ;
; 8.515 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.177     ; 2.942      ;
; 8.515 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.177     ; 2.942      ;
; 8.515 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.185     ; 2.934      ;
; 8.515 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.187     ; 2.932      ;
; 8.515 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.177     ; 2.942      ;
; 8.515 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.177     ; 2.942      ;
; 8.515 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.187     ; 2.932      ;
; 8.515 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.933      ;
; 8.515 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.933      ;
; 8.515 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.177     ; 2.942      ;
; 8.516 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.174     ; 2.944      ;
; 8.524 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.308     ; 2.795      ;
; 8.524 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.306     ; 2.797      ;
; 8.524 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.321     ; 2.782      ;
; 8.524 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.306     ; 2.797      ;
; 8.525 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.303     ; 2.799      ;
; 8.525 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.303     ; 2.799      ;
; 8.525 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.303     ; 2.799      ;
; 8.526 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.315     ; 2.786      ;
; 8.526 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.315     ; 2.786      ;
; 8.526 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.317     ; 2.784      ;
; 8.526 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.314     ; 2.787      ;
; 8.526 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.315     ; 2.786      ;
; 8.526 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.317     ; 2.784      ;
; 8.526 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.317     ; 2.784      ;
; 8.527 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.208     ; 2.901      ;
; 8.540 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.199     ; 2.897      ;
; 8.540 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.201     ; 2.895      ;
; 8.540 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.199     ; 2.897      ;
; 8.540 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.214     ; 2.882      ;
; 8.541 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.899      ;
; 8.541 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.899      ;
; 8.541 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.196     ; 2.899      ;
; 8.542 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.207     ; 2.887      ;
; 8.542 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.884      ;
; 8.542 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.884      ;
; 8.542 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.210     ; 2.884      ;
; 8.542 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.208     ; 2.886      ;
; 8.542 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.208     ; 2.886      ;
; 8.542 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.208     ; 2.886      ;
; 8.620 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 2.954      ;
; 8.620 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 2.954      ;
; 8.738 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.174     ; 2.722      ;
; 8.738 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.174     ; 2.722      ;
; 8.738 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.174     ; 2.722      ;
; 8.738 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.185     ; 2.711      ;
; 8.738 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.174     ; 2.722      ;
; 8.738 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.174     ; 2.722      ;
; 8.984 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 2.590      ;
; 8.984 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 2.590      ;
; 8.984 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 2.590      ;
; 8.984 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.172     ; 2.590      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.986 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.577      ;
; 8.996 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.183     ; 2.567      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.576      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.576      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.576      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.576      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.576      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.171     ; 2.578      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.171     ; 2.578      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.576      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.576      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.576      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 2.563      ;
; 8.997 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.173     ; 2.576      ;
+-------+------------------------+----------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                            ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 48.032 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.261      ; 2.228      ;
; 97.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 2.690      ;
; 97.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 2.690      ;
; 97.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 2.690      ;
; 97.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 2.690      ;
; 97.367 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 2.585      ;
; 97.367 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 2.585      ;
; 97.367 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 2.585      ;
; 97.367 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 2.585      ;
; 97.637 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 2.311      ;
; 97.637 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 2.311      ;
; 97.637 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 2.311      ;
; 97.637 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 2.311      ;
; 97.661 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.283      ;
; 97.661 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 2.283      ;
; 97.796 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 2.155      ;
; 97.796 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 2.155      ;
; 97.796 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 2.155      ;
; 97.796 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 2.155      ;
; 97.796 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 2.155      ;
; 97.796 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 2.155      ;
; 97.796 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 2.155      ;
; 97.796 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 2.155      ;
; 97.796 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 2.155      ;
; 97.821 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 2.127      ;
; 97.821 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 2.127      ;
; 97.821 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 2.127      ;
; 97.821 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 2.127      ;
; 97.846 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.059     ; 2.094      ;
; 97.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.049      ;
; 97.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.049      ;
; 97.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.049      ;
; 97.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.049      ;
; 97.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.049      ;
; 97.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.049      ;
; 97.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.049      ;
; 97.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.049      ;
; 97.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.049      ;
; 97.881 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.069     ; 2.049      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.972      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.972      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.972      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.972      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.972      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.972      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.972      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.972      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.972      ;
; 97.959 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.068     ; 1.972      ;
; 97.996 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.056     ; 1.947      ;
; 98.209 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.723      ;
; 98.209 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.723      ;
; 98.209 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.723      ;
; 98.209 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.067     ; 1.723      ;
; 98.226 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 1.722      ;
; 98.226 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 1.722      ;
; 98.226 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 1.722      ;
; 98.226 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 1.722      ;
; 98.226 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 1.722      ;
; 98.226 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 1.722      ;
; 98.226 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 1.722      ;
; 98.226 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 1.722      ;
; 98.226 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.051     ; 1.722      ;
; 98.229 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.715      ;
; 98.229 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.715      ;
; 98.229 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.715      ;
; 98.229 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.715      ;
; 98.229 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.715      ;
; 98.229 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.715      ;
; 98.229 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.055     ; 1.715      ;
; 98.231 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 1.719      ;
; 98.231 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 1.719      ;
; 98.231 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.049     ; 1.719      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.052     ; 1.685      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.052     ; 1.685      ;
; 98.262 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.052     ; 1.685      ;
; 98.281 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.054     ; 1.664      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
; 98.457 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.062     ; 1.480      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.079     ; 2.742      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.079     ; 2.742      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.079     ; 2.742      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.076     ; 2.745      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.079     ; 2.742      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.079     ; 2.742      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.076     ; 2.745      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.076     ; 2.745      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.079     ; 2.742      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.079     ; 2.742      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.079     ; 2.742      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.079     ; 2.742      ;
; 63.834 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.079     ; 2.742      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.076     ; 2.744      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.076     ; 2.744      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.077     ; 2.743      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.077     ; 2.743      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.077     ; 2.743      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.077     ; 2.743      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.077     ; 2.743      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.077     ; 2.743      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.077     ; 2.743      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.077     ; 2.743      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.078     ; 2.742      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.077     ; 2.743      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.077     ; 2.743      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.078     ; 2.742      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.078     ; 2.742      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.078     ; 2.742      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.078     ; 2.742      ;
; 63.835 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.078     ; 2.742      ;
; 65.593 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 3.125      ;
; 65.593 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 3.125      ;
; 65.964 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.060      ; 2.751      ;
; 65.964 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.060      ; 2.751      ;
; 65.964 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.060      ; 2.751      ;
; 65.964 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.060      ; 2.751      ;
; 65.964 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.060      ; 2.751      ;
; 65.964 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.062      ; 2.753      ;
; 65.964 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.062      ; 2.753      ;
; 65.964 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.062      ; 2.753      ;
; 65.964 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.062      ; 2.753      ;
; 65.964 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.060      ; 2.751      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.062      ; 2.752      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.062      ; 2.752      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.062      ; 2.752      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.062      ; 2.752      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
; 65.965 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 2.063      ; 2.753      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.132 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.581      ;
; 0.132 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.581      ;
; 0.132 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.581      ;
; 0.132 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.581      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.277      ; 2.581      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.277      ; 2.581      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.277      ; 2.581      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.277      ; 2.581      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.133 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.278      ; 2.582      ;
; 0.134 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.276      ; 2.581      ;
; 0.134 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.276      ; 2.581      ;
; 0.134 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.276      ; 2.581      ;
; 0.134 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.276      ; 2.581      ;
; 0.134 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.276      ; 2.581      ;
; 0.134 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.276      ; 2.581      ;
; 0.475 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.279      ; 2.925      ;
; 0.475 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 2.279      ; 2.925      ;
; 2.351 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.052      ; 2.574      ;
; 2.351 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.052      ; 2.574      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.574      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.574      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.574      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.574      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.574      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.051      ; 2.575      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.051      ; 2.575      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.051      ; 2.575      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.574      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.574      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.574      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.574      ;
; 2.353 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.574      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.575      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.575      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.575      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.575      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.048      ; 2.573      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.575      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.048      ; 2.573      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.048      ; 2.573      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.050      ; 2.575      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.048      ; 2.573      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.048      ; 2.573      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.048      ; 2.573      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.048      ; 2.573      ;
; 2.354 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.048      ; 2.573      ;
; 2.355 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.048      ; 2.574      ;
; 2.355 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.048      ; 2.574      ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                             ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.149  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.063      ; 1.383      ;
; 1.326  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.072      ; 1.569      ;
; 1.364  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.609      ;
; 1.364  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.609      ;
; 1.364  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.074      ; 1.609      ;
; 1.378  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.620      ;
; 1.378  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.620      ;
; 1.378  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.620      ;
; 1.378  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.620      ;
; 1.378  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.620      ;
; 1.378  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.620      ;
; 1.378  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 1.620      ;
; 1.379  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.625      ;
; 1.379  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.625      ;
; 1.379  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.625      ;
; 1.379  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.625      ;
; 1.379  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.625      ;
; 1.379  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.625      ;
; 1.379  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.625      ;
; 1.379  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.625      ;
; 1.379  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 1.625      ;
; 1.381  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 1.629      ;
; 1.381  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 1.629      ;
; 1.381  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.077      ; 1.629      ;
; 1.395  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.624      ;
; 1.395  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.624      ;
; 1.395  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.624      ;
; 1.395  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.624      ;
; 1.618  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.070      ; 1.859      ;
; 1.657  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.886      ;
; 1.657  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.886      ;
; 1.657  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.886      ;
; 1.657  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.886      ;
; 1.657  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.886      ;
; 1.657  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.886      ;
; 1.657  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.886      ;
; 1.657  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.886      ;
; 1.657  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.886      ;
; 1.657  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.058      ; 1.886      ;
; 1.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.066      ; 1.956      ;
; 1.731  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.959      ;
; 1.731  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.959      ;
; 1.731  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.959      ;
; 1.731  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.959      ;
; 1.731  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.959      ;
; 1.731  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.959      ;
; 1.731  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.959      ;
; 1.731  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.959      ;
; 1.731  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.959      ;
; 1.731  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.057      ; 1.959      ;
; 1.756  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 2.002      ;
; 1.756  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 2.002      ;
; 1.756  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 2.002      ;
; 1.756  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 2.002      ;
; 1.786  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.078      ; 2.035      ;
; 1.786  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.078      ; 2.035      ;
; 1.786  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.078      ; 2.035      ;
; 1.786  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.078      ; 2.035      ;
; 1.786  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.078      ; 2.035      ;
; 1.786  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.078      ; 2.035      ;
; 1.786  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.078      ; 2.035      ;
; 1.786  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.078      ; 2.035      ;
; 1.786  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.078      ; 2.035      ;
; 1.921  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.163      ;
; 1.921  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.071      ; 2.163      ;
; 1.956  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 2.202      ;
; 1.956  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 2.202      ;
; 1.956  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 2.202      ;
; 1.956  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.075      ; 2.202      ;
; 2.206  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.456      ;
; 2.206  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.456      ;
; 2.206  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.456      ;
; 2.206  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.456      ;
; 2.233  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.483      ;
; 2.233  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.483      ;
; 2.233  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.483      ;
; 2.233  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.079      ; 2.483      ;
; 51.543 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; -50.000      ; 0.393      ; 2.127      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 1.337 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.360      ; 1.865      ;
; 1.337 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.360      ; 1.865      ;
; 1.337 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.360      ; 1.865      ;
; 1.337 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.360      ; 1.865      ;
; 1.337 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.360      ; 1.865      ;
; 1.337 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.360      ; 1.865      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.347      ; 1.863      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.610 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.344      ; 2.122      ;
; 1.614 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.350      ; 2.132      ;
; 1.614 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.350      ; 2.132      ;
; 1.614 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.350      ; 2.132      ;
; 1.614 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.350      ; 2.132      ;
; 1.614 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.350      ; 2.132      ;
; 1.614 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.350      ; 2.132      ;
; 1.614 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.350      ; 2.132      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.369      ; 2.723      ;
; 2.890 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[5]                                                                                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.450      ; 3.511      ;
; 2.918 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[1]                                                                                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 3.519      ;
; 2.927 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.419      ; 3.517      ;
; 2.927 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.419      ; 3.517      ;
; 2.927 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.419      ; 3.517      ;
; 2.927 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[7]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.419      ; 3.517      ;
; 2.928 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.415      ; 3.514      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 2.104 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.104 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.134      ; 2.428      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.133      ; 2.428      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.133      ; 2.428      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.427      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.427      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.427      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.427      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.427      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.117      ; 2.412      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.137      ; 2.432      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.426      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.415      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.132      ; 2.427      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.130      ; 2.425      ;
; 2.105 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.133      ; 2.428      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.120      ; 2.425      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.436      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.436      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.436      ;
; 2.115 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.436      ;
; 2.345 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.111      ; 2.572      ;
; 2.345 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.111      ; 2.572      ;
; 2.345 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.111      ; 2.572      ;
; 2.345 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.100      ; 2.561      ;
; 2.345 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.111      ; 2.572      ;
; 2.345 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.111      ; 2.572      ;
; 2.477 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.798      ;
; 2.477 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.131      ; 2.798      ;
+-------+------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                         ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+---------------------------+
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.128 ; 4.346        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.129 ; 4.347        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.242 ; 4.393        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.242 ; 4.393        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.242 ; 4.393        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.242 ; 4.393        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.242 ; 4.393        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.243 ; 4.394        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.243 ; 4.394        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.243 ; 4.394        ; 0.151          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.260 ; 4.416        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[3]              ;
; 4.260 ; 4.416        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[4]              ;
; 4.260 ; 4.416        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[5]              ;
; 4.260 ; 4.416        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[6]              ;
; 4.260 ; 4.416        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[7]              ;
; 4.261 ; 4.417        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[0]              ;
; 4.261 ; 4.417        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[1]              ;
; 4.261 ; 4.417        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs2_out[2]              ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.274 ; 4.460        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.275 ; 4.461        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.275 ; 4.461        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.275 ; 4.461        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.275 ; 4.461        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.275 ; 4.461        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.275 ; 4.461        ; 0.186          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                         ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.595 ; 5.813        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                      ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                      ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[5]                                                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[6]                                                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[7]                                                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[8]                                                ;
; 5.596 ; 5.814        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[9]                                                ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.597 ; 5.815        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.598 ; 5.816        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.599 ; 5.817        ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ;
; 5.669 ; 5.825        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[13]                  ;
; 5.669 ; 5.825        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[14]                  ;
; 5.669 ; 5.825        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[15]                  ;
; 5.669 ; 5.825        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[8]                   ;
; 5.669 ; 5.825        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[9]                   ;
; 5.670 ; 5.826        ; 0.156          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[0]                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                        ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                                                                                                                  ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------+
; 17.322 ; 17.540       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ;
; 17.322 ; 17.540       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ;
; 17.322 ; 17.540       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ;
; 17.322 ; 17.540       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ;
; 17.322 ; 17.540       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ;
; 17.322 ; 17.540       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ;
; 17.322 ; 17.540       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ;
; 17.322 ; 17.540       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[7]                        ;
; 17.323 ; 17.541       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ;
; 17.323 ; 17.541       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ;
; 17.323 ; 17.541       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ;
; 17.326 ; 17.544       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ;
; 17.326 ; 17.544       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ;
; 17.326 ; 17.544       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ;
; 17.326 ; 17.544       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ;
; 17.327 ; 17.545       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ;
; 17.327 ; 17.545       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                     ;
; 17.327 ; 17.545       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[10]                                                   ;
; 17.327 ; 17.545       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[11]                                                   ;
; 17.327 ; 17.545       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[12]                                                   ;
; 17.327 ; 17.545       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[13]                                                   ;
; 17.327 ; 17.545       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[15]                                                   ;
; 17.327 ; 17.545       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[17]                                                   ;
; 17.327 ; 17.545       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[8]                                                    ;
; 17.327 ; 17.545       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                         ;
; 17.328 ; 17.546       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ;
; 17.328 ; 17.546       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ;
; 17.328 ; 17.546       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ;
; 17.328 ; 17.546       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ;
; 17.328 ; 17.546       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ;
; 17.328 ; 17.546       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ;
; 17.328 ; 17.546       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ;
; 17.328 ; 17.546       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ;
; 17.328 ; 17.546       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ;
; 17.328 ; 17.546       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[1]                 ;
; 17.329 ; 17.547       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|PC[10]      ;
; 17.329 ; 17.547       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|PC[2]       ;
; 17.329 ; 17.547       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]  ;
; 17.330 ; 17.548       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[5]                ;
; 17.330 ; 17.548       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ;
; 17.330 ; 17.548       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ;
; 17.330 ; 17.548       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ;
; 17.330 ; 17.548       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ;
; 17.330 ; 17.548       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ;
; 17.331 ; 17.549       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[20]                                                           ;
; 17.332 ; 17.550       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[14]                                                   ;
; 17.332 ; 17.550       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[5]                                                    ;
; 17.332 ; 17.550       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|mult_res1_r[9]                                                    ;
; 17.333 ; 17.551       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ;
; 17.333 ; 17.551       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ;
; 17.333 ; 17.551       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[17] ;
; 17.333 ; 17.551       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ;
; 17.333 ; 17.551       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[42] ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[12] ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|fetched_w_r[10]                                                   ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|fetched_w_r[11]                                                   ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|fetched_w_r[13]                                                   ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|fetched_w_r[15]                                                   ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|fetched_w_r[30]                                                   ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|fetched_w_r[6]                                                    ;
; 17.334 ; 17.552       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|fetched_w_r[7]                                                    ;
; 17.342 ; 17.560       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ;
; 17.342 ; 17.560       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ;
; 17.342 ; 17.560       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ;
; 17.342 ; 17.560       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][0]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][1]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][2]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][3]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][4]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][5]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][6]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[10][7]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][0]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][1]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][2]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][3]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][4]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][5]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][6]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[11][7]          ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][0]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][1]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][2]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][3]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][4]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][5]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][6]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[1][7]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][0]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][1]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][2]           ;
; 17.344 ; 17.562       ; 0.218          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:antic_mirror|digit_reg[2][3]           ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                   ;
+--------+--------------+----------------+------------------+------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                        ; Clock Edge ; Target                                                                                             ;
+--------+--------------+----------------+------------------+------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------+
; 17.589 ; 17.589       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.589 ; 17.589       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.589 ; 17.589       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.589 ; 17.589       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.589 ; 17.589       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 17.596 ; 17.596       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.596 ; 17.596       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.605 ; 17.605       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.637 ; 17.637       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.645 ; 17.645       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.645 ; 17.645       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.652 ; 17.652       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.652 ; 17.652       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.652 ; 17.652       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.652 ; 17.652       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.652 ; 17.652       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
+--------+--------------+----------------+------------------+------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                             ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                       ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+
; 32.949 ; 33.167       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf1                 ;
; 32.965 ; 33.183       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[0]               ;
; 32.965 ; 33.183       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[1]               ;
; 32.965 ; 33.183       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[2]               ;
; 32.965 ; 33.183       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[3]               ;
; 32.965 ; 33.183       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[5]               ;
; 32.965 ; 33.183       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[6]               ;
; 32.965 ; 33.183       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[7]               ;
; 32.965 ; 33.183       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[8]               ;
; 32.965 ; 33.183       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[9]               ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]                ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]                ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]                ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]                ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated          ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus_buf2                 ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated          ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp2_prev~_emulated          ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf2                  ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[0]       ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[1]       ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[2]       ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[3]       ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[4]       ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[5]       ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[6]       ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[7]       ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[8]       ;
; 32.966 ; 33.184       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits_receive[9]       ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]                ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus_buf1                  ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[0]              ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[1]              ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[2]              ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_out[3]              ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_out[3]             ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]                  ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]                  ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]                  ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]                  ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid             ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]                 ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]                 ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]                 ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch                       ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1           ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2           ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3           ;
; 32.967 ; 33.185       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4           ;
; 32.968 ; 33.186       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|val                         ;
; 32.970 ; 33.188       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~en                   ;
; 32.970 ; 33.188       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus~en                    ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[0]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[1]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[2]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[3]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[4]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[5]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[6]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[7]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[8]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[0]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[4]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[5]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[6]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_tosend[7]              ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm_previous                 ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dminus~reg0                 ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp_previous                 ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dplus~reg0                  ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[0]           ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[1]           ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[2]           ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[3]           ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[4]           ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[5]           ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[6]           ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_byte_tosend[7]           ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rden_sig                    ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame                  ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.Idle           ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send1      ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.end_send2      ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_released ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.reset_start    ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send1          ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send2          ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send3          ;
; 32.971 ; 33.189       ; 0.218          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_send_com.send_bit0      ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+--------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'                                                                                                                                                                                                                                                      ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock               ; Clock Edge ; Target                                                                                                                                                                                                                ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 49.385 ; 49.618       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.385 ; 49.618       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.386 ; 49.619       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.386 ; 49.619       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.387 ; 49.620       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.388 ; 49.621       ; 0.233          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.462 ; 49.680       ; 0.218          ; High Pulse Width ; altera_reserved_tck ; Fall       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                             ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                             ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                             ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                                                             ;
; 49.505 ; 49.691       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[0]                                                                                                                          ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[1]                                                                                                                          ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[2]                                                                                                                          ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_update_reg[3]                                                                                                                          ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                             ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                                                          ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                                                          ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ;
; 49.506 ; 49.692       ; 0.186          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                                                        ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                                                 ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------------------------------+
; 99.778  ; 99.778       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                                   ;
; 99.778  ; 99.778       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout                         ;
; 99.779  ; 99.779       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.779  ; 99.779       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.828  ; 99.828       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                       ;
; 99.856  ; 99.856       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                                 ;
; 99.857  ; 99.857       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                       ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                       ;
; 100.142 ; 100.142      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.143 ; 100.143      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                                 ;
; 100.172 ; 100.172      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                       ;
; 100.218 ; 100.218      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.218 ; 100.218      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 100.219 ; 100.219      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                                   ;
; 100.219 ; 100.219      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout                         ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                                               ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                            ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 2.399 ; 2.570 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.381 ; 2.552 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.381 ; 2.552 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.381 ; 2.552 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.384 ; 2.555 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.393 ; 2.564 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.386 ; 2.557 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.384 ; 2.555 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.334 ; 2.504 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.392 ; 2.563 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.399 ; 2.570 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.395 ; 2.566 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.395 ; 2.566 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.395 ; 2.566 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.393 ; 2.564 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.393 ; 2.564 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.393 ; 2.564 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 3.602 ; 3.808 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 2.641 ; 2.884 ; Rise       ; altera_reserved_tck                                                           ;
; altera_reserved_tms ; altera_reserved_tck ; 7.610 ; 7.740 ; Rise       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 4.256 ; 4.590 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 0.820 ; 1.110 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 3.903 ; 4.252 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 0.884 ; 1.199 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 4.706 ; 5.052 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 1.268 ; 1.604 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -1.561 ; -1.731 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -1.603 ; -1.774 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -1.603 ; -1.774 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -1.603 ; -1.774 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -1.606 ; -1.777 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -1.615 ; -1.786 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -1.608 ; -1.779 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -1.606 ; -1.777 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -1.561 ; -1.731 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -1.615 ; -1.786 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -1.622 ; -1.793 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -1.617 ; -1.788 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -1.617 ; -1.788 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -1.617 ; -1.788 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -1.616 ; -1.787 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -1.616 ; -1.787 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -1.616 ; -1.787 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -2.728 ; -2.925 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; -0.319 ; -0.453 ; Rise       ; altera_reserved_tck                                                           ;
; altera_reserved_tms ; altera_reserved_tck ; -1.706 ; -1.889 ; Rise       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; -3.527 ; -3.849 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; -0.010 ; -0.281 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; -3.187 ; -3.524 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; -0.102 ; -0.399 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; -3.289 ; -3.641 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; -0.224 ; -0.521 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                    ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 4.957  ; 5.132  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 2.750  ; 2.600  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 2.750  ; 2.600  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 2.754  ; 2.604  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 2.754  ; 2.604  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 2.742  ; 2.592  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 2.742  ; 2.592  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 2.740  ; 2.590  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 2.049  ; 1.992  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 4.957  ; 5.132  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 2.741  ; 2.591  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 2.750  ; 2.600  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 2.741  ; 2.591  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 4.968  ; 5.143  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 4.968  ; 5.143  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 2.060  ; 2.003  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 2.063  ; 2.006  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 2.753  ; 2.603  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 4.398  ; 4.731  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 3.061  ; 2.998  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 3.061  ; 2.998  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 3.061  ; 2.998  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 4.398  ; 4.731  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 4.389  ; 4.722  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.206  ; 2.169  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.930  ; 2.809  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.753  ; 2.603  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 3.049  ; 2.986  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 4.382  ; 4.715  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 3.047  ; 2.984  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 3.047  ; 2.984  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 3.047  ; 2.984  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 4.388  ; 4.721  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 3.048  ; 2.985  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 3.048  ; 2.985  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 2.742  ; 2.592  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 2.753  ; 2.603  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 2.753  ; 2.603  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 4.971  ; 5.146  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 5.925  ; 6.108  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 4.409  ; 4.277  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 4.992  ; 4.852  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 4.512  ; 4.345  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 5.349  ; 5.457  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 11.339 ;        ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 11.541 ; Fall       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 4.267  ; 4.535  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 2.050  ; 1.993  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.267  ; 4.535  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 2.049  ; 1.992  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 2.052  ; 1.995  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 4.269  ; 4.537  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 2.051  ; 1.994  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 2.051  ; 1.994  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 2.051  ; 1.994  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.269  ; 4.537  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 11.687 ; 12.413 ; Fall       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 5.444  ; 5.416  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 7.531  ; 7.423  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 7.780  ; 7.508  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 7.078  ; 7.177  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                            ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 1.411  ; 1.354  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 2.084  ; 1.937  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 2.084  ; 1.937  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 2.088  ; 1.941  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 2.088  ; 1.941  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 2.076  ; 1.929  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 2.076  ; 1.929  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 2.074  ; 1.927  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 1.411  ; 1.354  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 4.292  ; 4.470  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 2.075  ; 1.928  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 2.084  ; 1.937  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 2.075  ; 1.928  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 1.421  ; 1.364  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 4.302  ; 4.480  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 1.421  ; 1.364  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 1.424  ; 1.367  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 2.087  ; 1.940  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 1.567  ; 1.529  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.394  ; 2.333  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.394  ; 2.333  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.394  ; 2.333  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 3.759  ; 4.091  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 3.750  ; 4.082  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.567  ; 1.529  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.263  ; 2.144  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.087  ; 1.940  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.383  ; 2.322  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 3.744  ; 4.076  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.380  ; 2.319  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.380  ; 2.319  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.380  ; 2.319  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 3.750  ; 4.082  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.382  ; 2.321  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.382  ; 2.321  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 2.076  ; 1.929  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 2.087  ; 1.940  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 2.087  ; 1.940  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 4.305  ; 4.483  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 5.129  ; 5.314  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 3.585  ; 3.456  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 4.145  ; 4.007  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 3.684  ; 3.521  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 4.484  ; 4.590  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 10.628 ;        ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 10.832 ; Fall       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 1.411  ; 1.354  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 1.412  ; 1.355  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 3.629  ; 3.897  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 1.411  ; 1.354  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 1.413  ; 1.356  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 1.413  ; 1.356  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 1.413  ; 1.356  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 1.413  ; 1.356  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 1.413  ; 1.356  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 3.630  ; 3.898  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 9.397  ; 10.129 ; Fall       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 4.874  ; 4.848  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 6.873  ; 6.768  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 7.213  ; 6.938  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 6.438  ; 6.535  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                     ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 3.056 ; 3.007 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 4.489 ; 4.440 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 4.489 ; 4.440 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 4.489 ; 4.440 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.200 ; 6.463 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.526 ; 6.789 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 4.023 ; 3.913 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 4.047 ; 3.937 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 4.183 ; 4.055 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.946 ; 3.897 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.728 ; 5.991 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.349 ; 3.300 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.349 ; 3.300 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.349 ; 3.300 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.117 ; 5.380 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 3.056 ; 3.007 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 3.056 ; 3.007 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 4.756 ; 4.628 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 6.046 ; 5.997 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 7.191 ; 7.081 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 7.780 ; 8.043 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 7.171 ; 7.061 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                             ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.315 ; 2.266 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.691 ; 3.642 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.691 ; 3.642 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.691 ; 3.642 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.416 ; 5.679 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.729 ; 5.992 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.238 ; 3.128 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.262 ; 3.152 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.351 ; 3.223 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.169 ; 3.120 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.963 ; 5.226 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.596 ; 2.547 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.596 ; 2.547 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.596 ; 2.547 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.376 ; 4.639 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.315 ; 2.266 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.315 ; 2.266 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.902 ; 3.774 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.471 ; 5.422 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 6.567 ; 6.457 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 7.219 ; 7.482 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 6.548 ; 6.438 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                            ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.980     ; 3.029     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 4.318     ; 4.367     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 4.318     ; 4.367     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 4.318     ; 4.367     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 6.375     ; 6.112     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 6.691     ; 6.428     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.834     ; 3.944     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.841     ; 3.951     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.931     ; 4.059     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.818     ; 3.867     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.944     ; 5.681     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 3.265     ; 3.314     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 3.265     ; 3.314     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 3.265     ; 3.314     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 5.353     ; 5.090     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.980     ; 3.029     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.980     ; 3.029     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 4.567     ; 4.695     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.905     ; 5.954     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 7.016     ; 7.126     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 7.970     ; 7.707     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 6.988     ; 7.098     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                    ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 2.240     ; 2.289     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 3.524     ; 3.573     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 3.524     ; 3.573     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 3.524     ; 3.573     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 5.594     ; 5.331     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 5.898     ; 5.635     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 3.052     ; 3.162     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 3.059     ; 3.169     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 3.104     ; 3.232     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 3.045     ; 3.094     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 5.180     ; 4.917     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.514     ; 2.563     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.514     ; 2.563     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.514     ; 2.563     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 4.613     ; 4.350     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 2.240     ; 2.289     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 2.240     ; 2.289     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 3.715     ; 3.843     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 5.334     ; 5.383     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 6.394     ; 6.504     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 7.411     ; 7.148     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 6.367     ; 6.477     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+


---------------------------------------------
; Slow 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+--------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup Summary                                                                     ;
+-------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                         ; Slack  ; End Point TNS ;
+-------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -4.497 ; -456.625      ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 6.017  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 6.745  ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 29.746 ; 0.000         ;
; altera_reserved_tck                                                           ; 47.977 ; 0.000         ;
+-------------------------------------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold Summary                                                                     ;
+-------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                         ; Slack ; End Point TNS ;
+-------------------------------------------------------------------------------+-------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.136 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.140 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 0.167 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.187 ; 0.000         ;
; altera_reserved_tck                                                           ; 0.187 ; 0.000         ;
+-------------------------------------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery Summary                                                                  ;
+-------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                         ; Slack  ; End Point TNS ;
+-------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.617  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 9.866  ; 0.000         ;
; altera_reserved_tck                                                           ; 49.145 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 65.030 ; 0.000         ;
+-------------------------------------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal Summary                                                                  ;
+-------------------------------------------------------------------------------+-------+---------------+
; Clock                                                                         ; Slack ; End Point TNS ;
+-------------------------------------------------------------------------------+-------+---------------+
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 0.099 ; 0.000         ;
; altera_reserved_tck                                                           ; 0.580 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.705 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1.177 ; 0.000         ;
+-------------------------------------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width Summary                                                       ;
+-------------------------------------------------------------------------------+--------+---------------+
; Clock                                                                         ; Slack  ; End Point TNS ;
+-------------------------------------------------------------------------------+--------+---------------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.187  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.654  ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.369 ; 0.000         ;
; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; 17.601 ; 0.000         ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 33.038 ; 0.000         ;
; altera_reserved_tck                                                           ; 49.284 ; 0.000         ;
; FPGA_CLK                                                                      ; 99.418 ; 0.000         ;
+-------------------------------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                         ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                        ; To Node                                                                                                                 ; Launch Clock                                         ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; -4.497 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.219     ; 3.413      ;
; -4.319 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.061     ; 3.393      ;
; -4.259 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.038     ; 3.356      ;
; -4.253 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.046     ; 3.342      ;
; -4.243 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.046     ; 3.332      ;
; -4.202 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.046     ; 3.291      ;
; -4.190 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 3.278      ;
; -4.180 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.240     ; 3.075      ;
; -4.171 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.034     ; 3.272      ;
; -4.154 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.046     ; 3.243      ;
; -4.153 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.040     ; 3.248      ;
; -4.131 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.056     ; 3.210      ;
; -4.117 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.038     ; 3.214      ;
; -4.106 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.073     ; 3.168      ;
; -4.086 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[2]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.223     ; 2.998      ;
; -4.086 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.073     ; 3.148      ;
; -4.045 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.050     ; 3.130      ;
; -4.036 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[2]    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.234     ; 2.937      ;
; -4.027 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.040     ; 3.122      ;
; -4.025 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.050     ; 3.110      ;
; -3.993 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.235     ; 2.893      ;
; -3.985 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 3.073      ;
; -3.972 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.059     ; 3.048      ;
; -3.964 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.040     ; 3.059      ;
; -3.946 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.038     ; 3.043      ;
; -3.941 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.038     ; 3.038      ;
; -3.940 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.233     ; 2.842      ;
; -3.927 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 3.015      ;
; -3.926 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.231     ; 2.830      ;
; -3.923 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 3.011      ;
; -3.922 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 3.010      ;
; -3.921 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[42] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 3.009      ;
; -3.915 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.038     ; 3.012      ;
; -3.909 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.037     ; 3.007      ;
; -3.906 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.231     ; 2.810      ;
; -3.905 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.037     ; 3.003      ;
; -3.903 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.037     ; 3.001      ;
; -3.902 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[13] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.235     ; 2.802      ;
; -3.887 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.058     ; 2.964      ;
; -3.867 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.058     ; 2.944      ;
; -3.865 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.060     ; 2.940      ;
; -3.850 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.236     ; 2.749      ;
; -3.840 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.038     ; 2.937      ;
; -3.838 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.050     ; 2.923      ;
; -3.834 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.046     ; 2.923      ;
; -3.832 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.046     ; 2.921      ;
; -3.830 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.236     ; 2.729      ;
; -3.826 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.052     ; 2.909      ;
; -3.818 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.050     ; 2.903      ;
; -3.815 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.240     ; 2.710      ;
; -3.806 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.052     ; 2.889      ;
; -3.805 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 2.893      ;
; -3.804 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 2.892      ;
; -3.803 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 2.891      ;
; -3.802 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 2.890      ;
; -3.802 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 2.890      ;
; -3.802 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 2.890      ;
; -3.782 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.045     ; 2.872      ;
; -3.778 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.046     ; 2.867      ;
; -3.766 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.251     ; 2.650      ;
; -3.764 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.045     ; 2.854      ;
; -3.763 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.251     ; 2.647      ;
; -3.761 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.231     ; 2.665      ;
; -3.752 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.052     ; 2.835      ;
; -3.748 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 2.836      ;
; -3.748 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.251     ; 2.632      ;
; -3.746 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.068     ; 2.813      ;
; -3.745 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.251     ; 2.629      ;
; -3.743 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.059     ; 2.819      ;
; -3.743 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.057     ; 2.821      ;
; -3.742 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[17] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.047     ; 2.830      ;
; -3.732 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.052     ; 2.815      ;
; -3.731 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.037     ; 2.829      ;
; -3.726 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.068     ; 2.793      ;
; -3.725 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.057     ; 2.803      ;
; -3.723 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.059     ; 2.799      ;
; -3.719 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.239     ; 2.615      ;
; -3.707 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.239     ; 2.603      ;
; -3.706 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.051     ; 2.790      ;
; -3.688 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.051     ; 2.772      ;
; -3.677 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.058     ; 2.754      ;
; -3.673 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[6] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.239     ; 2.569      ;
; -3.669 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.247     ; 2.557      ;
; -3.667 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.235     ; 2.567      ;
; -3.666 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.246     ; 2.555      ;
; -3.658 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.044     ; 2.749      ;
; -3.657 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.049     ; 2.743      ;
; -3.657 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.058     ; 2.734      ;
; -3.650 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[7] ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.239     ; 2.546      ;
; -3.649 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.247     ; 2.537      ;
; -3.649 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.235     ; 2.549      ;
; -3.646 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[4]  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.246     ; 2.535      ;
; -3.644 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.059     ; 2.720      ;
; -3.642 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[7]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.239     ; 2.538      ;
; -3.642 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.059     ; 2.718      ;
; -3.641 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[12] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.046     ; 2.730      ;
; -3.639 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.049     ; 2.725      ;
; -3.637 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.052     ; 2.720      ;
; -3.631 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyright_out[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.058     ; 2.708      ;
; -3.630 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|joyleft_out[6]  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.298        ; -1.239     ; 2.526      ;
+--------+--------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                     ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 6.017 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.102     ; 5.567      ;
; 6.020 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.100     ; 5.566      ;
; 6.073 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.097     ; 5.516      ;
; 6.090 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.098     ; 5.498      ;
; 6.098 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.484      ;
; 6.108 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 5.469      ;
; 6.109 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.473      ;
; 6.111 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 5.468      ;
; 6.118 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.095     ; 5.473      ;
; 6.127 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.097     ; 5.462      ;
; 6.142 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.098     ; 5.446      ;
; 6.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.418      ;
; 6.167 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.097     ; 5.422      ;
; 6.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.103     ; 5.403      ;
; 6.181 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.105     ; 5.400      ;
; 6.188 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.103     ; 5.395      ;
; 6.189 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.111     ; 5.386      ;
; 6.197 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.105     ; 5.384      ;
; 6.200 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.111     ; 5.375      ;
; 6.207 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.103     ; 5.376      ;
; 6.209 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.102     ; 5.375      ;
; 6.218 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.364      ;
; 6.225 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.097     ; 5.364      ;
; 6.227 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.103     ; 5.356      ;
; 6.229 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.103     ; 5.354      ;
; 6.233 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.105     ; 5.348      ;
; 6.235 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.102     ; 5.349      ;
; 6.241 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.103     ; 5.342      ;
; 6.245 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.098     ; 5.343      ;
; 6.258 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.324      ;
; 6.271 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.305      ;
; 6.279 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.297      ;
; 6.281 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.112     ; 5.293      ;
; 6.284 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.292      ;
; 6.288 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.112     ; 5.286      ;
; 6.291 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.103     ; 5.292      ;
; 6.298 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.278      ;
; 6.313 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.095     ; 5.278      ;
; 6.316 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.266      ;
; 6.318 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.258      ;
; 6.320 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.256      ;
; 6.332 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.244      ;
; 6.336 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.105     ; 5.245      ;
; 6.337 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 5.242      ;
; 6.341 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 5.236      ;
; 6.344 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 5.235      ;
; 6.354 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.108     ; 5.224      ;
; 6.360 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.092     ; 5.234      ;
; 6.362 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.114     ; 5.210      ;
; 6.366 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.108     ; 5.212      ;
; 6.373 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.114     ; 5.199      ;
; 6.376 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[4]                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.114     ; 5.196      ;
; 6.382 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.194      ;
; 6.382 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.105     ; 5.199      ;
; 6.391 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 5.188      ;
; 6.397 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.185      ;
; 6.404 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.102     ; 5.180      ;
; 6.405 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.099     ; 5.182      ;
; 6.410 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.097     ; 5.179      ;
; 6.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.102     ; 5.172      ;
; 6.414 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.105     ; 5.167      ;
; 6.422 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.111     ; 5.153      ;
; 6.428 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[0]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.103     ; 5.155      ;
; 6.431 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 5.148      ;
; 6.433 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.111     ; 5.142      ;
; 6.434 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.112     ; 5.140      ;
; 6.442 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.102     ; 5.142      ;
; 6.444 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 5.129      ;
; 6.451 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.131      ;
; 6.452 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 5.121      ;
; 6.460 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.116      ;
; 6.461 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.115     ; 5.110      ;
; 6.463 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.108     ; 5.115      ;
; 6.466 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.105     ; 5.115      ;
; 6.471 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 5.102      ;
; 6.481 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.097     ; 5.108      ;
; 6.485 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.098     ; 5.103      ;
; 6.489 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 5.090      ;
; 6.491 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.091      ;
; 6.491 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 5.082      ;
; 6.493 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[17]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 5.080      ;
; 6.493 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.089      ;
; 6.498 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|sic_8xxx_enable                   ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.096     ; 5.092      ;
; 6.501 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.081      ;
; 6.504 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[1]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.072      ;
; 6.504 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.078      ;
; 6.505 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[21]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 5.068      ;
; 6.509 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.108     ; 5.069      ;
; 6.512 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.064      ;
; 6.513 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.095     ; 5.078      ;
; 6.516 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.105     ; 5.065      ;
; 6.519 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|CartLogic:emu_cart|oss_bank[0]                       ; sdram_ctrl:sdram_controller|r_sdram_addr[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.057      ;
; 6.521 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.112     ; 5.053      ;
; 6.531 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.045      ;
; 6.533 ; sdram_reset_n_reg                                                                                                                                 ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.106     ; 5.047      ;
; 6.537 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; sdram_ctrl:sdram_controller|r_sdram_addr[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.098     ; 5.051      ;
; 6.541 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; sdram_ctrl:sdram_controller|r_sdram_addr[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.112     ; 5.033      ;
; 6.542 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[5]                                           ; sdram_ctrl:sdram_controller|r_sdram_addr[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.114     ; 5.030      ;
; 6.549 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.104     ; 5.033      ;
; 6.551 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[18]                                                                                              ; sdram_ctrl:sdram_controller|r_sdram_addr[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 5.025      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                          ;
+-------+-------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node               ; To Node                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 6.745 ; svideo_yout_dly2[5]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.045     ; 1.959      ;
; 6.746 ; svideo_yout_dly2[4]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.045     ; 1.958      ;
; 6.792 ; svideo_yout_dly2[5]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.909      ;
; 6.793 ; svideo_yout_dly2[4]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.908      ;
; 6.794 ; svideo_yout_dly2[5]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.907      ;
; 6.795 ; svideo_yout_dly2[4]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.906      ;
; 6.839 ; svideo_yout_dly2[5]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.864      ;
; 6.840 ; svideo_yout_dly2[4]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.863      ;
; 6.851 ; svideo_yout_dly2[5]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.852      ;
; 6.852 ; svideo_yout_dly2[4]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.851      ;
; 6.854 ; svideo_yout_dly2[5]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.849      ;
; 6.855 ; svideo_yout_dly2[4]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.848      ;
; 6.868 ; svideo_yout_dly2[2]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.045     ; 1.836      ;
; 6.870 ; svideo_yout_dly2[7]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.045     ; 1.834      ;
; 6.889 ; svideo_yout_dly2[6]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.045     ; 1.815      ;
; 6.889 ; svideo_yout_dly2[3]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.045     ; 1.815      ;
; 6.909 ; svideo_yout_dly2[5]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.794      ;
; 6.910 ; svideo_yout_dly2[4]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.793      ;
; 6.915 ; svideo_yout_dly2[2]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.786      ;
; 6.917 ; svideo_yout_dly2[5]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.786      ;
; 6.917 ; svideo_yout_dly2[7]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.784      ;
; 6.917 ; svideo_yout_dly2[2]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.784      ;
; 6.918 ; svideo_yout_dly2[4]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.785      ;
; 6.919 ; svideo_yout_dly2[7]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.782      ;
; 6.936 ; svideo_yout_dly2[6]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.765      ;
; 6.936 ; svideo_yout_dly2[3]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.765      ;
; 6.938 ; svideo_yout_dly2[6]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.763      ;
; 6.938 ; svideo_yout_dly2[3]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.763      ;
; 6.962 ; svideo_yout_dly2[2]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.741      ;
; 6.964 ; svideo_yout_dly2[7]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.739      ;
; 6.974 ; svideo_yout_dly2[2]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.729      ;
; 6.976 ; svideo_yout_dly2[7]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.727      ;
; 6.977 ; svideo_yout_dly2[2]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.726      ;
; 6.979 ; svideo_yout_dly2[7]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.724      ;
; 6.983 ; svideo_yout_dly2[6]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.720      ;
; 6.983 ; svideo_yout_dly2[3]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.720      ;
; 6.995 ; svideo_yout_dly2[6]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.708      ;
; 6.995 ; svideo_yout_dly2[3]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.708      ;
; 6.998 ; svideo_yout_dly2[6]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.705      ;
; 6.998 ; svideo_yout_dly2[3]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.705      ;
; 7.032 ; svideo_yout_dly2[2]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.671      ;
; 7.034 ; svideo_yout_dly2[7]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.669      ;
; 7.040 ; svideo_yout_dly2[2]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.663      ;
; 7.042 ; svideo_yout_dly2[7]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.661      ;
; 7.053 ; svideo_yout_dly2[6]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.650      ;
; 7.053 ; svideo_yout_dly2[3]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.650      ;
; 7.061 ; svideo_yout_dly2[6]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.642      ;
; 7.061 ; svideo_yout_dly2[3]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.642      ;
; 7.210 ; svideo_yout_dly2[0]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.045     ; 1.494      ;
; 7.212 ; svideo_yout_dly2[1]     ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.045     ; 1.492      ;
; 7.257 ; svideo_yout_dly2[0]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.444      ;
; 7.259 ; svideo_yout_dly2[0]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.442      ;
; 7.278 ; svideo_yout_dly2[1]     ; cvbs2_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.423      ;
; 7.280 ; svideo_yout_dly2[1]     ; cvbs2_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.048     ; 1.421      ;
; 7.304 ; svideo_yout_dly2[0]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.399      ;
; 7.314 ; svideo_yout_dly2[1]     ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.389      ;
; 7.316 ; svideo_yout_dly2[0]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.387      ;
; 7.319 ; svideo_yout_dly2[0]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.384      ;
; 7.332 ; svideo_yout_dly2[1]     ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.371      ;
; 7.335 ; svideo_yout_dly2[1]     ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.368      ;
; 7.374 ; svideo_yout_dly2[0]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.329      ;
; 7.382 ; svideo_yout_dly2[0]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.321      ;
; 7.395 ; svideo_yout_dly2[1]     ; cvbs2_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.308      ;
; 7.396 ; svideo_yout_dly2[1]     ; cvbs2_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.046     ; 1.307      ;
; 7.463 ; svideo:svideo|luma[2]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.237      ;
; 7.511 ; cvbs1_out[9]            ; cvbs2_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.043     ; 1.195      ;
; 7.527 ; svideo:svideo|luma[2]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.173      ;
; 7.531 ; svideo:svideo|luma[2]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.169      ;
; 7.532 ; luma_saturated[1]       ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.036     ; 1.229      ;
; 7.536 ; luma_saturated[1]       ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.036     ; 1.225      ;
; 7.589 ; svideo:svideo|chroma[1] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.111      ;
; 7.592 ; cvbs1_out[3]            ; cvbs2_out[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.044     ; 1.113      ;
; 7.593 ; svideo:svideo|chroma[1] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.107      ;
; 7.595 ; svideo:svideo|luma[2]   ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.105      ;
; 7.595 ; svideo:svideo|luma[3]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.105      ;
; 7.597 ; svideo:svideo|chroma[0] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.103      ;
; 7.599 ; svideo:svideo|luma[2]   ; luma_saturated[5]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.101      ;
; 7.600 ; luma_saturated[1]       ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.036     ; 1.161      ;
; 7.604 ; luma_saturated[1]       ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.036     ; 1.157      ;
; 7.610 ; cvbs1_out[4]            ; cvbs2_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.044     ; 1.095      ;
; 7.611 ; cvbs1_out[2]            ; cvbs2_out[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.044     ; 1.094      ;
; 7.617 ; svideo:svideo|luma[1]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.098     ; 1.082      ;
; 7.626 ; svideo:svideo|chroma[0] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.074      ;
; 7.631 ; svideo:svideo|luma[0]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.098     ; 1.068      ;
; 7.640 ; svideo:svideo|luma[3]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.060      ;
; 7.646 ; svideo:svideo|luma[4]   ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.098     ; 1.053      ;
; 7.649 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.034     ; 1.114      ;
; 7.652 ; svideo:svideo|luma[1]   ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.098     ; 1.047      ;
; 7.653 ; svideo:svideo|luma_2[1] ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.034     ; 1.110      ;
; 7.657 ; svideo:svideo|chroma[1] ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.043      ;
; 7.657 ; svideo:svideo|chroma[3] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.043      ;
; 7.657 ; svideo:svideo|luma_2[0] ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.035     ; 1.105      ;
; 7.660 ; luma_saturated[5]       ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.036     ; 1.101      ;
; 7.661 ; svideo:svideo|chroma[1] ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.039      ;
; 7.661 ; svideo:svideo|chroma[3] ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.039      ;
; 7.661 ; svideo:svideo|chroma[2] ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.039      ;
; 7.662 ; luma_saturated[0]       ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.036     ; 1.099      ;
; 7.663 ; svideo:svideo|luma[2]   ; luma_saturated[4]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.037      ;
; 7.663 ; svideo:svideo|luma[3]   ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.097     ; 1.037      ;
; 7.664 ; luma_saturated[5]       ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 8.810        ; -0.036     ; 1.097      ;
+-------+-------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                 ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                     ; To Node                                            ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 29.746 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.559      ;
; 29.746 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.559      ;
; 29.882 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.451      ;
; 29.882 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.451      ;
; 29.923 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.382      ;
; 29.923 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.382      ;
; 29.992 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.341      ;
; 29.992 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.341      ;
; 30.024 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.281      ;
; 30.024 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.281      ;
; 30.047 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.258      ;
; 30.047 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.258      ;
; 30.052 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.281      ;
; 30.052 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.281      ;
; 30.061 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.244      ;
; 30.061 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.244      ;
; 30.062 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.243      ;
; 30.062 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.243      ;
; 30.109 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.196      ;
; 30.109 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.196      ;
; 30.145 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.188      ;
; 30.145 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.188      ;
; 30.163 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.170      ;
; 30.163 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.170      ;
; 30.194 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.111      ;
; 30.194 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.111      ;
; 30.224 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.109      ;
; 30.224 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.109      ;
; 30.228 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[0]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.016     ; 3.066      ;
; 30.230 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 3.066      ;
; 30.231 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 3.065      ;
; 30.231 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 3.065      ;
; 30.238 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.095      ;
; 30.238 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.095      ;
; 30.241 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.064      ;
; 30.241 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.064      ;
; 30.248 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.033      ; 3.095      ;
; 30.248 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.033      ; 3.095      ;
; 30.248 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.033      ; 3.095      ;
; 30.248 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.033      ; 3.095      ;
; 30.248 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|send_frame   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.033      ; 3.095      ;
; 30.251 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.010     ; 3.049      ;
; 30.251 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.009     ; 3.050      ;
; 30.256 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.009     ; 3.045      ;
; 30.278 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.009     ; 3.023      ;
; 30.280 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.009     ; 3.021      ;
; 30.295 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.010      ;
; 30.295 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 3.010      ;
; 30.301 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.032      ;
; 30.301 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.032      ;
; 30.304 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.029      ;
; 30.304 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.029      ;
; 30.308 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[2]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.020     ; 2.982      ;
; 30.308 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.020     ; 2.982      ;
; 30.308 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.020     ; 2.982      ;
; 30.308 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.020     ; 2.982      ;
; 30.308 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.020     ; 2.982      ;
; 30.308 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.020     ; 2.982      ;
; 30.308 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.020     ; 2.982      ;
; 30.308 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[12]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.020     ; 2.982      ;
; 30.308 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|send_frame   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.020     ; 2.982      ;
; 30.317 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.016      ;
; 30.317 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.016      ;
; 30.322 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 3.022      ;
; 30.328 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.005      ;
; 30.328 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 3.005      ;
; 30.329 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 3.015      ;
; 30.330 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 3.014      ;
; 30.334 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 2.971      ;
; 30.334 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 2.971      ;
; 30.341 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[6]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 2.955      ;
; 30.341 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 2.955      ;
; 30.341 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 2.955      ;
; 30.342 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 2.954      ;
; 30.343 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 2.953      ;
; 30.343 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.014     ; 2.953      ;
; 30.348 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.996      ;
; 30.348 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.996      ;
; 30.349 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.995      ;
; 30.368 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 2.937      ;
; 30.368 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 2.937      ;
; 30.375 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.009     ; 2.926      ;
; 30.380 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 2.953      ;
; 30.380 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.023      ; 2.953      ;
; 30.388 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 2.917      ;
; 30.388 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 2.917      ;
; 30.398 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 2.907      ;
; 30.398 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.005     ; 2.907      ;
; 30.398 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; -0.010     ; 2.902      ;
; 30.415 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.929      ;
; 30.422 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.922      ;
; 30.423 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.921      ;
; 30.441 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.903      ;
; 30.441 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.903      ;
; 30.442 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[13]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.902      ;
; 30.442 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[7]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.902      ;
; 30.444 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.900      ;
; 30.445 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[8]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.899      ;
; 30.445 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.899      ;
; 30.445 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 33.333       ; 0.034      ; 2.899      ;
+--------+-----------------------------------------------+----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                                                                                                                        ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 47.977 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.447      ; 2.457      ;
; 48.081 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.439      ; 2.345      ;
; 48.101 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.447      ; 2.333      ;
; 48.283 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.448      ; 2.152      ;
; 48.303 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.448      ; 2.132      ;
; 48.416 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.448      ; 2.019      ;
; 48.516 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.908      ;
; 48.523 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.447      ; 1.911      ;
; 48.599 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.453      ; 1.841      ;
; 48.618 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.442      ; 1.811      ;
; 48.674 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                              ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.750      ;
; 48.850 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                   ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.574      ;
; 48.931 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.447      ; 1.503      ;
; 49.039 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.446      ; 1.394      ;
; 49.047 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.377      ;
; 49.053 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.371      ;
; 49.070 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.437      ; 1.354      ;
; 49.139 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.446      ; 1.294      ;
; 49.197 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.447      ; 1.237      ;
; 49.219 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.441      ; 1.209      ;
; 49.290 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.441      ; 1.138      ;
; 49.429 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                               ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.449      ; 1.007      ;
; 49.586 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.449      ; 0.850      ;
; 49.587 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|design_hash_reg[0]                                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.449      ; 0.849      ;
; 97.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.029     ; 2.142      ;
; 97.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.029     ; 2.142      ;
; 97.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.029     ; 2.142      ;
; 97.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.029     ; 2.142      ;
; 97.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.029     ; 2.142      ;
; 97.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.029     ; 2.142      ;
; 97.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.029     ; 2.142      ;
; 97.816 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.029     ; 2.142      ;
; 97.834 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.977      ;
; 97.835 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.177     ; 1.975      ;
; 97.842 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.969      ;
; 97.843 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.177     ; 1.967      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 2.080      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 2.080      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 2.080      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 2.080      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 2.080      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 2.080      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 2.080      ;
; 97.880 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 2.080      ;
; 97.881 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.930      ;
; 97.887 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.924      ;
; 97.888 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.923      ;
; 97.893 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.918      ;
; 97.893 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.177     ; 1.917      ;
; 97.893 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.177     ; 1.917      ;
; 97.897 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.177     ; 1.913      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 2.041      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 2.041      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 2.041      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 2.041      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.049      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.049      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.049      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.049      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.049      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.049      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.049      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.034     ; 2.049      ;
; 97.904 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 2.041      ;
; 97.908 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.177     ; 1.902      ;
; 97.911 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.900      ;
; 97.917 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.177     ; 1.893      ;
; 97.919 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.176     ; 1.892      ;
; 97.957 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.004      ;
; 97.957 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.004      ;
; 97.957 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.004      ;
; 97.957 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.004      ;
; 97.957 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.004      ;
; 97.957 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.004      ;
; 97.957 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.004      ;
; 97.957 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 2.004      ;
; 97.962 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.177     ; 1.848      ;
; 97.987 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.958      ;
; 97.987 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.958      ;
; 97.987 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.958      ;
; 97.987 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.958      ;
; 97.987 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.958      ;
; 98.020 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 1.940      ;
; 98.037 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.908      ;
; 98.037 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.908      ;
; 98.037 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.908      ;
; 98.037 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.908      ;
; 98.037 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.908      ;
; 98.047 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.898      ;
; 98.047 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.898      ;
; 98.047 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.898      ;
; 98.047 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                                                                ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.898      ;
; 98.048 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[3]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 1.891      ;
; 98.048 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[2]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 1.891      ;
; 98.048 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[1]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 1.891      ;
; 98.048 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                        ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|identity_contrib_shift_reg[0]                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.048     ; 1.891      ;
; 98.052 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 1.888      ;
; 98.052 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 1.888      ;
; 98.052 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 1.888      ;
; 98.052 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8]                                                                                                                 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.047     ; 1.888      ;
+--------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.136 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[1]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.464      ;
; 0.137 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[3]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.465      ;
; 0.139 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[4]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.467      ;
; 0.140 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[7]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.468      ;
; 0.142 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.470      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.475      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.473      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.472      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.472      ;
; 0.150 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.473      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[5]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.481      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.476      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.477      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.479      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.478      ;
; 0.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizep1_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.481      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[2]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_datain_reg0     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.486      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.483      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.484      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.484      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.484      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.485      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.485      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.486      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.487      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.486      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.486      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.486      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.486      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.487      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.487      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.487      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.487      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.488      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.488      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.488      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.490      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.489      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.490      ;
; 0.167 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.490      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|cntr_4pf:cntr1|counter_reg_bit[0]    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~portb_address_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.228      ; 0.500      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.492      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.491      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[2]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.491      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|cntr_4pf:cntr1|counter_reg_bit[0]    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_address_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.499      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.492      ;
; 0.170 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.493      ;
; 0.170 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.493      ;
; 0.170 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.494      ;
; 0.171 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.494      ;
; 0.171 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.494      ;
; 0.171 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.494      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.497      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.499      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.499      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.498      ;
; 0.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.500      ;
; 0.177 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.500      ;
; 0.177 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.501      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.501      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.501      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp1_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.501      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.501      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.218      ; 0.500      ;
; 0.182 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.506      ;
; 0.182 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~portb_address_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.506      ;
; 0.183 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.218      ; 0.505      ;
; 0.183 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|cntr_qqf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.218      ; 0.505      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.509      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.508      ;
; 0.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp2_raw_reg[0]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_datain_reg0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.509      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                                                                                                            ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                                                                                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                                                                                                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.036      ; 0.307      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                             ;
+-------+---------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                 ; To Node                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.140 ; svideo:svideo|luma[9]     ; svideo:svideo|luma_1[9]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.325      ;
; 0.141 ; svideo:svideo|luma[1]     ; svideo:svideo|luma_1[1]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.326      ;
; 0.141 ; svideo:svideo|luma[8]     ; svideo:svideo|luma_1[8]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.326      ;
; 0.194 ; svideo:svideo|luma_1[4]   ; svideo:svideo|luma_2[4]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; svideo_yout_dly1[4]       ; svideo_yout_dly2[4]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.313      ;
; 0.195 ; svideo_yout_dly1[1]       ; svideo_yout_dly2[1]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; svideo_yout_dly1[5]       ; svideo_yout_dly2[5]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.314      ;
; 0.197 ; svideo:svideo|luma_acc[2] ; svideo_yout_dly1[0]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.316      ;
; 0.197 ; svideo:svideo|luma_acc[8] ; svideo_yout_dly1[6]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.316      ;
; 0.205 ; svideo:svideo|luma[0]     ; svideo:svideo|luma_1[0]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.390      ;
; 0.207 ; svideo:svideo|luma[4]     ; svideo:svideo|luma_1[4]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.392      ;
; 0.208 ; svideo:svideo|luma[5]     ; svideo:svideo|luma_1[5]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.393      ;
; 0.210 ; svideo:svideo|luma[0]     ; luma_saturated[0]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.395      ;
; 0.213 ; svideo:svideo|luma[7]     ; svideo:svideo|luma_1[7]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.398      ;
; 0.214 ; svideo:svideo|luma[9]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.399      ;
; 0.259 ; luma_saturated[9]         ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.378      ;
; 0.262 ; svideo:svideo|luma_2[9]   ; svideo:svideo|luma_acc[9] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.382      ;
; 0.263 ; svideo:svideo|luma_1[8]   ; svideo:svideo|luma_2[8]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.382      ;
; 0.263 ; svideo:svideo|luma_acc[4] ; svideo_yout_dly1[2]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.382      ;
; 0.267 ; svideo:svideo|luma_1[5]   ; svideo:svideo|luma_2[5]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.387      ;
; 0.268 ; svideo_yout_dly1[3]       ; svideo_yout_dly2[3]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.387      ;
; 0.269 ; svideo_yout_dly1[7]       ; svideo_yout_dly2[7]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.388      ;
; 0.270 ; svideo_yout_dly1[2]       ; svideo_yout_dly2[2]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.389      ;
; 0.272 ; svideo_yout_dly1[6]       ; svideo_yout_dly2[6]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.391      ;
; 0.273 ; svideo:svideo|luma_1[1]   ; svideo:svideo|luma_2[1]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.392      ;
; 0.273 ; svideo:svideo|luma_acc[5] ; svideo_yout_dly1[3]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.392      ;
; 0.274 ; svideo:svideo|luma_1[2]   ; svideo:svideo|luma_2[2]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.394      ;
; 0.274 ; svideo:svideo|luma_1[7]   ; svideo:svideo|luma_2[7]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.393      ;
; 0.274 ; svideo:svideo|luma_acc[7] ; svideo_yout_dly1[5]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.393      ;
; 0.275 ; svideo:svideo|luma[6]     ; svideo:svideo|luma_1[6]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.460      ;
; 0.275 ; svideo:svideo|luma_1[9]   ; svideo:svideo|luma_2[9]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.394      ;
; 0.275 ; svideo:svideo|luma_acc[9] ; svideo_yout_dly1[7]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.394      ;
; 0.295 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.414      ;
; 0.296 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.415      ;
; 0.298 ; svideo:svideo|chroma[3]   ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.484      ;
; 0.298 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[6] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.417      ;
; 0.298 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.417      ;
; 0.299 ; svideo:svideo|chroma[5]   ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.485      ;
; 0.302 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.421      ;
; 0.303 ; svideo:svideo|luma[6]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.488      ;
; 0.303 ; svideo:svideo|chroma[8]   ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.489      ;
; 0.304 ; svideo:svideo|chroma[8]   ; cvbs1_out[9]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.490      ;
; 0.307 ; svideo:svideo|luma[7]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.492      ;
; 0.312 ; svideo:svideo|luma[0]     ; luma_saturated[1]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.497      ;
; 0.312 ; svideo:svideo|chroma[4]   ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.498      ;
; 0.313 ; svideo:svideo|chroma[6]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.499      ;
; 0.313 ; svideo:svideo|chroma[7]   ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.499      ;
; 0.313 ; svideo:svideo|chroma[2]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.499      ;
; 0.315 ; svideo:svideo|luma[4]     ; luma_saturated[4]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.500      ;
; 0.315 ; svideo:svideo|luma[5]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.500      ;
; 0.322 ; svideo:svideo|luma[8]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.507      ;
; 0.329 ; svideo:svideo|luma[1]     ; luma_saturated[1]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.514      ;
; 0.336 ; svideo:svideo|luma_acc[6] ; svideo_yout_dly1[4]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.455      ;
; 0.348 ; svideo:svideo|luma_1[3]   ; svideo:svideo|luma_2[3]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.468      ;
; 0.349 ; svideo:svideo|luma_acc[3] ; svideo_yout_dly1[1]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.468      ;
; 0.352 ; svideo_yout_dly1[0]       ; svideo_yout_dly2[0]       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.471      ;
; 0.359 ; luma_saturated[4]         ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.478      ;
; 0.360 ; luma_saturated[2]         ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.479      ;
; 0.363 ; luma_saturated[8]         ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.482      ;
; 0.363 ; luma_saturated[3]         ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.482      ;
; 0.363 ; svideo:svideo|luma_2[7]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.483      ;
; 0.364 ; luma_saturated[7]         ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.483      ;
; 0.365 ; svideo:svideo|luma_1[6]   ; svideo:svideo|luma_2[6]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.486      ;
; 0.365 ; svideo:svideo|luma_2[1]   ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.485      ;
; 0.366 ; svideo:svideo|luma_2[8]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.486      ;
; 0.377 ; luma_saturated[6]         ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.496      ;
; 0.380 ; svideo:svideo|luma_1[0]   ; svideo:svideo|luma_2[0]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.501      ;
; 0.386 ; svideo:svideo|luma_2[0]   ; svideo:svideo|luma_acc[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.505      ;
; 0.399 ; svideo:svideo|luma[3]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.085      ; 0.586      ;
; 0.403 ; svideo:svideo|luma[2]     ; svideo:svideo|luma_1[2]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.085      ; 0.590      ;
; 0.410 ; svideo:svideo|luma[2]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.085      ; 0.597      ;
; 0.444 ; svideo:svideo|luma_2[3]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.563      ;
; 0.444 ; svideo:svideo|luma_acc[1] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.563      ;
; 0.446 ; svideo:svideo|chroma[3]   ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.632      ;
; 0.446 ; svideo:svideo|chroma[1]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.632      ;
; 0.447 ; svideo:svideo|chroma[5]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.633      ;
; 0.451 ; svideo:svideo|luma[6]     ; luma_saturated[7]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.636      ;
; 0.455 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.574      ;
; 0.456 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.575      ;
; 0.456 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[7] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.575      ;
; 0.457 ; svideo:svideo|luma_2[5]   ; svideo:svideo|luma_acc[5] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.578      ;
; 0.458 ; svideo:svideo|luma_acc[0] ; svideo:svideo|luma_acc[2] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.577      ;
; 0.459 ; svideo:svideo|luma_2[6]   ; svideo:svideo|luma_acc[8] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.578      ;
; 0.459 ; svideo:svideo|luma_2[2]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.578      ;
; 0.461 ; svideo:svideo|chroma[7]   ; cvbs1_out[8]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.647      ;
; 0.461 ; svideo:svideo|luma_2[4]   ; svideo:svideo|luma_acc[4] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.582      ;
; 0.464 ; svideo:svideo|luma[4]     ; luma_saturated[5]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.649      ;
; 0.464 ; svideo:svideo|luma[0]     ; luma_saturated[2]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.649      ;
; 0.466 ; svideo:svideo|luma[7]     ; luma_saturated[8]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.651      ;
; 0.467 ; svideo:svideo|luma[0]     ; luma_saturated[3]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.652      ;
; 0.469 ; svideo:svideo|luma[7]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.654      ;
; 0.470 ; svideo:svideo|luma[8]     ; luma_saturated[9]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.655      ;
; 0.471 ; svideo:svideo|chroma[4]   ; cvbs1_out[5]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.657      ;
; 0.472 ; svideo:svideo|chroma[2]   ; cvbs1_out[3]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.658      ;
; 0.472 ; svideo:svideo|chroma[6]   ; cvbs1_out[7]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.658      ;
; 0.472 ; svideo:svideo|chroma[0]   ; cvbs1_out[2]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.658      ;
; 0.474 ; svideo:svideo|luma[5]     ; luma_saturated[6]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.083      ; 0.659      ;
; 0.474 ; svideo:svideo|chroma[4]   ; cvbs1_out[6]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.660      ;
; 0.475 ; svideo:svideo|luma[3]     ; svideo:svideo|luma_1[3]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.085      ; 0.662      ;
; 0.475 ; svideo:svideo|chroma[2]   ; cvbs1_out[4]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; -0.002       ; 0.084      ; 0.661      ;
+-------+---------------------------+---------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                                                                      ;
+-------+---------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                           ; To Node                                                                                                                                                                           ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.167 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[2]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_address_reg0 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.218      ; 0.489      ;
; 0.171 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[0]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_address_reg0 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.218      ; 0.493      ;
; 0.173 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_rom[1]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_address_reg0 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.218      ; 0.495      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait30                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_configuration                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data          ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.start_get_data                                                                                                                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte2                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte3                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte4                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte5                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte6                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte7                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte9                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte10                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid_c                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_read_byte11                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait40                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_1ms_start     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_1ms_start                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait1                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait1                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[0]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_address                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|set_command[1]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.end_set_idle                                                                                                                          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait21                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait6                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait6                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[0]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[2]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[5]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[7]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_available                     ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_available                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.184 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_valid                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_valid                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait20                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_getreport_ack_end                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[2]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt1_end                                                                                                               ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait2                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt2_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt2_end                                                                                                               ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait4                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter2[1]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt3_end ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.setaddress_sendpkt3_end                                                                                                               ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3             ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_pktin3                                                                                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.getreport_sendpkt1_end                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_for_deviceconnect  ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.wait_for_deviceconnect                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|counter1[2]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.usb_reset_state                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|detach_ack                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|detach_ack                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_ack_end            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb_manage.send_ack_end                                                                                                                          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|start_sendcom                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|start_sendcom                                                                                                                                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|address_start[4]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end                                                                                                                          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[1]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[1]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[0]                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[0]                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_configuration   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_configuration                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_1ms_start     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_1ms_start                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end                                                                                                               ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait2                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait2                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2_end                                                                                                               ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte2         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte2                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte3         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte3                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte4         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte4                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte5         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte5                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte6         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte6                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte7         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte7                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte8         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte8                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte9         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte9                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte10        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte10                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte11        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_read_byte11                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait40                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait40                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[1]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[1]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[2]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait20                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait20                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid_c                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid_c                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.start_get_data          ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.start_get_data                                                                                                                        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end                                                                                                               ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin2             ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin2                                                                                                                           ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.Idle                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.Idle                                                                                                                                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_for_deviceconnect  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_for_deviceconnect                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack_end  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack_end                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_idle            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_idle                                                                                                                          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                                                                                                                                    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[0]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[0]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[2]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[2]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[4]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[4]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[5]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[5]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[7]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[7]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_available                     ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_available                                                                                                                                   ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid_temp                    ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid_temp                                                                                                                                  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_valid                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.307      ;
; 0.186 ; reset_usbdrv                                                        ; reset_usbdrv                                                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait4                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait4                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait30                  ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait30                                                                                                                                ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_state         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_state                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|detach_ack                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|detach_ack                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[2]                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[2]                                                                                                                                      ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait6                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait6                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_temp[3]                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyright_temp[3]                                                                                                                                 ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]                                                                                                                                       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
+-------+---------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                   ;
+-------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                       ; To Node                                                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.187 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_init_fsm[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|sdram_rdy                                                                           ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.194 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.202 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.388      ;
; 0.205 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.391      ;
; 0.207 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.393      ;
; 0.209 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.395      ;
; 0.214 ; seq_reg[9]                                                                                                      ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.334      ;
; 0.262 ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.381      ;
; 0.263 ; sdram_ctrl:sdram_controller|r_psel_dly[0]                                                                       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.382      ;
; 0.263 ; sdram_ctrl:sdram_controller|r_bst_stp[0]                                                                        ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.382      ;
; 0.270 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19] ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.085      ; 0.458      ;
; 0.274 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.394      ;
; 0.275 ; seq_reg[10]                                                                                                     ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.395      ;
; 0.279 ; seq_reg[4]                                                                                                      ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.398      ;
; 0.283 ; seq_reg[7]                                                                                                      ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.402      ;
; 0.283 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.402      ;
; 0.284 ; seq_reg[5]                                                                                                      ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.403      ;
; 0.285 ; sdram_ctrl:sdram_controller|r_psel[0]                                                                           ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.405      ;
; 0.293 ; seq_reg[11]                                                                                                     ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.413      ;
; 0.293 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.413      ;
; 0.294 ; seq_reg[8]                                                                                                      ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.414      ;
; 0.295 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.295 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.295 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.296 ; sdram_ctrl:sdram_controller|r_init_tmr[9]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.299 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.419      ;
; 0.304 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.424      ;
; 0.312 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.498      ;
; 0.313 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.499      ;
; 0.317 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.503      ;
; 0.318 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.504      ;
; 0.319 ; sdram_ctrl:sdram_controller|r_rd_reg                                                                            ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.438      ;
; 0.320 ; sdram_ctrl:sdram_controller|r_rd_act                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.439      ;
; 0.329 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.449      ;
; 0.338 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.458      ;
; 0.342 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24] ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.528      ;
; 0.343 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.529      ;
; 0.344 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.530      ;
; 0.345 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.531      ;
; 0.346 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.532      ;
; 0.351 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.471      ;
; 0.351 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.471      ;
; 0.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.540      ;
; 0.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.541      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_init_tmr[2]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.483      ;
; 0.363 ; sdram_ctrl:sdram_controller|r_init_tmr[6]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.483      ;
; 0.368 ; seq_reg[1]                                                                                                      ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.487      ;
; 0.372 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18] ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.085      ; 0.560      ;
; 0.372 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25] ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.084      ; 0.559      ;
; 0.372 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28] ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.558      ;
; 0.372 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31] ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.558      ;
; 0.373 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17] ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.084      ; 0.560      ;
; 0.373 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[27] ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.084      ; 0.560      ;
; 0.374 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16] ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.084      ; 0.561      ;
; 0.375 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23] ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.561      ;
; 0.378 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21] ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.085      ; 0.566      ;
; 0.379 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[26] ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.085      ; 0.567      ;
; 0.381 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30] ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.567      ;
; 0.383 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]  ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.085      ; 0.571      ;
; 0.386 ; seq_reg[0]                                                                                                      ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.506      ;
; 0.392 ; seq_reg[10]                                                                                                     ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 0.514      ;
; 0.395 ; sdram_ctrl:sdram_controller|r_init_fsm[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.515      ;
; 0.420 ; sdram_ctrl:sdram_controller|r_wr_act                                                                            ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.540      ;
; 0.422 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10] ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.085      ; 0.610      ;
; 0.435 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.558      ;
; 0.435 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.558      ;
; 0.437 ; seq_reg[11]                                                                                                     ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 0.560      ;
; 0.442 ; sdram_ctrl:sdram_controller|r_init_tmr[4]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.562      ;
; 0.444 ; sdram_ctrl:sdram_controller|r_init_tmr[8]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.564      ;
; 0.449 ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1                                                       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.568      ;
; 0.450 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 0.568      ;
; 0.452 ; sdram_ctrl:sdram_controller|r_refr_act                                                                          ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 0.570      ;
; 0.452 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.572      ;
; 0.453 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.573      ;
; 0.453 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.573      ;
; 0.454 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.455 ; sdram_ctrl:sdram_controller|r_init_tmr[1]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.575      ;
; 0.456 ; sdram_ctrl:sdram_controller|r_init_tmr[3]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.576      ;
; 0.456 ; sdram_ctrl:sdram_controller|r_init_tmr[7]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.576      ;
; 0.456 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.576      ;
; 0.457 ; sdram_ctrl:sdram_controller|r_init_tmr[5]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.577      ;
; 0.459 ; sdram_ctrl:sdram_controller|r_init_tmr[0]                                                                       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.579      ;
; 0.467 ; sdram_ctrl:sdram_controller|r_rd_reg                                                                            ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.586      ;
; 0.468 ; seq_reg[6]                                                                                                      ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.587      ;
; 0.485 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.086      ; 0.674      ;
; 0.485 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg     ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.086      ; 0.674      ;
; 0.489 ; sdram_ctrl:sdram_controller|r_init_tmr[10]                                                                      ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 0.607      ;
; 0.500 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[14] ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.083      ; 0.686      ;
; 0.503 ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                                                                        ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.623      ;
; 0.503 ; sdram_ctrl:sdram_controller|r_init_fsm[2]                                                                       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 0.621      ;
+-------+-----------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                             ; To Node                                                                                                                                                                                                               ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.307      ;
; 0.193 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.313      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.313      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[3]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.313      ;
; 0.195 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.195 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.315      ;
; 0.195 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.314      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[2]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_minor_ver_reg[1]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.315      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.316      ;
; 0.197 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.316      ;
; 0.197 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                                                           ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.316      ;
; 0.197 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.317      ;
; 0.199 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.318      ;
; 0.199 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.319      ;
; 0.200 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.319      ;
; 0.200 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.319      ;
; 0.200 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.320      ;
; 0.201 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.320      ;
; 0.202 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.322      ;
; 0.204 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.323      ;
; 0.205 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.325      ;
; 0.205 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.325      ;
; 0.205 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.325      ;
; 0.206 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.325      ;
; 0.206 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.325      ;
; 0.206 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                                                           ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.326      ;
; 0.206 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.326      ;
; 0.207 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.326      ;
; 0.209 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                                                          ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                                                          ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.328      ;
; 0.209 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.329      ;
; 0.210 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[15]                                                                                                                     ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.330      ;
; 0.210 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.330      ;
; 0.212 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.332      ;
; 0.217 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.337      ;
; 0.218 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.338      ;
; 0.218 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.035      ; 0.337      ;
; 0.219 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.175      ; 0.498      ;
; 0.219 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.339      ;
; 0.223 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.503      ;
; 0.224 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.508      ;
; 0.224 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.507      ;
; 0.226 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.506      ;
; 0.226 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.175      ; 0.505      ;
; 0.229 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.509      ;
; 0.229 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.513      ;
; 0.232 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.512      ;
; 0.233 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.513      ;
; 0.233 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.175      ; 0.512      ;
; 0.233 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.516      ;
; 0.233 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.516      ;
; 0.234 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.517      ;
; 0.235 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.518      ;
; 0.236 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.175      ; 0.515      ;
; 0.238 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.522      ;
; 0.239 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.519      ;
; 0.240 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.520      ;
; 0.241 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.175      ; 0.520      ;
; 0.243 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.176      ; 0.523      ;
; 0.246 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.530      ;
; 0.246 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.175      ; 0.525      ;
; 0.247 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.531      ;
; 0.248 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.531      ;
; 0.248 ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.179      ; 0.531      ;
; 0.251 ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.180      ; 0.535      ;
; 0.252 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.372      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                    ;
+-------+---------------------------------------+--------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                             ; To Node                                                                                                                  ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------+--------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 8.617 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.079     ; 3.039      ;
; 8.619 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.084     ; 3.032      ;
; 8.619 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.084     ; 3.032      ;
; 8.619 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.084     ; 3.032      ;
; 8.619 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.084     ; 3.032      ;
; 8.620 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.084     ; 3.031      ;
; 8.620 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.084     ; 3.031      ;
; 8.620 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.084     ; 3.031      ;
; 8.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 3.027      ;
; 8.623 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 3.027      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[7]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.089     ; 2.865      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[6]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.089     ; 2.865      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[4]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.089     ; 2.865      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[3]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.089     ; 2.865      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[5]                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.091     ; 2.863      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[4]                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.091     ; 2.863      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[4]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_last_reg                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[9]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[8]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[7]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[6]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[4]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[4]                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.858      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[0]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[1]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[2]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[3]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[4]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[5]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[6]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[7]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_reset_reg                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.094     ; 2.860      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[4]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.858      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[1]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.089     ; 2.865      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[1]                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.858      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[1]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.858      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[5]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[4]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[3]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[1]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[2]                                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[0]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[0]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.858      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[12]                                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.091     ; 2.863      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[4]                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.091     ; 2.863      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[5]                                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.091     ; 2.863      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[5]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.089     ; 2.865      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[5]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[5]                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.858      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[5]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.858      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[3]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.858      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[2]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.090     ; 2.864      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[2]                                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.858      ;
; 8.781 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[2]                                                                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.858      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|state                                                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.096     ; 2.857      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[8]                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.092     ; 2.861      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[6]                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.092     ; 2.861      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[3]                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.092     ; 2.861      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[2]                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.098     ; 2.855      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[1]                                                              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.098     ; 2.855      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0]        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[1]        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[2]        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[3]        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[4]        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[5]        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|keycode_latch_reg[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.087     ; 2.866      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[7]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.091     ; 2.862      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[2]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.088     ; 2.865      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.088     ; 2.865      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.088     ; 2.865      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.086     ; 2.867      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.086     ; 2.867      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.086     ; 2.867      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[4]                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.086     ; 2.867      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[5]                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[6]                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[7]                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.085     ; 2.868      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.086     ; 2.867      ;
; 8.782 ; sdram_ctrl:sdram_controller|sdram_rdy ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                        ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 11.748       ; -0.086     ; 2.867      ;
+-------+---------------------------------------+--------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                          ;
+--------+------------------------+----------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node              ; To Node                                      ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------+----------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 9.866  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[7]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.155     ; 1.663      ;
; 9.903  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[2]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.108     ; 1.675      ;
; 9.903  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[3]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.108     ; 1.675      ;
; 9.907  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[4]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.136     ; 1.644      ;
; 9.909  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[4]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.190     ; 1.586      ;
; 9.910  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[0]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.111     ; 1.665      ;
; 9.910  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ba[1]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.111     ; 1.665      ;
; 9.911  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[0]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.111     ; 1.664      ;
; 9.911  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[1]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.111     ; 1.664      ;
; 9.911  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[6]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.117     ; 1.658      ;
; 9.911  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[7]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.118     ; 1.657      ;
; 9.911  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[7]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.666      ;
; 9.911  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[8]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.118     ; 1.657      ;
; 9.911  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.111     ; 1.664      ;
; 9.912  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[4]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.115     ; 1.659      ;
; 9.912  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[5]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.115     ; 1.659      ;
; 9.912  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[9]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.116     ; 1.658      ;
; 9.912  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[11] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.116     ; 1.658      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[0]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.124     ; 1.648      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[1]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.124     ; 1.648      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[2]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.124     ; 1.648      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[8]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.132     ; 1.640      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[9]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.138     ; 1.634      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[10] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.133     ; 1.639      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[11] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.133     ; 1.639      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[12] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.133     ; 1.639      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[13] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.133     ; 1.639      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[14] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.133     ; 1.639      ;
; 9.915  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[15] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.133     ; 1.639      ;
; 9.916  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[3]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.126     ; 1.645      ;
; 9.916  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[5]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.128     ; 1.643      ;
; 9.916  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_o[6]  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.126     ; 1.645      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[13]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.187     ; 1.581      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[15]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.187     ; 1.581      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[12]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.187     ; 1.581      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[0]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.178     ; 1.590      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[8]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.186     ; 1.582      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[14]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.187     ; 1.581      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.710      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.710      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[9]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.192     ; 1.576      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[1]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.178     ; 1.590      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[11]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.187     ; 1.581      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[10]     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.187     ; 1.581      ;
; 9.917  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[2]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.178     ; 1.590      ;
; 9.918  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[5]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.182     ; 1.585      ;
; 9.918  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[6]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.180     ; 1.587      ;
; 9.918  ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rddata[3]      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.180     ; 1.587      ;
; 10.021 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.556      ;
; 10.021 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.556      ;
; 10.021 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.556      ;
; 10.021 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.556      ;
; 10.021 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.556      ;
; 10.022 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.115     ; 1.549      ;
; 10.130 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.497      ;
; 10.130 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.497      ;
; 10.130 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.497      ;
; 10.130 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.497      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.131 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.113     ; 1.490      ;
; 10.138 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.102     ; 1.494      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 1.485      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.486      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 1.485      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.486      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.486      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.486      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.109     ; 1.486      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 1.485      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 1.485      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 1.485      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.110     ; 1.485      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
; 10.139 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 11.747       ; -0.107     ; 1.488      ;
+--------+------------------------+----------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                            ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 49.145 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 50.000       ; 0.441      ; 1.283      ;
; 98.474 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.489      ;
; 98.474 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.489      ;
; 98.474 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.489      ;
; 98.474 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.489      ;
; 98.476 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.487      ;
; 98.476 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.487      ;
; 98.476 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.487      ;
; 98.476 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.487      ;
; 98.655 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.300      ;
; 98.655 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 1.300      ;
; 98.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.283      ;
; 98.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.283      ;
; 98.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.283      ;
; 98.678 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.283      ;
; 98.700 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.263      ;
; 98.700 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.263      ;
; 98.700 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.263      ;
; 98.700 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.263      ;
; 98.700 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.263      ;
; 98.700 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.263      ;
; 98.700 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.263      ;
; 98.700 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.263      ;
; 98.700 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.024     ; 1.263      ;
; 98.755 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 1.201      ;
; 98.767 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.178      ;
; 98.767 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.178      ;
; 98.767 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.178      ;
; 98.767 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.178      ;
; 98.767 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.178      ;
; 98.767 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.178      ;
; 98.767 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.178      ;
; 98.767 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.178      ;
; 98.767 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.178      ;
; 98.767 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.178      ;
; 98.793 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.168      ;
; 98.793 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.168      ;
; 98.793 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.168      ;
; 98.793 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.026     ; 1.168      ;
; 98.818 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.127      ;
; 98.818 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.127      ;
; 98.818 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.127      ;
; 98.818 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.127      ;
; 98.818 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.127      ;
; 98.818 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.127      ;
; 98.818 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.127      ;
; 98.818 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.127      ;
; 98.818 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.127      ;
; 98.818 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.042     ; 1.127      ;
; 98.851 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.033     ; 1.103      ;
; 98.969 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.041     ; 0.977      ;
; 98.969 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.041     ; 0.977      ;
; 98.969 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.041     ; 0.977      ;
; 98.969 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.041     ; 0.977      ;
; 98.985 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 0.970      ;
; 98.985 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 0.970      ;
; 98.985 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 0.970      ;
; 98.985 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 0.970      ;
; 98.985 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 0.970      ;
; 98.985 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 0.970      ;
; 98.985 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.032     ; 0.970      ;
; 98.992 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 0.968      ;
; 98.992 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 0.968      ;
; 98.992 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 0.968      ;
; 98.992 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 0.968      ;
; 98.992 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 0.968      ;
; 98.992 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 0.968      ;
; 98.992 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 0.968      ;
; 98.992 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 0.968      ;
; 98.992 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.027     ; 0.968      ;
; 98.994 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.025     ; 0.968      ;
; 98.994 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.025     ; 0.968      ;
; 98.994 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.025     ; 0.968      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.028     ; 0.944      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.028     ; 0.944      ;
; 99.015 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.028     ; 0.944      ;
; 99.025 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.031     ; 0.931      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
; 99.129 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 100.000      ; -0.035     ; 0.823      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 65.030 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.046     ; 1.567      ;
; 65.030 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.046     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.046     ; 1.566      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.046     ; 1.566      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.044     ; 1.568      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.046     ; 1.566      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.046     ; 1.566      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.044     ; 1.568      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.044     ; 1.568      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.046     ; 1.566      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.046     ; 1.566      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.046     ; 1.566      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.045     ; 1.567      ;
; 65.031 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.046     ; 1.566      ;
; 65.032 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.044     ; 1.567      ;
; 65.032 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; -0.044     ; 1.567      ;
; 65.984 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.787      ;
; 65.984 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.128      ; 1.787      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.127      ; 1.573      ;
; 66.197 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 66.666       ; 1.126      ; 1.572      ;
+--------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node    ; To Node                                             ; Launch Clock                                         ; Latch Clock                                          ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.099 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.431      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.247      ; 1.431      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.247      ; 1.431      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.247      ; 1.431      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.247      ; 1.431      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.247      ; 1.431      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.247      ; 1.431      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.432      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.432      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.432      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.247      ; 1.431      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.247      ; 1.431      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.247      ; 1.431      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.432      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.432      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.432      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.248      ; 1.432      ;
; 0.100 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.247      ; 1.431      ;
; 0.284 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.249      ; 1.617      ;
; 0.284 ; reset_usbdrv ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 1.249      ; 1.617      ;
; 1.313 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dp1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.029      ; 1.426      ;
; 1.313 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|dm1_last~_emulated ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.029      ; 1.426      ;
; 1.314 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.426      ;
; 1.314 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.029      ; 1.427      ;
; 1.314 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|synch              ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.029      ; 1.427      ;
; 1.314 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|read_byte_valid    ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.029      ; 1.427      ;
; 1.314 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.426      ;
; 1.314 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[0]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.426      ;
; 1.314 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[1]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.426      ;
; 1.314 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|stuffin1[2]        ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.426      ;
; 1.314 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.426      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[1]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.427      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[2]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.427      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[3]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.427      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state3  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.426      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|nb_bits[0]         ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.427      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.427      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[7]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.427      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.427      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[6]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.427      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[2]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.426      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.427      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[5]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.426      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[0]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.426      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_temp[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 1.427      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[4]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.426      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[3]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.426      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state4  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.426      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state1  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.426      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|usb1_state.state2  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.426      ;
; 1.315 ; reset_usbdrv ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|data_pkt1[1]       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.426      ;
+-------+--------------+-----------------------------------------------------+------------------------------------------------------+------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'altera_reserved_tck'                                                                                                                                                                                                                                                                                                                             ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                                                                                                        ; Launch Clock        ; Latch Clock         ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[9]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[8]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[7]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[6]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[5]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[4]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[3]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[2]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[1]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|jtag_ir_reg[0]                                                                                                   ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.580  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[0] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_dr_scan_reg                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.036      ; 0.700      ;
; 0.693  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.041      ; 0.818      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.044      ; 0.835      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.044      ; 0.835      ;
; 0.707  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.044      ; 0.835      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.848      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.848      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.848      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.848      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.848      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.848      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.848      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.848      ;
; 0.719  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 0.848      ;
; 0.720  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.844      ;
; 0.720  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.844      ;
; 0.720  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.844      ;
; 0.720  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.844      ;
; 0.720  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.844      ;
; 0.720  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.844      ;
; 0.720  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 0.844      ;
; 0.721  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.046      ; 0.851      ;
; 0.721  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.046      ; 0.851      ;
; 0.721  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.046      ; 0.851      ;
; 0.734  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[6]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.848      ;
; 0.734  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[5]                                                                                                      ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.848      ;
; 0.734  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[2]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.848      ;
; 0.734  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|node_ena[1]~reg0                                                                                                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.848      ;
; 0.850  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.039      ; 0.973      ;
; 0.870  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.984      ;
; 0.870  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.984      ;
; 0.870  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.984      ;
; 0.870  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.984      ;
; 0.870  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.984      ;
; 0.870  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.984      ;
; 0.870  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.984      ;
; 0.870  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.984      ;
; 0.870  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[2][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.984      ;
; 0.870  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.030      ; 0.984      ;
; 0.889  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|virtual_ir_scan_reg                ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                  ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.013      ;
; 0.900  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][0]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 1.013      ;
; 0.900  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 1.013      ;
; 0.900  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][4]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 1.013      ;
; 0.900  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 1.013      ;
; 0.900  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][3]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 1.013      ;
; 0.900  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][3]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 1.013      ;
; 0.900  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][2]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 1.013      ;
; 0.900  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][2]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 1.013      ;
; 0.900  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|shadow_irf_reg[1][1]                                                                                             ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 1.013      ;
; 0.900  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][1]                                                                                                    ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.029      ; 1.013      ;
; 0.905  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 1.034      ;
; 0.905  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 1.034      ;
; 0.905  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 1.034      ;
; 0.905  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][4]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 1.034      ;
; 0.955  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.086      ;
; 0.955  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.086      ;
; 0.955  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.086      ;
; 0.955  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.086      ;
; 0.955  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.086      ;
; 0.955  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.086      ;
; 0.955  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.086      ;
; 0.955  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.086      ;
; 0.955  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]            ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.086      ;
; 0.995  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 1.124      ;
; 0.995  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 1.124      ;
; 0.995  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 1.124      ;
; 0.995  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[2][0]                      ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.045      ; 1.124      ;
; 1.004  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.128      ;
; 1.004  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                            ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                 ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.040      ; 1.128      ;
; 1.160  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.291      ;
; 1.160  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.291      ;
; 1.160  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.291      ;
; 1.160  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][4]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.291      ;
; 1.160  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.291      ;
; 1.160  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.291      ;
; 1.160  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.291      ;
; 1.160  ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irf_reg[1][0]                      ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]       ; altera_reserved_tck ; altera_reserved_tck ; 0.000        ; 0.047      ; 1.291      ;
; 50.487 ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8] ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                              ; altera_reserved_tck ; altera_reserved_tck ; -50.000      ; 0.519      ; 1.110      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+---------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 0.705 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.005      ;
; 0.705 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.005      ;
; 0.705 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.005      ;
; 0.705 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.005      ;
; 0.705 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.005      ;
; 0.705 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.005      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.013      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.201      ; 1.153      ;
; 0.864 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.158      ;
; 0.864 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.158      ;
; 0.864 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.158      ;
; 0.864 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.158      ;
; 0.864 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.158      ;
; 0.864 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.158      ;
; 0.864 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.158      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a15   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a14   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a13   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a12   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a11   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a10   ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a9    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a8    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a7    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a6    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a5    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a4    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a3    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a2    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a1    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.191 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 1.500      ;
; 1.680 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[5]                                                                                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.231      ; 1.995      ;
; 1.692 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[1]                                                                                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 2.000      ;
; 1.700 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.212      ; 1.996      ;
; 1.700 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.212      ; 1.996      ;
; 1.700 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.212      ; 1.996      ;
; 1.701 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.996      ;
; 1.701 ; sdram_reset_n_reg                                                                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                                                                                                                       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.996      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node              ; To Node                                                   ; Launch Clock                                                                  ; Latch Clock                                                                   ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+
; 1.177 ; sdram_reset_ctrl_n_reg ; seq_reg[0]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; seq_reg[2]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; seq_reg[3]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; seq_reg[8]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; seq_reg[9]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; seq_reg[10]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; seq_reg[11]                                               ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.355      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_request_reg                                         ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel[0]                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; ram_di_reg[0]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.074      ; 1.354      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; ram_di_reg[1]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.074      ; 1.354      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; ram_di_reg[4]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; ram_di_reg[6]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; ram_di_reg[9]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.074      ; 1.354      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; ram_di_reg[11]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.074      ; 1.354      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[1]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.177 ; sdram_reset_ctrl_n_reg ; ram_bena_reg[0]                                           ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.352      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; seq_reg[1]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.353      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; seq_reg[4]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.353      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; seq_reg[5]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.353      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; seq_reg[6]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.353      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; seq_reg[7]                                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.353      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|sdram_rdy                     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.074      ; 1.355      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_act                    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.074      ; 1.355      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[22]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.353      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_rd_act                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.353      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_wr_reg                      ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_request_complete_reg                                ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.072      ; 1.353      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[27]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[19]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[30]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[29]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[31]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[28]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[25]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[17]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[18]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[24]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[20]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[16]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_do_reg[26]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.065      ; 1.346      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_refr_req                    ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.079      ; 1.360      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_di_reg[7]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_di_reg[8]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_di_reg[12]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_di_reg[13]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_di_reg[14]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; ram_di_reg[15]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.069      ; 1.350      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.073      ; 1.354      ;
; 1.178 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.074      ; 1.355      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[7]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[4]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[0]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[12]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[1]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[3]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[11]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[9]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[23]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[8]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[13]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[15]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[21]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_do_reg[2]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.068      ; 1.354      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_di_reg[2]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.361      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_di_reg[3]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.361      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_di_reg[5]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.361      ;
; 1.183 ; sdram_reset_ctrl_n_reg ; ram_di_reg[10]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.075      ; 1.361      ;
; 1.294 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_ras_n                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.061      ; 1.430      ;
; 1.294 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cas_n                 ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.061      ; 1.430      ;
; 1.294 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_we_n                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.061      ; 1.430      ;
; 1.294 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[1]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.055      ; 1.424      ;
; 1.294 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_dqm_n[0]              ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.061      ; 1.430      ;
; 1.294 ; sdram_reset_ctrl_n_reg ; sdram_ctrl:sdram_controller|r_sdram_cs_n                  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.061      ; 1.430      ;
; 1.366 ; sdram_reset_ctrl_n_reg ; ram_do_reg[6]                                             ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.074      ; 1.543      ;
; 1.366 ; sdram_reset_ctrl_n_reg ; ram_do_reg[14]                                            ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.074      ; 1.543      ;
+-------+------------------------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                         ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+---------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+---------------------------+
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[0] ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[1] ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[2] ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[3] ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[4] ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[5] ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[6] ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[7] ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[8] ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_acc[9] ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[0]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[1]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[2]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[3]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[4]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[5]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[6]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly1[7]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[0]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[1]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[2]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[3]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[4]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[5]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[6]       ;
; 4.187 ; 4.403        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo_yout_dly2[7]       ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[8]   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[9]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[2]              ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[3]              ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[4]              ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[5]              ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[6]              ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[7]              ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[8]              ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; cvbs1_out[9]              ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[0]         ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[1]         ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[2]         ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[3]         ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[4]         ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[5]         ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[6]         ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[7]         ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[8]         ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; luma_saturated[9]         ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[0]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[1]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[2]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[3]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[4]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[5]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[6]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[7]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[8]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_1[9]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[0]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[1]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[2]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[3]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[4]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[5]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[6]   ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; svideo:svideo|luma_2[7]   ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                         ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                                         ; Clock Edge ; Target                                                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------+
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[0]                                             ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[10]                                            ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[11]                                            ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[12]                                            ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[13]                                            ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[15]                                            ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[1]                                             ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[21]                                            ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[23]                                            ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[2]                                             ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[3]                                             ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[4]                                             ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[5]                                             ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[7]                                             ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[8]                                             ;
; 5.654 ; 5.870        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[9]                                             ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_bst_stp[0]                  ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[0]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[1]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_fsm[2]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[0]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[10]                ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[1]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[2]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[3]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[4]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[5]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[6]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[7]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[8]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_init_tmr[9]                 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_act                      ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_bctr[0]                  ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rd_reg                      ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_act                    ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_addr[10]~_Duplicate_1 ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_cs_n~_Duplicate_1     ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_reg                      ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|sdram_rdy                     ;
; 5.655 ; 5.871        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[3]                                                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[0]                                           ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_bena_reg[1]                                           ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[0]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[10]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[11]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[12]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[13]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[14]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[15]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[1]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[2]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[3]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[4]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[5]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[6]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[7]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[8]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_di_reg[9]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[14]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[16]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[17]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[18]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[19]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[20]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[22]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[24]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[25]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[26]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[27]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[28]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[29]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[30]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[31]                                            ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; ram_do_reg[6]                                             ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|ap1_rd_bst_act                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel[0]                     ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_psel_dly[0]                 ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_refr_req                    ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_sdram_dq_oe                 ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_act                      ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_wr_bctr[0]                  ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_complete_reg                                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_request_reg                                         ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[0]                                                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[10]                                               ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[11]                                               ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[1]                                                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[2]                                                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[4]                                                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[5]                                                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[6]                                                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[7]                                                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[8]                                                ;
; 5.656 ; 5.872        ; 0.216          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; seq_reg[9]                                                ;
; 5.665 ; 5.820        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[0]                   ;
; 5.665 ; 5.820        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[13]                  ;
; 5.665 ; 5.820        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[14]                  ;
; 5.665 ; 5.820        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[15]                  ;
; 5.665 ; 5.820        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[1]                   ;
; 5.665 ; 5.820        ; 0.155          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_ctrl:sdram_controller|r_rddata[2]                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------------------------------------+------------+-----------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                         ;
+--------+--------------+----------------+-----------------+-------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type            ; Clock                                                                         ; Clock Edge ; Target                                                                                                                                                                                                                                    ;
+--------+--------------+----------------+-----------------+-------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 17.369 ; 17.599       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                                      ;
; 17.369 ; 17.599       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a1~porta_address_reg0                                                                                                                                      ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~porta_address_reg0   ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~porta_address_reg0   ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~porta_address_reg0                                                                                            ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~porta_address_reg0                                                                                            ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a11~porta_address_reg0                                                                                                                                     ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a14~porta_address_reg0                                                                                                                                     ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a17~porta_address_reg0                                                                                                                                     ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a18~porta_address_reg0                                                                                                                                     ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a20~porta_address_reg0                                                                                                                                     ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a22~porta_address_reg0                                                                                                                                     ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a3~porta_address_reg0                                                                                                                                      ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a5~porta_address_reg0                                                                                                                                      ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a6~porta_address_reg0                                                                                                                                      ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a7~porta_address_reg0                                                                                                                                      ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_ld71:auto_generated|ram_block1a8~porta_address_reg0                                                                                                                                      ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ;
; 17.370 ; 17.600       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_ig41:auto_generated|ram_block1a0~porta_we_reg                                                                                                               ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0                    ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a1                    ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a2                    ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a3                    ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a4                    ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a5                    ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_gkm:auto_generated|altsyncram_62b1:altsyncram2|ram_block5a6                    ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_hkm:auto_generated|altsyncram_72b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0                      ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a0~portb_address_reg0   ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a1                      ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a10                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a11                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a12                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a13                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a14                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a15                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a16                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a17                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a18                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a19                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a2                      ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a20                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a21                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a22                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a23                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a24                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a25                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a26                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a27                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a28                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a29                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a3                      ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a30                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a31                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a32                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a33                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a34                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a35                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a36                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a37                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a38                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a39                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a4                      ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a40                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a41                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a42                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a43                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a44                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a45                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a46                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a47                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a48                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a49                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a5                      ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a50                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a51                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a52                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a53                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a54                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a55                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a56                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a57                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a58                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a59                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a6                      ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a60                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a61                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a62                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a63                     ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a7                      ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8                      ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a8~portb_address_reg0   ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_06n:auto_generated|altsyncram_82b1:altsyncram2|ram_block5a9                      ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_s5n:auto_generated|altsyncram_s1b1:altsyncram2|ram_block5a0~porta_address_reg0    ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a0~portb_address_reg0                                                                                            ;
; 17.371 ; 17.601       ; 0.230          ; Low Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; svideo:svideo|sin_cos:tab_inst|sin_rom:sin_inst|altsyncram:altsyncram_component|altsyncram_r842:auto_generated|ram_block1a3~portb_address_reg0                                                                                            ;
+--------+--------------+----------------+-----------------+-------------------------------------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                   ;
+--------+--------------+----------------+------------------+------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                                        ; Clock Edge ; Target                                                                                             ;
+--------+--------------+----------------+------------------+------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------+
; 17.601 ; 17.601       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.601 ; 17.601       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.601 ; 17.601       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.601 ; 17.601       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.601 ; 17.601       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 17.615 ; 17.615       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.619 ; 17.619       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.619 ; 17.619       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.623 ; 17.623       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 17.623 ; 17.623       ; 0.000          ; Low Pulse Width  ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 17.626 ; 17.626       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 17.641 ; 17.641       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 17.641 ; 17.641       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 17.641 ; 17.641       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 17.641 ; 17.641       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 17.641 ; 17.641       ; 0.000          ; High Pulse Width ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
+--------+--------------+----------------+------------------+------------------------------------------------------------------------------+------------+----------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'mcc_pll3|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                  ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                ; Clock Edge ; Target                                                                                                                                                                            ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 33.038 ; 33.268       ; 0.230          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_address_reg0 ;
; 33.038 ; 33.268       ; 0.230          ; Low Pulse Width  ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~porta_re_reg       ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[0]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[1]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[2]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[4]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[5]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[6]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|address_start[7]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[10]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[11]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[12]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[13]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[14]                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[1]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[3]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[4]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[5]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[7]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[8]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[9]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[0]                                                                                                                                    ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[1]                                                                                                                                    ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[2]                                                                                                                                    ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[3]                                                                                                                                    ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[4]                                                                                                                                    ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[5]                                                                                                                                    ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[6]                                                                                                                                    ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_byte2[7]                                                                                                                                    ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_temp[0]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_temp[1]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_temp[2]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|joyleft_temp[3]                                                                                                                                  ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[0]                                                                                                                                   ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|set_command[1]                                                                                                                                   ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|start_sendcom                                                                                                                                    ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_address                                                                                                                       ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_configuration                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.end_set_idle                                                                                                                          ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.getreport_sendpkt1_end                                                                                                                ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_pktin2                                                                                                                           ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_pktin3                                                                                                                           ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.read_pktin4                                                                                                                           ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack                                                                                                                    ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1                                                                                                                   ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt1_end                                                                                                               ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2                                                                                                                   ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3_end                                                                                                               ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait1                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait2                                                                                                                                 ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait20                                                                                                                                ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait21                                                                                                                                ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait40                                                                                                                                ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_ack2                                                                                                                             ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin2                                                                                                                           ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin3                                                                                                                           ;
; 33.059 ; 33.275       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin4                                                                                                                           ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[0]                                                                                                                                      ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[1]                                                                                                                                      ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[2]                                                                                                                                      ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[3]                                                                                                                                      ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[4]                                                                                                                                      ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[5]                                                                                                                                      ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[6]                                                                                                                                      ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1[7]                                                                                                                                      ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[2]                                                                                                                                  ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[6]                                                                                                                                  ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|data_available                                                                                                                                   ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|detach_ack                                                                                                                                       ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.Idle                                                                                                                                  ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.crc_complete                                                                                                                          ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack                                                                                                                              ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_ack_end                                                                                                                          ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.send_getreport_ack_end                                                                                                                ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt2_end                                                                                                               ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.setaddress_sendpkt3                                                                                                                   ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.start_get_data                                                                                                                        ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_1ms_start                                                                                                                   ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_1ms_wait1                                                                                                                   ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.usb_reset_state                                                                                                                       ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait30                                                                                                                                ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait4                                                                                                                                 ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait6                                                                                                                                 ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_for_deviceconnect                                                                                                                ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_manage.wait_pktin1                                                                                                                           ;
; 33.060 ; 33.276       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|usb_reset                                                                                                                                        ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter1_3ms[0]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[0]                                                                                                                                      ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[1]                                                                                                                                      ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[2]                                                                                                                                      ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter2[3]                                                                                                                                      ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[10]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[11]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[12]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[13]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[14]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[15]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[16]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[17]                                                                                                                                  ;
; 33.061 ; 33.277       ; 0.216          ; High Pulse Width ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0] ; Fall       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|counter30ms[18]                                                                                                                                  ;
+--------+--------------+----------------+------------------+------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'altera_reserved_tck'                                                                                                                                                                                                                                                      ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock               ; Clock Edge ; Target                                                                                                                                                                                                                ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 49.284 ; 49.514       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.284 ; 49.514       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.285 ; 49.515       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_address_reg0                                     ;
; 49.285 ; 49.515       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_we_reg                                           ;
; 49.286 ; 49.516       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.287 ; 49.517       ; 0.230          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|altsyncram_eie2:altsyncram1|ram_block3a0~portb_datain_reg0                                      ;
; 49.301 ; 49.517       ; 0.216          ; High Pulse Width ; altera_reserved_tck ; Fall       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo                                                                                                                                                     ;
; 49.342 ; 49.526       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.342 ; 49.526       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.342 ; 49.526       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.342 ; 49.526       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                                                        ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                   ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]                                        ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]                                        ;
; 49.343 ; 49.527       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]                                        ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[0]                                              ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]                                              ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2]                                              ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3]                                              ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|is_in_use_reg                                                         ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[6]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[7]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[8]                                                   ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[0]                                                                                                                                         ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[1]                                                                                                                                         ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[0]                                                                                                                                             ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[1]                                                                                                                                             ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[2]                                                                                                                                             ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[3]                                                                                                                                             ;
; 49.344 ; 49.528       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|irsr_reg[4]                                                                                                                                             ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|clr_reg                                                                                                                                                 ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|hub_mode_reg[2]                                                                                                                                         ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[0]                                                                                                                                       ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[1]                                                                                                                                       ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[2]                                                                                                                                       ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[3]                                                                                                                                       ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|mixer_addr_reg[4]                                                                                                                                       ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|reset_ena_reg                                                                                                                                           ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[3]                                                                                                                      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|state[8]                                                                                                                      ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                    ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                    ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                    ;
; 49.345 ; 49.529       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; sld_hub:auto_hub|sld_jtag_hub:\jtag_hub_gen:sld_jtag_hub_inst|tdo_bypass_reg                                                                                                                                          ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0]      ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[1]      ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[2]      ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[3]      ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[0] ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[1] ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[2] ;
; 49.346 ; 49.530       ; 0.184          ; Low Pulse Width  ; altera_reserved_tck ; Rise       ; USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|rom_com1:rom_com_inst|altsyncram:altsyncram_component|altsyncram_m5d1:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|word_counter[3] ;
+--------+--------------+----------------+------------------+---------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'FPGA_CLK'                                                                                                                        ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                                                 ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------------------------------+
; 99.418  ; 99.418       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 99.418  ; 99.418       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 99.420  ; 99.420       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                                   ;
; 99.420  ; 99.420       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout                         ;
; 99.449  ; 99.449       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                       ;
; 99.460  ; 99.460       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 99.462  ; 99.462       ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                                 ;
; 100.000 ; 100.000      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                       ;
; 100.000 ; 100.000      ; 0.000          ; Low Pulse Width  ; FPGA_CLK ; Rise       ; FPGA_CLK~input|i                                                                       ;
; 100.538 ; 100.538      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]                                 ;
; 100.539 ; 100.539      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 100.551 ; 100.551      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; FPGA_CLK~input|o                                                                       ;
; 100.579 ; 100.579      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                                   ;
; 100.579 ; 100.579      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|observablevcoout                         ;
; 100.580 ; 100.580      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 100.580 ; 100.580      ; 0.000          ; High Pulse Width ; FPGA_CLK ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 196.000 ; 200.000      ; 4.000          ; Port Rate        ; FPGA_CLK ; Rise       ; FPGA_CLK                                                                               ;
+---------+--------------+----------------+------------------+----------+------------+----------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                            ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 1.419 ; 1.970 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.405 ; 1.956 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.405 ; 1.956 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.405 ; 1.956 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 1.407 ; 1.958 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 1.417 ; 1.968 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.409 ; 1.960 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.407 ; 1.958 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.385 ; 1.934 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.413 ; 1.964 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 1.419 ; 1.970 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.414 ; 1.965 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 2.194 ; 2.640 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 1.176 ; 1.493 ; Rise       ; altera_reserved_tck                                                           ;
; altera_reserved_tms ; altera_reserved_tck ; 3.135 ; 3.685 ; Rise       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 2.500 ; 3.327 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 0.627 ; 1.382 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 2.305 ; 3.110 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 0.656 ; 1.387 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 2.718 ; 3.522 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 0.736 ; 1.478 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -0.937 ; -1.486 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -0.958 ; -1.509 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -0.968 ; -1.519 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -0.960 ; -1.511 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -0.958 ; -1.509 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -0.937 ; -1.486 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -0.964 ; -1.515 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -0.970 ; -1.521 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -1.684 ; -2.128 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 0.019  ; -0.318 ; Rise       ; altera_reserved_tck                                                           ;
; altera_reserved_tms ; altera_reserved_tck ; -0.401 ; -0.810 ; Rise       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; -2.076 ; -2.893 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; -0.161 ; -0.903 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; -1.888 ; -2.684 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; -0.205 ; -0.924 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; -1.916 ; -2.740 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; -0.142 ; -0.862 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                    ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 3.442  ; 3.819  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 1.672  ; 1.577  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 1.672  ; 1.577  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 1.675  ; 1.580  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 1.675  ; 1.580  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 1.668  ; 1.573  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 1.668  ; 1.573  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 1.666  ; 1.571  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 1.228  ; 1.202  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 3.442  ; 3.819  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 1.667  ; 1.572  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 1.672  ; 1.577  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 1.667  ; 1.572  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 3.449  ; 3.826  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 3.449  ; 3.826  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 1.235  ; 1.209  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 1.237  ; 1.211  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 1.674  ; 1.579  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 3.089  ; 3.564  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.918  ; 1.876  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.918  ; 1.876  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.918  ; 1.876  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 3.089  ; 3.564  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 3.079  ; 3.554  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 1.311  ; 1.372  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.771  ; 1.767  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.674  ; 1.579  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.910  ; 1.868  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 3.077  ; 3.552  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.909  ; 1.867  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.909  ; 1.867  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.909  ; 1.867  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 3.082  ; 3.557  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.909  ; 1.867  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.909  ; 1.867  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 1.668  ; 1.573  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 1.674  ; 1.579  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 1.674  ; 1.579  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 3.451  ; 3.828  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 3.839  ; 4.387  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 2.441  ; 2.582  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 2.752  ; 2.957  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 2.463  ; 2.612  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 3.262  ; 3.019  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 10.161 ;        ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 10.635 ; Fall       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 3.005  ; 3.451  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 1.230  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 3.005  ; 3.451  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 1.228  ; 1.202  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 1.231  ; 1.205  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 3.007  ; 3.453  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 1.230  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 1.230  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 1.230  ; 1.204  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 3.007  ; 3.453  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 6.688  ; 7.542  ; Fall       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 3.136  ; 3.284  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 4.192  ; 4.378  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 5.359  ; 4.760  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 4.165  ; 4.014  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                           ;
+---------------------+---------------------+-------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+-------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 0.844 ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 1.270 ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 1.270 ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 1.273 ; 1.181  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 1.273 ; 1.181  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 1.266 ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 1.266 ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 1.264 ; 1.172  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 0.844 ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 3.040 ; 3.420  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 1.265 ; 1.173  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 1.270 ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 1.265 ; 1.173  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 0.851 ; 0.825  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 3.047 ; 3.427  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 0.851 ; 0.825  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 0.853 ; 0.827  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 1.272 ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 0.927 ; 0.989  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.516 ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.516 ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.516 ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.705 ; 3.181  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.695 ; 3.171  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 0.927 ; 0.989  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.369 ; 1.369  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.272 ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.508 ; 1.470  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.693 ; 3.169  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.507 ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.507 ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.507 ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.698 ; 3.174  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.507 ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.507 ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 1.266 ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 1.272 ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 1.272 ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 3.049 ; 3.429  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 3.377 ; 3.921  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 1.964 ; 2.099  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 2.263 ; 2.458  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 1.985 ; 2.127  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 2.751 ; 2.519  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 9.746 ;        ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;       ; 10.218 ; Fall       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 0.844 ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 0.846 ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 2.621 ; 3.067  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 0.844 ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 0.847 ; 0.821  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 0.846 ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 0.846 ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 0.846 ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 0.846 ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 2.623 ; 3.069  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 5.506 ; 6.359  ; Fall       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 2.814 ; 2.958  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 3.822 ; 4.003  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 5.033 ; 4.439  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 3.798 ; 3.651  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+-------+--------+------------+-------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                                     ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.799 ; 1.798 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.534 ; 2.533 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.534 ; 2.533 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.534 ; 2.533 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.986 ; 4.433 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.166 ; 4.613 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.222 ; 2.255 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.232 ; 2.265 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.289 ; 2.234 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.276 ; 2.275 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 3.758 ; 4.205 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.952 ; 1.951 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.952 ; 1.951 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.952 ; 1.951 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 3.430 ; 3.877 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.799 ; 1.798 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.799 ; 1.798 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.634 ; 2.579 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 3.478 ; 3.477 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 4.033 ; 4.066 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 4.917 ; 5.364 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 4.011 ; 4.044 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                             ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.364 ; 1.363 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.069 ; 2.068 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.069 ; 2.068 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.069 ; 2.068 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 3.528 ; 3.975 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 3.701 ; 4.148 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.764 ; 1.797 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.774 ; 1.807 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.817 ; 1.762 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 1.821 ; 1.820 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 3.309 ; 3.756 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.511 ; 1.510 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.511 ; 1.510 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.511 ; 1.510 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 2.994 ; 3.441 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.364 ; 1.363 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.364 ; 1.363 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.149 ; 2.094 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 3.147 ; 3.146 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 3.675 ; 3.708 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 4.594 ; 5.041 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 3.653 ; 3.686 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-------+-------+------------+-------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                            ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.843     ; 1.844     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.674     ; 2.675     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.674     ; 2.675     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.674     ; 2.675     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 4.554     ; 4.107     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.762     ; 4.315     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 2.384     ; 2.351     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 2.386     ; 2.353     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 2.369     ; 2.424     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 2.375     ; 2.376     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 4.295     ; 3.848     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 2.020     ; 2.021     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 2.020     ; 2.021     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 2.020     ; 2.021     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 3.921     ; 3.474     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.843     ; 1.844     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.843     ; 1.844     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.789     ; 2.844     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 3.641     ; 3.642     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 4.151     ; 4.118     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 5.498     ; 5.051     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 4.124     ; 4.091     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                                    ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; Data Port     ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                               ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]   ; FPGA_CLK   ; 1.405     ; 1.406     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; FPGA_CLK   ; 2.203     ; 2.204     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; FPGA_CLK   ; 2.203     ; 2.204     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; FPGA_CLK   ; 2.203     ; 2.204     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; FPGA_CLK   ; 4.091     ; 3.644     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; FPGA_CLK   ; 4.291     ; 3.844     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; FPGA_CLK   ; 1.920     ; 1.887     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; FPGA_CLK   ; 1.922     ; 1.889     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; FPGA_CLK   ; 1.891     ; 1.946     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; FPGA_CLK   ; 1.916     ; 1.917     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; FPGA_CLK   ; 3.843     ; 3.396     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; FPGA_CLK   ; 1.576     ; 1.577     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; FPGA_CLK   ; 1.576     ; 1.577     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; FPGA_CLK   ; 1.576     ; 1.577     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; FPGA_CLK   ; 3.484     ; 3.037     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; FPGA_CLK   ; 1.405     ; 1.406     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; FPGA_CLK   ; 1.405     ; 1.406     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_CMD        ; FPGA_CLK   ; 2.295     ; 2.350     ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; dminus1       ; FPGA_CLK   ; 3.304     ; 3.305     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2       ; FPGA_CLK   ; 3.789     ; 3.756     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1        ; FPGA_CLK   ; 5.169     ; 4.722     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2        ; FPGA_CLK   ; 3.763     ; 3.730     ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------+------------+-----------+-----------+------------+-------------------------------------------------------------------------------+


---------------------------------------------
; Fast 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                                                          ;
+--------------------------------------------------------------------------------+----------+-------+----------+---------+---------------------+
; Clock                                                                          ; Setup    ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
+--------------------------------------------------------------------------------+----------+-------+----------+---------+---------------------+
; Worst-case Slack                                                               ; -9.105   ; 0.136 ; 5.680    ; 0.099   ; 4.128               ;
;  FPGA_CLK                                                                      ; N/A      ; N/A   ; N/A      ; N/A     ; 99.418              ;
;  \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.424    ; 0.187 ; 8.052    ; 1.177   ; 5.595               ;
;  \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -9.105   ; 0.136 ; 5.680    ; 0.705   ; 17.322              ;
;  \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 4.544    ; 0.140 ; N/A      ; N/A     ; 4.128               ;
;  \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; N/A      ; N/A   ; N/A      ; N/A     ; 17.589              ;
;  altera_reserved_tck                                                           ; 45.299   ; 0.187 ; 47.708   ; 0.580   ; 49.284              ;
;  mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 25.905   ; 0.167 ; 63.525   ; 0.099   ; 32.949              ;
; Design-wide TNS                                                                ; -933.886 ; 0.0   ; 0.0      ; 0.0     ; 0.0                 ;
;  FPGA_CLK                                                                      ; N/A      ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000    ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; -933.886 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000    ; 0.000 ; N/A      ; N/A     ; 0.000               ;
;  \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]  ; N/A      ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  altera_reserved_tck                                                           ; 0.000    ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 0.000    ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
+--------------------------------------------------------------------------------+----------+-------+----------+---------+---------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                                            ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; 2.724 ; 2.903 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 2.705 ; 2.884 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.708 ; 2.887 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.717 ; 2.896 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.709 ; 2.888 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 2.708 ; 2.887 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 2.656 ; 2.834 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 2.717 ; 2.896 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.724 ; 2.903 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 2.719 ; 2.898 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 2.718 ; 2.897 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; 4.084 ; 4.240 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 2.641 ; 2.884 ; Rise       ; altera_reserved_tck                                                           ;
; altera_reserved_tms ; altera_reserved_tck ; 7.754 ; 7.920 ; Rise       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 4.827 ; 5.292 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 1.086 ; 1.473 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 4.452 ; 4.917 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 1.151 ; 1.558 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 5.337 ; 5.800 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 1.508 ; 1.941 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+-------+-------+------------+-------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_DQ[*]         ; FPGA_CLK            ; -0.937 ; -1.486 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; -0.956 ; -1.507 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; -0.958 ; -1.509 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; -0.968 ; -1.519 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; -0.960 ; -1.511 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; -0.958 ; -1.509 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; -0.937 ; -1.486 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; -0.964 ; -1.515 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; -0.970 ; -1.521 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; -0.965 ; -1.516 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SD_DAT0             ; FPGA_CLK            ; -1.684 ; -2.128 ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; altera_reserved_tdi ; altera_reserved_tck ; 0.019  ; -0.297 ; Rise       ; altera_reserved_tck                                                           ;
; altera_reserved_tms ; altera_reserved_tck ; -0.401 ; -0.810 ; Rise       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; -2.076 ; -2.893 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; -0.010 ; -0.281 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; -1.888 ; -2.684 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; -0.102 ; -0.399 ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; -1.916 ; -2.740 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; -0.142 ; -0.521 ; Fall       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                                                    ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 5.688  ; 5.935  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 3.087  ; 2.874  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 3.087  ; 2.874  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 3.072  ; 2.859  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 2.251  ; 2.177  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 5.688  ; 5.935  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 3.073  ; 2.860  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 3.084  ; 2.871  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 3.073  ; 2.860  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 5.701  ; 5.948  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 5.701  ; 5.948  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 2.264  ; 2.190  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 2.265  ; 2.191  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 3.085  ; 2.872  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 5.024  ; 5.448  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 3.455  ; 3.310  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 5.024  ; 5.448  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 5.015  ; 5.439  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 2.410  ; 2.389  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 3.272  ; 3.118  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 3.086  ; 2.873  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 3.443  ; 3.298  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 5.008  ; 5.432  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 3.441  ; 3.296  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 5.014  ; 5.438  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 3.442  ; 3.297  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 3.442  ; 3.297  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 3.074  ; 2.861  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 3.086  ; 2.873  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 3.085  ; 2.872  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 5.703  ; 5.950  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 6.620  ; 6.993  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 4.756  ; 4.708  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 5.376  ; 5.349  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 4.842  ; 4.799  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 5.909  ; 5.858  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 11.879 ;        ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;        ; 12.229 ; Fall       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 4.868  ; 5.254  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 2.252  ; 2.178  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 4.868  ; 5.254  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 2.251  ; 2.177  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 2.254  ; 2.180  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 4.870  ; 5.256  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 2.253  ; 2.179  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 4.870  ; 5.256  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 12.504 ; 13.475 ; Fall       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 5.962  ; 6.004  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 8.235  ; 8.230  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 8.849  ; 8.407  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 7.845  ; 7.847  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+--------+--------+------------+-------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                                           ;
+---------------------+---------------------+-------+--------+------------+-------------------------------------------------------------------------------+
; Data Port           ; Clock Port          ; Rise  ; Fall   ; Clock Edge ; Clock Reference                                                               ;
+---------------------+---------------------+-------+--------+------------+-------------------------------------------------------------------------------+
; SDRAM_A[*]          ; FPGA_CLK            ; 0.844 ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]         ; FPGA_CLK            ; 1.270 ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]         ; FPGA_CLK            ; 1.270 ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]         ; FPGA_CLK            ; 1.273 ; 1.181  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]         ; FPGA_CLK            ; 1.273 ; 1.181  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]         ; FPGA_CLK            ; 1.266 ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]         ; FPGA_CLK            ; 1.266 ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]         ; FPGA_CLK            ; 1.264 ; 1.172  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]         ; FPGA_CLK            ; 0.844 ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]         ; FPGA_CLK            ; 3.040 ; 3.420  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]         ; FPGA_CLK            ; 1.265 ; 1.173  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]        ; FPGA_CLK            ; 1.270 ; 1.178  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]        ; FPGA_CLK            ; 1.265 ; 1.173  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]         ; FPGA_CLK            ; 0.851 ; 0.825  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]        ; FPGA_CLK            ; 3.047 ; 3.427  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]        ; FPGA_CLK            ; 0.851 ; 0.825  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CAS_N         ; FPGA_CLK            ; 0.853 ; 0.827  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CS_N          ; FPGA_CLK            ; 1.272 ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]         ; FPGA_CLK            ; 0.927 ; 0.989  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]        ; FPGA_CLK            ; 1.516 ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]        ; FPGA_CLK            ; 1.516 ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]        ; FPGA_CLK            ; 1.516 ; 1.478  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]        ; FPGA_CLK            ; 2.705 ; 3.181  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]        ; FPGA_CLK            ; 2.695 ; 3.171  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]        ; FPGA_CLK            ; 0.927 ; 0.989  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]        ; FPGA_CLK            ; 1.369 ; 1.369  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]        ; FPGA_CLK            ; 1.272 ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]        ; FPGA_CLK            ; 1.508 ; 1.470  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]        ; FPGA_CLK            ; 2.693 ; 3.169  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10]       ; FPGA_CLK            ; 1.507 ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11]       ; FPGA_CLK            ; 1.507 ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12]       ; FPGA_CLK            ; 1.507 ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13]       ; FPGA_CLK            ; 2.698 ; 3.174  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14]       ; FPGA_CLK            ; 1.507 ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15]       ; FPGA_CLK            ; 1.507 ; 1.469  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH_n        ; FPGA_CLK            ; 1.266 ; 1.174  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML_n        ; FPGA_CLK            ; 1.272 ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_RAS_N         ; FPGA_CLK            ; 1.272 ; 1.180  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_WE_N          ; FPGA_CLK            ; 3.049 ; 3.429  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L             ; FPGA_CLK            ; 3.377 ; 3.921  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R             ; FPGA_CLK            ; 1.964 ; 2.099  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CLK              ; FPGA_CLK            ; 2.263 ; 2.458  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_CMD              ; FPGA_CLK            ; 1.985 ; 2.127  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SD_DAT3             ; FPGA_CLK            ; 2.751 ; 2.519  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK           ; FPGA_CLK            ; 9.746 ;        ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK           ; FPGA_CLK            ;       ; 10.218 ; Fall       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; VGA_B[*]            ; FPGA_CLK            ; 0.844 ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[0]           ; FPGA_CLK            ; 0.846 ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[1]           ; FPGA_CLK            ; 2.621 ; 3.067  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[2]           ; FPGA_CLK            ; 0.844 ; 0.818  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_B[3]           ; FPGA_CLK            ; 0.847 ; 0.821  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; VGA_G[*]            ; FPGA_CLK            ; 0.846 ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[0]           ; FPGA_CLK            ; 0.846 ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[1]           ; FPGA_CLK            ; 0.846 ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[2]           ; FPGA_CLK            ; 0.846 ; 0.820  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
;  VGA_G[3]           ; FPGA_CLK            ; 2.623 ; 3.069  ; Rise       ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ;
; altera_reserved_tdo ; altera_reserved_tck ; 5.506 ; 6.359  ; Fall       ; altera_reserved_tck                                                           ;
; dminus1             ; FPGA_CLK            ; 2.814 ; 2.958  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dminus2             ; FPGA_CLK            ; 3.822 ; 4.003  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus1              ; FPGA_CLK            ; 5.033 ; 4.439  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
; dplus2              ; FPGA_CLK            ; 3.798 ; 3.651  ; Rise       ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ;
+---------------------+---------------------+-------+--------+------------+-------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                                                                          ;
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; Pin                 ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dplus1              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dminus1             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dplus2              ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; dminus2             ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
+---------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+


+------------------------------------------------------------------------+
; Input Transition Times                                                 ;
+---------------------+--------------+-----------------+-----------------+
; Pin                 ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+---------------------+--------------+-----------------+-----------------+
; CFG_DIN             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dplus1              ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dminus1             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dplus2              ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; dminus2             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; FPGA_CLK            ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; SD_DAT0             ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; altera_reserved_tms ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; altera_reserved_tck ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
; altera_reserved_tdi ; 3.3-V LVCMOS ; 2640 ps         ; 2640 ps         ;
+---------------------+--------------+-----------------+-----------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Slow 1200mv 0c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin                 ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.09 V              ; -0.00419 V          ; 0.108 V                              ; 0.251 V                              ; 5.73e-09 s                  ; 5.85e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.69e-08 V                  ; 3.09 V             ; -0.00419 V         ; 0.108 V                             ; 0.251 V                             ; 5.73e-09 s                 ; 5.85e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 6.15e-09 V                   ; 3.18 V              ; -0.0303 V           ; 0.317 V                              ; 0.07 V                               ; 3.25e-10 s                  ; 3.88e-10 s                  ; No                         ; Yes                        ; 3.08 V                      ; 6.15e-09 V                  ; 3.18 V             ; -0.0303 V          ; 0.317 V                             ; 0.07 V                              ; 3.25e-10 s                 ; 3.88e-10 s                 ; No                        ; Yes                       ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.76e-08 V                   ; 3.09 V              ; -0.0166 V           ; 0.084 V                              ; 0.289 V                              ; 2.05e-09 s                  ; 1.96e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.76e-08 V                  ; 3.09 V             ; -0.0166 V          ; 0.084 V                             ; 0.289 V                             ; 2.05e-09 s                 ; 1.96e-09 s                 ; Yes                       ; Yes                       ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.76e-08 V                   ; 3.09 V              ; -0.0166 V           ; 0.084 V                              ; 0.289 V                              ; 2.05e-09 s                  ; 1.96e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.76e-08 V                  ; 3.09 V             ; -0.0166 V          ; 0.084 V                             ; 0.289 V                             ; 2.05e-09 s                 ; 1.96e-09 s                 ; Yes                       ; Yes                       ;
; dplus1              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; dminus1             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; dplus2              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; dminus2             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0307 V           ; 0.185 V                              ; 0.216 V                              ; 1.07e-09 s                  ; 1.08e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0307 V          ; 0.185 V                             ; 0.216 V                             ; 1.07e-09 s                 ; 1.08e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.69e-08 V                   ; 3.1 V               ; -0.0328 V           ; 0.121 V                              ; 0.141 V                              ; 7.19e-10 s                  ; 7.87e-10 s                  ; Yes                        ; No                         ; 3.08 V                      ; 2.69e-08 V                  ; 3.1 V              ; -0.0328 V          ; 0.121 V                             ; 0.141 V                             ; 7.19e-10 s                 ; 7.87e-10 s                 ; Yes                       ; No                        ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.09 V              ; -0.00398 V          ; 0.168 V                              ; 0.263 V                              ; 6.02e-09 s                  ; 6.14e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.09 V             ; -0.00398 V         ; 0.168 V                             ; 0.263 V                             ; 6.02e-09 s                 ; 6.14e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.9e-08 V                    ; 3.1 V               ; -0.0249 V           ; 0.153 V                              ; 0.299 V                              ; 1.37e-09 s                  ; 1.36e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.9e-08 V                   ; 3.1 V              ; -0.0249 V          ; 0.153 V                             ; 0.299 V                             ; 1.37e-09 s                 ; 1.36e-09 s                 ; Yes                       ; Yes                       ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 5.09e-08 V                   ; 3.11 V              ; 5.09e-08 V          ; 0.193 V                              ; 0.27 V                               ; 1.07e-09 s                  ; 2.77e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 5.09e-08 V                  ; 3.11 V             ; 5.09e-08 V         ; 0.193 V                             ; 0.27 V                              ; 1.07e-09 s                 ; 2.77e-09 s                 ; Yes                       ; Yes                       ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Slow 1200mv 85c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin                 ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.00169 V          ; 0.058 V                              ; 0.159 V                              ; 6.95e-09 s                  ; 7.33e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.00169 V         ; 0.058 V                             ; 0.159 V                             ; 6.95e-09 s                 ; 7.33e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 6.52e-07 V                   ; 3.14 V              ; -0.0428 V           ; 0.161 V                              ; 0.071 V                              ; 4.71e-10 s                  ; 4.5e-10 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 6.52e-07 V                  ; 3.14 V             ; -0.0428 V          ; 0.161 V                             ; 0.071 V                             ; 4.71e-10 s                 ; 4.5e-10 s                  ; Yes                       ; Yes                       ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.13e-06 V                   ; 3.08 V              ; -0.00721 V          ; 0.043 V                              ; 0.226 V                              ; 2.47e-09 s                  ; 2.5e-09 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 3.13e-06 V                  ; 3.08 V             ; -0.00721 V         ; 0.043 V                             ; 0.226 V                             ; 2.47e-09 s                 ; 2.5e-09 s                  ; Yes                       ; Yes                       ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.13e-06 V                   ; 3.08 V              ; -0.00721 V          ; 0.043 V                              ; 0.226 V                              ; 2.47e-09 s                  ; 2.5e-09 s                   ; Yes                        ; Yes                        ; 3.08 V                      ; 3.13e-06 V                  ; 3.08 V             ; -0.00721 V         ; 0.043 V                             ; 0.226 V                             ; 2.47e-09 s                 ; 2.5e-09 s                  ; Yes                       ; Yes                       ;
; dplus1              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; dminus1             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; dplus2              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; dminus2             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.0139 V           ; 0.07 V                               ; 0.155 V                              ; 1.28e-09 s                  ; 1.32e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.0139 V          ; 0.07 V                              ; 0.155 V                             ; 1.28e-09 s                 ; 1.32e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 3.2e-06 V                    ; 3.09 V              ; -0.0146 V           ; 0.059 V                              ; 0.158 V                              ; 9.01e-10 s                  ; 9.75e-10 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 3.2e-06 V                   ; 3.09 V             ; -0.0146 V          ; 0.059 V                             ; 0.158 V                             ; 9.01e-10 s                 ; 9.75e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.00144 V          ; 0.08 V                               ; 0.174 V                              ; 7.33e-09 s                  ; 7.73e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.00144 V         ; 0.08 V                              ; 0.174 V                             ; 7.33e-09 s                 ; 7.73e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 2.15e-06 V                   ; 3.09 V              ; -0.012 V            ; 0.078 V                              ; 0.167 V                              ; 1.65e-09 s                  ; 1.74e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 2.15e-06 V                  ; 3.09 V             ; -0.012 V           ; 0.078 V                             ; 0.167 V                             ; 1.65e-09 s                 ; 1.74e-09 s                 ; Yes                       ; Yes                       ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.08 V                       ; 5.8e-06 V                    ; 3.09 V              ; 5.8e-06 V           ; 0.119 V                              ; 0.138 V                              ; 1.28e-09 s                  ; 3.52e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 5.8e-06 V                   ; 3.09 V             ; 5.8e-06 V          ; 0.119 V                             ; 0.138 V                             ; 1.28e-09 s                 ; 3.52e-09 s                 ; Yes                       ; Yes                       ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Integrity Metrics (Fast 1200mv 0c Model)                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin                 ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_B[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_B[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; VGA_B[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_B[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[0]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[1]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[2]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; VGA_G[3]            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; AUDIO_L             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; AUDIO_R             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_BA[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_BA[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CS_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_RAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CAS_N         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_WE_N          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_DQMH_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQML_n        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CLK           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_CKE           ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[0]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[1]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[2]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[3]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[4]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[5]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[6]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[7]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[8]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.47 V              ; -0.00753 V          ; 0.323 V                              ; 0.336 V                              ; 4.77e-09 s                  ; 5.18e-09 s                  ; Yes                        ; No                         ; 3.46 V                      ; 3.12e-07 V                  ; 3.47 V             ; -0.00753 V         ; 0.323 V                             ; 0.336 V                             ; 4.77e-09 s                 ; 5.18e-09 s                 ; Yes                       ; No                        ;
; SDRAM_A[9]          ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[10]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[11]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[12]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_CLK              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_CMD              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SD_DAT3             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; CFG_CLK             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 6.59e-08 V                   ; 3.58 V              ; -0.0703 V           ; 0.234 V                              ; 0.091 V                              ; 2.93e-10 s                  ; 3.09e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 6.59e-08 V                  ; 3.58 V             ; -0.0703 V          ; 0.234 V                             ; 0.091 V                             ; 2.93e-10 s                 ; 3.09e-10 s                 ; Yes                       ; Yes                       ;
; CFG_CS_n            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.08e-07 V                   ; 3.48 V              ; -0.026 V            ; 0.261 V                              ; 0.327 V                              ; 1.74e-09 s                  ; 1.77e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 3.08e-07 V                  ; 3.48 V             ; -0.026 V           ; 0.261 V                             ; 0.327 V                             ; 1.74e-09 s                 ; 1.77e-09 s                 ; No                        ; No                        ;
; CFG_DOUT            ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.08e-07 V                   ; 3.48 V              ; -0.026 V            ; 0.261 V                              ; 0.327 V                              ; 1.74e-09 s                  ; 1.77e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 3.08e-07 V                  ; 3.48 V             ; -0.026 V           ; 0.261 V                             ; 0.327 V                             ; 1.74e-09 s                 ; 1.77e-09 s                 ; No                        ; No                        ;
; dplus1              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; dminus1             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; dplus2              ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; dminus2             ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[0]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[1]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[2]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[3]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[4]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[5]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[6]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.51 V              ; -0.0513 V           ; 0.246 V                              ; 0.327 V                              ; 8.76e-10 s                  ; 8.99e-10 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.51 V             ; -0.0513 V          ; 0.246 V                             ; 0.327 V                             ; 8.76e-10 s                 ; 8.99e-10 s                 ; No                        ; No                        ;
; SDRAM_DQ[7]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.12e-07 V                   ; 3.51 V              ; -0.0531 V           ; 0.196 V                              ; 0.245 V                              ; 6.35e-10 s                  ; 6.52e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.12e-07 V                  ; 3.51 V             ; -0.0531 V          ; 0.196 V                             ; 0.245 V                             ; 6.35e-10 s                 ; 6.52e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQ[8]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[9]         ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[10]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[11]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[12]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[13]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.47 V              ; -0.00704 V          ; 0.325 V                              ; 0.344 V                              ; 5.02e-09 s                  ; 5.44e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.47 V             ; -0.00704 V         ; 0.325 V                             ; 0.344 V                             ; 5.02e-09 s                 ; 5.44e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[14]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[15]        ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.11e-07 V                   ; 3.5 V               ; -0.041 V            ; 0.29 V                               ; 0.24 V                               ; 1.12e-09 s                  ; 1.29e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.11e-07 V                  ; 3.5 V              ; -0.041 V           ; 0.29 V                              ; 0.24 V                              ; 1.12e-09 s                 ; 1.29e-09 s                 ; No                        ; No                        ;
; altera_reserved_tdo ; 3.3-V LVCMOS ; 0 s                 ; 0 s                 ; 3.46 V                       ; 5.7e-07 V                    ; 3.51 V              ; -0.00915 V          ; 0.24 V                               ; 0.283 V                              ; 8.77e-10 s                  ; 2.48e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 5.7e-07 V                   ; 3.51 V             ; -0.00915 V         ; 0.24 V                              ; 0.283 V                             ; 8.77e-10 s                 ; 2.48e-09 s                 ; No                        ; No                        ;
+---------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                                                                                           ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                    ; To Clock                                                                      ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1836     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 24341    ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 4264     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 9977054  ; 0        ; 0        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1026     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 117      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 224      ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                           ; altera_reserved_tck                                                           ; 1927     ; 0        ; 35       ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 3350     ; 140      ; 1681     ; 10369    ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                                                                            ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                    ; To Clock                                                                      ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1836     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 24341    ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 4264     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 9977054  ; 0        ; 0        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1026     ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 117      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] ; 224      ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                           ; altera_reserved_tck                                                           ; 1927     ; 0        ; 35       ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 3350     ; 140      ; 1681     ; 10369    ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                                                                                                                        ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                    ; To Clock                                                                      ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 146      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 522      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1727     ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                           ; altera_reserved_tck                                                           ; 88       ; 0        ; 1        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 62       ; 0        ; 0        ; 0        ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                                                                                                                         ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                                    ; To Clock                                                                      ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; 146      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 522      ; 0        ; 0        ; 0        ;
; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1727     ; 0        ; 0        ; 0        ;
; altera_reserved_tck                                                           ; altera_reserved_tck                                                           ; 88       ; 0        ; 1        ; 0        ;
; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; mcc_pll3|altpll_component|auto_generated|pll1|clk[0]                          ; 62       ; 0        ; 0        ; 0        ;
+-------------------------------------------------------------------------------+-------------------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 3     ; 3    ;
; Unconstrained Input Ports       ; 23    ; 23   ;
; Unconstrained Input Port Paths  ; 88    ; 88   ;
; Unconstrained Output Ports      ; 55    ; 55   ;
; Unconstrained Output Port Paths ; 76    ; 76   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Sun Oct  5 21:49:55 2014
Info: Command: quartus_sta atari800core -c atari800core
Info: qsta_default_script.tcl version: #1
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Warning (335093): TimeQuest Timing Analyzer is analyzing 6 combinational loops as latches.
Info (332164): Evaluating HDL-embedded SDC commands
    Info (332165): Entity sld_jtag_hub
        Info (332166): create_clock -name altera_reserved_tck [get_ports {altera_reserved_tck}] -period 10MHz   
        Info (332166): set_clock_groups -asynchronous -group {altera_reserved_tck}
Info (332104): Reading SDC File: 'atari800core.sdc'
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]} {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]} {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -phase 225.00 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]} {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[2]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 4 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]} {\gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3]}
    Info (332110): create_generated_clock -source {\gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 40 -multiply_by 227 -duty_cycle 50.00 -name {\gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]} {\gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {mcc_pll3|altpll_component|auto_generated|pll1|inclk[0]} -multiply_by 3 -duty_cycle 50.00 -name {mcc_pll3|altpll_component|auto_generated|pll1|clk[0]} {mcc_pll3|altpll_component|auto_generated|pll1|clk[0]}
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Warning (332060): Node: reset_usbdrv was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow 1200mV 85C Model
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -9.105
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -9.105      -933.886 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.424         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     4.544         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):    25.905         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    45.299         0.000 altera_reserved_tck 
Info (332146): Worst-case hold slack is 0.340
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.340         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.353         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     0.388         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.413         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.413         0.000 altera_reserved_tck 
Info (332146): Worst-case recovery slack is 5.680
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.680         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     8.052         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    47.708         0.000 altera_reserved_tck 
    Info (332119):    63.525         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is 0.187
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.187         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     1.245         0.000 altera_reserved_tck 
    Info (332119):     1.478         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     2.347         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.130
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.130         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.595         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.340         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.594         0.000 \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    33.013         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.470         0.000 altera_reserved_tck 
    Info (332119):    99.796         0.000 FPGA_CLK 
Info: Analyzing Slow 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Warning (332060): Node: reset_usbdrv was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -8.312
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -8.312      -845.104 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.360         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     4.914         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):    26.530         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    45.738         0.000 altera_reserved_tck 
Info (332146): Worst-case hold slack is 0.327
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.327         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     0.345         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.362         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.363         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.363         0.000 altera_reserved_tck 
Info (332146): Worst-case recovery slack is 6.309
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     6.309         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     8.429         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    48.032         0.000 altera_reserved_tck 
    Info (332119):    63.834         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is 0.132
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.132         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     1.149         0.000 altera_reserved_tck 
    Info (332119):     1.337         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     2.104         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.128
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.128         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.595         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.322         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.589         0.000 \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    32.949         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.385         0.000 altera_reserved_tck 
    Info (332119):    99.778         0.000 FPGA_CLK 
Info: Analyzing Fast 1200mV 0C Model
Warning (332060): Node: reset_usbdrv was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC1:UUSB_1|USB_DRVR1:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: USBF_IFC2:UUSB_2|USB_DRVR2:UDRVR|reg_10bits[4] was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Critical Warning (332148): Timing requirements not met
    Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the TimeQuest Timing Analyzer.
Info (332146): Worst-case setup slack is -4.497
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -4.497      -456.625 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     6.017         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     6.745         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):    29.746         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    47.977         0.000 altera_reserved_tck 
Info (332146): Worst-case hold slack is 0.136
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.136         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.140         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     0.167         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.187         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.187         0.000 altera_reserved_tck 
Info (332146): Worst-case recovery slack is 8.617
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     8.617         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     9.866         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.145         0.000 altera_reserved_tck 
    Info (332119):    65.030         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case removal slack is 0.099
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.099         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.580         0.000 altera_reserved_tck 
    Info (332119):     0.705         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.177         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.187
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.187         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[3] 
    Info (332119):     5.654         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    17.369         0.000 \gen_real_pll:gen_tv_pal:mcc_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.601         0.000 \gen_real_pll:gen_tv_pal:mcc_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    33.038         0.000 mcc_pll3|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    49.284         0.000 altera_reserved_tck 
    Info (332119):    99.418         0.000 FPGA_CLK 
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 13 warnings
    Info: Peak virtual memory: 526 megabytes
    Info: Processing ended: Sun Oct  5 21:50:36 2014
    Info: Elapsed time: 00:00:41
    Info: Total CPU time (on all processors): 00:00:35


