TimeQuest Timing Analyzer report for atari800core
Tue Jul 29 23:30:34 2014
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow 1200mV 85C Model Fmax Summary
  7. Timing Closure Recommendations
  8. Slow 1200mV 85C Model Setup Summary
  9. Slow 1200mV 85C Model Hold Summary
 10. Slow 1200mV 85C Model Recovery Summary
 11. Slow 1200mV 85C Model Removal Summary
 12. Slow 1200mV 85C Model Minimum Pulse Width Summary
 13. Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 14. Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 15. Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 16. Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 17. Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 18. Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 19. Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 20. Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 21. Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 22. Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 23. Slow 1200mV 85C Model Minimum Pulse Width: 'clk8'
 24. Setup Times
 25. Hold Times
 26. Clock to Output Times
 27. Minimum Clock to Output Times
 28. Output Enable Times
 29. Minimum Output Enable Times
 30. Output Disable Times
 31. Minimum Output Disable Times
 32. Slow 1200mV 85C Model Metastability Report
 33. Slow 1200mV 0C Model Fmax Summary
 34. Slow 1200mV 0C Model Setup Summary
 35. Slow 1200mV 0C Model Hold Summary
 36. Slow 1200mV 0C Model Recovery Summary
 37. Slow 1200mV 0C Model Removal Summary
 38. Slow 1200mV 0C Model Minimum Pulse Width Summary
 39. Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 40. Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 41. Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 42. Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 43. Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 44. Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 45. Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 46. Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 47. Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 48. Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 49. Slow 1200mV 0C Model Minimum Pulse Width: 'clk8'
 50. Setup Times
 51. Hold Times
 52. Clock to Output Times
 53. Minimum Clock to Output Times
 54. Output Enable Times
 55. Minimum Output Enable Times
 56. Output Disable Times
 57. Minimum Output Disable Times
 58. Slow 1200mV 0C Model Metastability Report
 59. Fast 1200mV 0C Model Setup Summary
 60. Fast 1200mV 0C Model Hold Summary
 61. Fast 1200mV 0C Model Recovery Summary
 62. Fast 1200mV 0C Model Removal Summary
 63. Fast 1200mV 0C Model Minimum Pulse Width Summary
 64. Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 65. Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 66. Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 67. Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 68. Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 69. Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 70. Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 71. Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 72. Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 73. Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 74. Fast 1200mV 0C Model Minimum Pulse Width: 'clk8'
 75. Setup Times
 76. Hold Times
 77. Clock to Output Times
 78. Minimum Clock to Output Times
 79. Output Enable Times
 80. Minimum Output Enable Times
 81. Output Disable Times
 82. Minimum Output Disable Times
 83. Fast 1200mV 0C Model Metastability Report
 84. Multicorner Timing Analysis Summary
 85. Setup Times
 86. Hold Times
 87. Clock to Output Times
 88. Minimum Clock to Output Times
 89. Board Trace Model Assignments
 90. Input Transition Times
 91. Slow Corner Signal Integrity Metrics
 92. Fast Corner Signal Integrity Metrics
 93. Setup Transfers
 94. Hold Transfers
 95. Recovery Transfers
 96. Removal Transfers
 97. Report TCCS
 98. Report RSKM
 99. Unconstrained Paths
100. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; atari800core                                                      ;
; Device Family      ; Cyclone III                                                       ;
; Device Name        ; EP3C25E144C8                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Enabled                                                           ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.25        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;  25.0%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------+
; SDC File List                                        ;
+------------------+--------+--------------------------+
; SDC File Path    ; Status ; Read at                  ;
+------------------+--------+--------------------------+
; atari800core.sdc ; OK     ; Tue Jul 29 23:30:17 2014 ;
+------------------+--------+--------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                             ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+
; Clock Name                                      ; Type      ; Period  ; Frequency  ; Rise  ; Fall   ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source                                            ; Targets                                             ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+
; clk8                                            ; Base      ; 125.000 ; 8.0 MHz    ; 0.000 ; 62.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;                                                   ; { clk8 }                                            ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 8.814   ; 113.46 MHz ; 0.000 ; 4.407  ; 50.00      ; 11        ; 156         ;       ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[0] } ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 17.628  ; 56.73 MHz  ; 0.000 ; 8.814  ; 50.00      ; 11        ; 78          ;       ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[1] } ;
; pll|altpll_component|auto_generated|pll1|clk[2] ; Generated ; 8.814   ; 113.46 MHz ; 4.407 ; 8.814  ; 50.00      ; 11        ; 156         ; 180.0 ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[2] } ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Fmax Summary                                                   ;
+-----------+-----------------+-------------------------------------------------+------+
; Fmax      ; Restricted Fmax ; Clock Name                                      ; Note ;
+-----------+-----------------+-------------------------------------------------+------+
; 61.14 MHz ; 61.14 MHz       ; pll|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 138.7 MHz ; 138.7 MHz       ; pll|altpll_component|auto_generated|pll1|clk[0] ;      ;
+-----------+-----------------+-------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


----------------------------------
; Timing Closure Recommendations ;
----------------------------------
HTML report is unavailable in plain text report export.


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup Summary                                     ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.702 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 1.604 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.319 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.453 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery Summary                                  ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 3.340 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.911 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal Summary                                   ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.894 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 3.883 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width Summary                        ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.098  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.505  ; 0.000         ;
; clk8                                            ; 62.409 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                       ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                             ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.702 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.197     ; 7.916      ;
; 1.006 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.199     ; 7.610      ;
; 1.138 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.194     ; 7.483      ;
; 1.183 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 7.457      ;
; 1.187 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.176     ; 7.452      ;
; 1.219 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 7.425      ;
; 1.242 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 7.377      ;
; 1.251 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 7.383      ;
; 1.265 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 7.379      ;
; 1.266 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.195     ; 7.354      ;
; 1.270 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 7.370      ;
; 1.273 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 16.245     ;
; 1.274 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.207     ; 7.334      ;
; 1.274 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.197     ; 7.344      ;
; 1.279 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 7.361      ;
; 1.281 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 7.362      ;
; 1.294 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.191     ; 7.330      ;
; 1.303 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.199     ; 7.313      ;
; 1.312 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.122     ; 16.195     ;
; 1.313 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 7.329      ;
; 1.329 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 7.305      ;
; 1.333 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.201     ; 7.281      ;
; 1.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 16.206     ;
; 1.352 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 7.290      ;
; 1.362 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 7.281      ;
; 1.371 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.202     ; 7.242      ;
; 1.382 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.197     ; 7.236      ;
; 1.387 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 16.156     ;
; 1.416 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 7.227      ;
; 1.427 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.178     ; 7.210      ;
; 1.438 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 7.181      ;
; 1.439 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.170     ; 7.206      ;
; 1.445 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 7.198      ;
; 1.449 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 7.193      ;
; 1.450 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.183     ; 7.182      ;
; 1.462 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.198     ; 7.155      ;
; 1.472 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.176     ; 7.167      ;
; 1.474 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.198     ; 7.143      ;
; 1.480 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.209     ; 7.126      ;
; 1.500 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 7.142      ;
; 1.503 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 7.116      ;
; 1.518 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.199     ; 7.098      ;
; 1.530 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.122     ; 15.977     ;
; 1.547 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.198     ; 7.070      ;
; 1.559 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 7.060      ;
; 1.565 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.209     ; 7.041      ;
; 1.575 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.178     ; 7.062      ;
; 1.591 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 7.043      ;
; 1.593 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 15.920     ;
; 1.605 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 15.938     ;
; 1.608 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 7.026      ;
; 1.609 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 7.035      ;
; 1.612 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 7.007      ;
; 1.619 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.169     ; 7.027      ;
; 1.620 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 15.898     ;
; 1.621 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 7.020      ;
; 1.626 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.201     ; 6.988      ;
; 1.651 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.989      ;
; 1.664 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.197     ; 6.954      ;
; 1.667 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.967      ;
; 1.668 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 15.881     ;
; 1.678 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.201     ; 6.936      ;
; 1.690 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.200     ; 6.925      ;
; 1.691 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.928      ;
; 1.695 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.199     ; 6.921      ;
; 1.695 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 15.859     ;
; 1.696 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.109     ; 15.824     ;
; 1.706 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.201     ; 6.908      ;
; 1.720 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.204     ; 6.891      ;
; 1.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 15.795     ;
; 1.755 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.889      ;
; 1.771 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.872      ;
; 1.771 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 15.785     ;
; 1.777 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.207     ; 6.831      ;
; 1.783 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.859      ;
; 1.796 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 15.756     ;
; 1.807 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.195     ; 6.813      ;
; 1.819 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.109     ; 15.701     ;
; 1.820 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.198     ; 6.797      ;
; 1.840 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 15.710     ;
; 1.847 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 15.688     ;
; 1.856 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.183     ; 6.776      ;
; 1.857 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.204     ; 6.754      ;
; 1.858 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.782      ;
; 1.859 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.121     ; 15.649     ;
; 1.871 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.197     ; 6.747      ;
; 1.879 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.660     ;
; 1.882 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.199     ; 6.734      ;
; 1.885 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.660     ;
; 1.894 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 15.662     ;
; 1.924 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.610     ;
; 1.926 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.129     ; 15.574     ;
; 1.934 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.610     ;
; 1.949 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 6.692      ;
; 1.959 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 6.682      ;
; 1.960 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|byte_write_r                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.584     ;
; 1.964 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|byte_read_r                                                     ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.580     ;
; 1.982 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 15.535     ;
; 1.992 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[42] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.198     ; 6.625      ;
; 1.996 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.648      ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                ;
+-------+-----------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                            ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.604 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 7.131      ;
; 1.620 ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[13]   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.216     ; 6.849      ;
; 1.722 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 7.003      ;
; 1.724 ; chameleon_cdtv_remote:myIr|bitlength[3]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 7.001      ;
; 1.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.973      ;
; 1.781 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.155     ; 6.749      ;
; 1.797 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.948      ;
; 1.825 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 6.704      ;
; 1.841 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 6.688      ;
; 1.893 ; chameleon_cdtv_remote:myIr|timer[13]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 6.831      ;
; 1.915 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.820      ;
; 1.917 ; chameleon_cdtv_remote:myIr|bitlength[3]             ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.818      ;
; 1.945 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 6.584      ;
; 1.955 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.790      ;
; 1.958 ; chameleon_cdtv_remote:myIr|bitlength[1]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.767      ;
; 1.976 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.155     ; 6.554      ;
; 1.978 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 6.606      ;
; 1.990 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.755      ;
; 1.990 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.755      ;
; 2.022 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 6.561      ;
; 2.038 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 6.545      ;
; 2.047 ; chameleon_cdtv_remote:myIr|timer[14]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 6.677      ;
; 2.062 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.155     ; 6.468      ;
; 2.073 ; chameleon_cdtv_remote:myIr|bitlength[0]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.652      ;
; 2.084 ; chameleon_cdtv_remote:myIr|bitlength[3]             ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.651      ;
; 2.084 ; chameleon_cdtv_remote:myIr|bitlength[3]             ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.651      ;
; 2.086 ; chameleon_cdtv_remote:myIr|timer[13]                ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.648      ;
; 2.088 ; chameleon_cdtv_remote:myIr|bitlength[8]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.637      ;
; 2.092 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.643      ;
; 2.092 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.643      ;
; 2.110 ; sdram_statemachine:sdram_adaptor|delay_reg[5]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 6.419      ;
; 2.142 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 6.441      ;
; 2.148 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.597      ;
; 2.148 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.597      ;
; 2.151 ; chameleon_cdtv_remote:myIr|bitlength[1]             ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.584      ;
; 2.171 ; chameleon_cdtv_remote:myIr|timer[4]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 6.553      ;
; 2.172 ; chameleon_cdtv_remote:myIr|timer[5]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 6.552      ;
; 2.173 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 6.411      ;
; 2.177 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.108     ; 6.400      ;
; 2.178 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 6.351      ;
; 2.184 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 6.350      ;
; 2.189 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.556      ;
; 2.212 ; sdram_statemachine:sdram_adaptor|dqm_mask_sreg[0]   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.190     ; 6.283      ;
; 2.220 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 6.377      ;
; 2.221 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.108     ; 6.356      ;
; 2.222 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 6.306      ;
; 2.224 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 6.305      ;
; 2.228 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 6.306      ;
; 2.238 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 6.290      ;
; 2.240 ; chameleon_cdtv_remote:myIr|timer[14]                ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.494      ;
; 2.257 ; chameleon_cdtv_remote:myIr|bitlength[7]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.468      ;
; 2.266 ; chameleon_cdtv_remote:myIr|bitlength[0]             ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.469      ;
; 2.268 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 6.261      ;
; 2.279 ; chameleon_cdtv_remote:myIr|bitlength[3]             ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.456      ;
; 2.279 ; chameleon_cdtv_remote:myIr|timer[13]                ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.455      ;
; 2.279 ; chameleon_cdtv_remote:myIr|timer[13]                ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.455      ;
; 2.281 ; chameleon_cdtv_remote:myIr|bitlength[8]             ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.454      ;
; 2.281 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 6.316      ;
; 2.287 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.448      ;
; 2.289 ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[10]   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.219     ; 6.177      ;
; 2.291 ; sdram_statemachine:sdram_adaptor|delay_reg[5]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 6.292      ;
; 2.293 ; chameleon_cdtv_remote:myIr|bitlength[4]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.432      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[0]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[1]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[2]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[3]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[4]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[5]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[6]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[7]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[8]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[9]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[10]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[11]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[12]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.300 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[13]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.445      ;
; 2.303 ; chameleon_cdtv_remote:myIr|timer[11]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 6.421      ;
; 2.307 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 6.290      ;
; 2.313 ; chameleon_cdtv_remote:myIr|bitlength[1]             ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.422      ;
; 2.313 ; chameleon_cdtv_remote:myIr|bitlength[1]             ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.422      ;
; 2.331 ; chameleon_cdtv_remote:myIr|timer[12]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 6.393      ;
; 2.342 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 6.186      ;
; 2.347 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.398      ;
; 2.358 ; chameleon_cdtv_remote:myIr|timer[0]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.377      ;
; 2.364 ; chameleon_cdtv_remote:myIr|timer[4]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.370      ;
; 2.365 ; chameleon_cdtv_remote:myIr|timer[5]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.369      ;
; 2.368 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 6.229      ;
; 2.369 ; chameleon_cdtv_remote:myIr|bitlength[5]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.356      ;
; 2.373 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 6.156      ;
; 2.377 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 6.154      ;
; 2.380 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.155     ; 6.150      ;
; 2.382 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.155     ; 6.148      ;
; 2.391 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 6.140      ;
; 2.404 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|ba_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 6.179      ;
; 2.409 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.108     ; 6.168      ;
; 2.411 ; chameleon_cdtv_remote:myIr|bitlength[6]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.314      ;
; 2.412 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|current_code[11]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 6.317      ;
; 2.414 ; chameleon_cdtv_remote:myIr|timer[6]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.321      ;
; 2.415 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|current_code[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 6.314      ;
; 2.415 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|current_code[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 6.314      ;
+-------+-----------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                              ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                  ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.319 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.057      ;
; 0.322 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][6]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.060      ;
; 0.334 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.072      ;
; 0.351 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.089      ;
; 0.358 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.096      ;
; 0.405 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.138      ;
; 0.405 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.140      ;
; 0.405 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.142      ;
; 0.408 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][0]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.143      ;
; 0.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.152      ;
; 0.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.155      ;
; 0.425 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.158      ;
; 0.426 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.161      ;
; 0.429 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.162      ;
; 0.431 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][3]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.166      ;
; 0.433 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][6]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.169      ;
; 0.439 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.172      ;
; 0.440 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.467      ; 1.161      ;
; 0.442 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[5]              ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~portb_address_reg0                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.476      ; 1.172      ;
; 0.442 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[5]              ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~porta_address_reg0                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.475      ; 1.171      ;
; 0.445 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][2]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.180      ;
; 0.447 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.180      ;
; 0.447 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][4]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.182      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[16]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[16]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10]                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[2]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[2]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[3]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[3]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[0]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[0]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_last_enabled_reg                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_last_enabled_reg                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[276]                                                                                                            ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[276]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[89]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[89]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[12]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[12]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[44]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[44]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[66]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[66]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[67]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[67]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[68]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[68]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[75]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[75]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[60]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[60]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[77]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[77]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[69]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[69]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[84]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[84]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[82]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[82]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[34]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[34]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[74]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[74]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[21]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[21]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[91]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[91]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[28]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[28]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[85]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[85]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[273]                                                                                                            ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[273]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[93]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[93]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_ip_overrun_reg                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_ip_overrun_reg                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_ip_framing_reg                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_ip_framing_reg                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hblank_reg                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hblank_reg                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wsync_reg                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[2]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[2]                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[3]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[3]                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|chan2_output_reg                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|chan2_output_reg                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|chan3_output_reg                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|chan3_output_reg                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|chan0_output_reg                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|chan0_output_reg                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass0_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass0_reg                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass1_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass1_reg                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[8]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[8]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[14]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[14]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|pmg_dma_state_reg[2]                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|pmg_dma_state_reg[2]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|pmg_dma_state_reg[0]                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|pmg_dma_state_reg[0]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[0]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[0]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[7]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[7]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[7]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[7]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[1]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[2]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[2]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[2]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[2]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[10]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[10]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                          ;
+-------+--------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                              ; To Node                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.453 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|req_reg                                                                              ; chameleon_usb:usb|req_reg                                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; chameleon_io:chameleon_io|c64_ba_reg                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; chameleon_cdtv_remote:myIr|timer[0]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; chameleon_cdtv_remote:myIr|timer[1]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; chameleon_cdtv_remote:myIr|timer[2]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; chameleon_cdtv_remote:myIr|timer[3]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; chameleon_cdtv_remote:myIr|timer[6]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; chameleon_cdtv_remote:myIr|timer[9]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; chameleon_cdtv_remote:myIr|timer[12]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; chameleon_cdtv_remote:myIr|timer[14]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; chameleon_io:chameleon_io|c64_data_reg[4]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; sdram_statemachine:sdram_adaptor|reply_reg                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_RESET                                                                    ; chameleon_usb:usb|state.STATE_RESET                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                     ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; chameleon_usb:usb|state.STATE_ADDR2                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_ADDR1                                                                    ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_ADDR0                                                                    ; chameleon_usb:usb|state.STATE_ADDR0                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_LEN1                                                                     ; chameleon_usb:usb|state.STATE_LEN1                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_LEN0                                                                     ; chameleon_usb:usb|state.STATE_LEN0                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; chameleon_cdtv_remote:myIr|current_code[4]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|current_code[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; chameleon_cdtv_remote:myIr|current_code[1]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; chameleon_cdtv_remote:myIr|current_code[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; chameleon_cdtv_remote:myIr|current_code[3]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; chameleon_cdtv_remote:myIr|current_code[5]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; chameleon_cdtv_remote:myIr|current_code[7]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|current_code[11]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.466 ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; chameleon_io:chameleon_io|mux_clk_reg                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.466 ; chameleon_io:chameleon_io|mux_toggle                                                                   ; chameleon_io:chameleon_io|mux_toggle                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.466 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.466 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.501 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.793      ;
; 0.502 ; chameleon_usb:usb|state.STATE_ADDR3                                                                    ; chameleon_usb:usb|state.STATE_ADDR2                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.793      ;
; 0.502 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.794      ;
; 0.503 ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.795      ;
; 0.503 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.795      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.795      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.504 ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.504 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|rom_lh_n_reg   ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.796      ;
; 0.504 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.505 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.796      ;
; 0.505 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.796      ;
; 0.505 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[84]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.796      ;
; 0.506 ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.797      ;
; 0.506 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.797      ;
; 0.509 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[5]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[5]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.801      ;
; 0.509 ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.801      ;
; 0.510 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[7]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[6]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.802      ;
; 0.510 ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.801      ;
; 0.510 ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.801      ;
; 0.510 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.802      ;
; 0.511 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[7]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[7]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.803      ;
; 0.511 ; chameleon_io:chameleon_io|mux_state.MUX_CLKPORT                                                        ; chameleon_io:chameleon_io|mux_state.MUX_MMC5L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.803      ;
; 0.511 ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[97]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localEnd                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.803      ;
; 0.512 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[5]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[4]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.804      ;
; 0.512 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC4H                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.804      ;
; 0.513 ; chameleon_cdtv_remote:myIr|shiftreg[5]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.804      ;
+-------+--------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 3.340 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.328     ; 5.005      ;
; 3.340 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.328     ; 5.005      ;
; 3.342 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.326     ; 5.005      ;
; 3.342 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.325     ; 5.006      ;
; 3.342 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.326     ; 5.005      ;
; 3.343 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.324     ; 5.006      ;
; 3.343 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.327     ; 5.003      ;
; 3.343 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.328     ; 5.002      ;
; 3.343 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.327     ; 5.003      ;
; 3.343 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.324     ; 5.006      ;
; 3.343 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.325     ; 5.005      ;
; 3.350 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.384     ; 4.939      ;
; 3.350 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.384     ; 4.939      ;
; 3.352 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 5.132      ;
; 3.352 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 5.132      ;
; 3.353 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.249     ; 5.083      ;
; 3.353 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.251     ; 5.081      ;
; 3.354 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.199     ; 5.132      ;
; 3.354 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.199     ; 5.132      ;
; 3.354 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.198     ; 5.133      ;
; 3.354 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.247     ; 5.084      ;
; 3.354 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.253     ; 5.078      ;
; 3.354 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.198     ; 5.133      ;
; 3.354 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.199     ; 5.132      ;
; 3.354 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 5.130      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.197     ; 5.133      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.198     ; 5.132      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.200     ; 5.130      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 5.129      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.200     ; 5.130      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.197     ; 5.133      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.192     ; 5.138      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.192     ; 5.138      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.200     ; 5.130      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.200     ; 5.130      ;
; 3.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.200     ; 5.130      ;
; 3.359 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.244     ; 5.082      ;
; 3.359 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.246     ; 5.080      ;
; 3.359 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.249     ; 5.077      ;
; 3.359 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.245     ; 5.081      ;
; 3.359 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.245     ; 5.081      ;
; 3.360 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.241     ; 5.084      ;
; 3.362 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.380     ; 4.931      ;
; 3.362 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.380     ; 4.931      ;
; 3.362 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.257     ; 5.066      ;
; 3.362 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.257     ; 5.066      ;
; 3.372 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.246     ; 5.067      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.378     ; 4.921      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.253     ; 5.058      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.253     ; 5.058      ;
; 3.386 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.251     ; 5.048      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.044 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 4.563      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.194     ; 4.566      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.190     ; 4.570      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.190     ; 4.570      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.189     ; 4.571      ;
; 4.055 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.190     ; 4.570      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.206     ; 4.553      ;
; 4.056 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 4.552      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                  ;
+-------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                                                                                                           ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 8.911 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 8.657      ;
; 8.911 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.650      ;
; 8.911 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[16]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.656      ;
; 8.911 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[13]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.656      ;
; 8.911 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 8.657      ;
; 8.911 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[15]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.656      ;
; 8.911 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_ready_reg                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 8.657      ;
; 8.912 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 8.652      ;
; 8.912 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 8.652      ;
; 8.912 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 8.652      ;
; 8.912 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 8.652      ;
; 8.912 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 8.650      ;
; 8.912 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[3]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 8.650      ;
; 8.912 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 8.650      ;
; 8.912 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[2]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 8.650      ;
; 8.912 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[16]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 8.650      ;
; 8.912 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[17]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 8.650      ;
; 8.928 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 8.600      ;
; 8.928 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 8.600      ;
; 8.928 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 8.600      ;
; 8.934 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 8.606      ;
; 8.946 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 8.618      ;
; 8.946 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 8.618      ;
; 8.946 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 8.618      ;
; 8.946 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 8.618      ;
; 8.946 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[7]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 8.618      ;
; 8.978 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.558      ;
; 8.978 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.558      ;
; 8.978 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.558      ;
; 8.978 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.558      ;
; 8.978 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.558      ;
; 8.978 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.558      ;
; 8.979 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 8.561      ;
; 8.979 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 8.561      ;
; 9.398 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][0]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.128      ;
; 9.403 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 8.124      ;
; 9.403 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 8.124      ;
; 9.403 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 8.124      ;
; 9.410 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 8.117      ;
; 9.410 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[7]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 8.118      ;
; 9.410 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 8.117      ;
; 9.420 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.117      ;
; 9.421 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 8.100      ;
; 9.421 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[11]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 8.100      ;
; 9.421 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.105      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.114      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.114      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 8.118      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 8.119      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 8.119      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.115      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.117      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.117      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 8.119      ;
; 9.423 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.096     ; 8.110      ;
; 9.423 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.096     ; 8.110      ;
; 9.423 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[10]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 8.094      ;
; 9.423 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 8.094      ;
; 9.429 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.109     ; 8.091      ;
; 9.429 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.109     ; 8.091      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[26]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[26]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[26]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[28]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[22]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[21]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[20]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[20]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[19]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[16]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[16]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[7]                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[6]                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_last_reg                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[3]                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[5]                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 8.127      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[13]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[31]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[12]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[12]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[12]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[15]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[18]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[11]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[11]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[8]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[8]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[8]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[17]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[17]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
; 9.434 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[14]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.133      ;
+-------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.894 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|dffe4                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.535      ;
; 1.926 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.564      ;
; 1.926 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.564      ;
; 1.926 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.564      ;
; 1.926 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.564      ;
; 1.926 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.564      ;
; 1.926 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.564      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.947 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.546      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 1.972 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.393      ; 2.576      ;
; 3.045 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.439      ; 3.695      ;
; 3.045 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.439      ; 3.695      ;
; 3.045 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.439      ; 3.695      ;
; 3.045 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.439      ; 3.695      ;
; 3.045 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.439      ; 3.695      ;
; 3.045 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.439      ; 3.695      ;
; 3.045 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.439      ; 3.695      ;
; 3.987 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[22]                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.104      ; 4.303      ;
; 3.987 ; reset_n                                                                                                                                                                             ; chameleon_reset_n_reg[0]                                                                                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[2]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[14]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[3]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[4]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[5]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[6]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[7]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[8]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[9]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[10]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[11]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[12]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[13]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.104      ; 4.303      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[14]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.104      ; 4.303      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[15]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.104      ; 4.303      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[16]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.104      ; 4.303      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[17]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.104      ; 4.303      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[15]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[18]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.104      ; 4.303      ;
; 3.987 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[16]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 4.300      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.298      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.298      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.298      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.298      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.298      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 4.297      ;
; 3.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.298      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.885 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.201      ; 4.318      ;
; 3.886 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.196      ; 4.314      ;
; 3.886 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.200      ; 4.318      ;
; 3.886 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.200      ; 4.318      ;
; 3.886 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.200      ; 4.318      ;
; 3.887 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.199      ; 4.318      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 3.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 4.312      ;
; 4.433 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.202      ; 4.781      ;
; 4.433 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.202      ; 4.781      ;
; 4.433 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.194      ; 4.773      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.197      ; 4.777      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.196      ; 4.776      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 4.775      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.194      ; 4.774      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 4.773      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.194      ; 4.774      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 4.775      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.196      ; 4.776      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.197      ; 4.777      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.196      ; 4.776      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.194      ; 4.774      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 4.775      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.194      ; 4.774      ;
; 4.434 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 4.773      ;
; 4.438 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 4.777      ;
; 4.438 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 4.777      ;
; 4.449 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 4.736      ;
; 4.459 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.146      ; 4.751      ;
; 4.465 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.139      ; 4.750      ;
; 4.465 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.139      ; 4.750      ;
; 4.474 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.149      ; 4.769      ;
; 4.475 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 4.772      ;
; 4.475 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 4.762      ;
; 4.475 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.146      ; 4.767      ;
; 4.475 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 4.764      ;
; 4.475 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.147      ; 4.768      ;
; 4.475 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.147      ; 4.768      ;
; 4.475 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.145      ; 4.766      ;
; 4.476 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 4.760      ;
; 4.477 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 4.766      ;
; 4.478 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 4.759      ;
; 4.478 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 4.759      ;
; 4.522 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.065      ; 4.672      ;
; 4.522 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 4.669      ;
; 4.522 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 4.670      ;
; 4.522 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 4.668      ;
; 4.522 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 4.671      ;
; 4.522 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 4.669      ;
; 4.522 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 4.670      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                       ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[16]                                                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[17]                                                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[18]                                                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[19]                                                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[20]                                                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[21]                                                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[22]                                                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[23]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[0]                                               ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[11]                                              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[1]                                               ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[2]                                               ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[0]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[1]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[2]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[3]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[4]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[0]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[1]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[2]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[3]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[4]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_1                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_2                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_3                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_4                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_cdtv                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_genlock                                                   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_power                                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_stop                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[13]                                                  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[14]                                                  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[0] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[1] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[2] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[3] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[4] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[0] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[1] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[2] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[3] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[4] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[0]                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[10]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[11]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[12]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[13]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[14]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[15]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[1]                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[2]                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[3]                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[4]                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[5]                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[6]                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[7]                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[8]                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[9]                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|command.CMD_NONE                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|command.CMD_READ                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|command.CMD_WRITE                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[0]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[1]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[2]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[3]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[4]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[5]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[6]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[7]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[8]                                                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q_trigger                                            ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[0]                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[1]                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[2]                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[3]                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[4]                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[5]                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[6]                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[7]                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[8]                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                             ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                             ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_STOP                             ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|serial_clk_dly                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|serial_clk_reg                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|req_reg                                                                ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                                                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------+
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|PC[10]                        ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]                    ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[7]                       ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[3]                                            ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[1]                                            ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[3]                                            ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[3]                                            ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:prior_short_delay|shift_reg[0][4]      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[12]                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[13]                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14]                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18]                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22]                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25]                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]                    ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchPage   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchTaken  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleIndirect     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleJump         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreRead      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreWrite     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleRead2        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleStack4       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theWe                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gractl_reg[0]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gractl_reg[1]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gractl_reg[2]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[3]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[4]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[5]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[6]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[1]                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[2]                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[3]                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[4]                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[5]                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[6]                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig0_reg                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig1_reg                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig2_reg                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[0]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[3]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[4]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[5]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[6]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[7]                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[28][1]                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[28][3]                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[28][4]                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[28][6]                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[29][1]                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[29][3]                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[29][4]                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[29][6]                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; half_scandouble_enable_reg                                                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_received_reg                                                                    ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[0]                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[1]                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[2]                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[3]                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[4]                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[5]                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[6]                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[7]                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_reg[2]                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_reg[6]                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|hsync_reg                                                                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|output_address_reg[10]                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|vga_hsync_reg                                                                                                    ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|vga_odd_reg                                                                                                      ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[13]                                 ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[14]                                 ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[5]                                  ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[6]                                  ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|antic_fetch_real_reg                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|cpu_fetch_real_reg                           ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg                               ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|write_enable_reg                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                   ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[0] ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[1] ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[2] ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[3] ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[4] ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[5] ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|display_shift_reg[0]                                 ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                  ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                        ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                    ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg                                  ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|irqReg                        ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpf0_raw_reg[5]                                      ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[3]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[4]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[5]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[6]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                                          ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'clk8'                                                                                           ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.449  ; 62.449       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.481  ; 62.481       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.518  ; 62.518       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.551  ; 62.551       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.159 ; 2.335 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.482 ; 2.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 2.782 ; 2.886 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 2.199 ; 2.434 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 2.782 ; 2.886 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.316 ; 2.537 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 2.410 ; 2.608 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 2.001 ; 2.189 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 1.605 ; 1.757 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.602 ; 3.554 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.596 ; 2.522 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.798 ; 2.787 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.581 ; 2.517 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.378 ; 3.427 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.164 ; 3.145 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.588 ; 2.584 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.048 ; 2.990 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.173 ; 3.129 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.238 ; 3.224 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.831 ; 2.737 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.749 ; 2.756 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.920 ; 2.843 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.900 ; 2.830 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.602 ; 3.554 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.222 ; 3.167 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.245 ; 3.136 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 3.474 ; 3.509 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 5.778 ; 6.042 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 5.134 ; 5.077 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; freeze_n     ; clk8       ; 2.828 ; 2.951 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; 5.367 ; 5.592 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -1.407 ; -1.577 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -1.698 ; -1.829 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -1.172 ; -1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.405 ; -1.606 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -1.727 ; -1.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -1.526 ; -1.753 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.172 ; -1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -1.238 ; -1.407 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -0.846 ; -1.006 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.642 ; -0.691 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.644 ; -0.693 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.644 ; -0.693 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.606 ; -0.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.597 ; -0.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.598 ; -0.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.598 ; -0.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.597 ; -0.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.596 ; -0.644 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.658 ; -0.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.658 ; -0.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -2.668 ; -2.703 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -2.603 ; -2.672 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -2.312 ; -2.332 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; freeze_n     ; clk8       ; -2.049 ; -2.169 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; -4.480 ; -4.693 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.087 ; 6.145 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.087 ; 6.145 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.901 ; 5.079 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.697 ; 4.917 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.660 ; 4.871 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 6.741 ; 6.514 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.138 ; 5.347 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 4.551 ; 4.712 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 3.994 ; 4.076 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.219 ; 4.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.138 ; 5.347 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.810 ; 4.869 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.373 ; 3.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.653 ; 3.739 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.365 ; 3.320 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.454 ; 3.423 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.808 ; 4.867 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.637 ; 3.723 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.450 ; 3.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.450 ; 3.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.448 ; 3.417 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.810 ; 4.869 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.456 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.368 ; 3.323 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.456 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.444 ; 3.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.801 ; 4.860 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.442 ; 3.411 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.461 ; 3.404 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.449 ; 3.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.438 ; 3.381 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.449 ; 3.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.451 ; 3.394 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.357 ; 3.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.357 ; 3.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.428 ; 3.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.439 ; 3.382 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.438 ; 3.381 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 6.105 ; 6.002 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 6.105 ; 5.720 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 3.997 ; 3.922 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 4.039 ; 3.972 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 6.063 ; 6.002 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 4.810 ; 4.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 6.759 ; 6.571 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 6.759 ; 6.435 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 6.638 ; 6.571 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 5.772 ; 5.757 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 6.677 ; 6.504 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.796 ; 5.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.896 ; 5.053 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 6.980 ; 7.169 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 8.385 ; 8.263 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 5.922 ; 5.577 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 5.242 ; 5.041 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 5.405 ; 5.200 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 8.385 ; 8.263 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 6.658 ; 6.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.223 ; 6.195 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 7.459 ; 7.196 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.116 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.995 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 4.096 ; 4.300 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 5.529 ; 5.581 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.328 ; 4.500 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.132 ; 4.344 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.096 ; 4.300 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 6.097 ; 5.878 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 3.456 ; 3.536 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 3.992 ; 4.148 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 3.456 ; 3.536 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 3.673 ; 3.779 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 4.554 ; 4.756 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.847 ; 2.803 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 2.855 ; 2.811 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.134 ; 3.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 2.847 ; 2.803 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 2.936 ; 2.906 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.290 ; 4.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.119 ; 3.206 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 2.932 ; 2.902 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 2.932 ; 2.902 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 2.930 ; 2.900 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.293 ; 4.353 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 2.936 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 2.850 ; 2.806 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 2.936 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.370 ; 4.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.926 ; 2.896 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.283 ; 4.343 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.924 ; 2.894 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.941 ; 2.885 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.929 ; 2.873 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.918 ; 2.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.370 ; 4.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.929 ; 2.873 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.931 ; 2.875 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 2.908 ; 2.852 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 2.919 ; 2.863 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 2.918 ; 2.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.461 ; 3.388 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 5.485 ; 5.114 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 3.461 ; 3.388 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 3.501 ; 3.435 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 5.502 ; 5.446 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 4.242 ; 4.163 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.163 ; 5.139 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 6.115 ; 5.804 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 5.998 ; 5.933 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 5.163 ; 5.147 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 6.036 ; 5.869 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.190 ; 5.139 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.323 ; 4.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 6.323 ; 6.506 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 4.656 ; 4.462 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 5.308 ; 4.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.656 ; 4.462 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.814 ; 4.617 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 7.729 ; 7.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 6.014 ; 5.785 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 5.599 ; 5.572 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.787 ; 6.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 6.643 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.526 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 5.794 ; 5.794 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 6.182 ; 6.182 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.794 ; 5.794 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.794 ; 5.794 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 6.096 ; 6.096 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 6.328 ; 6.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 6.401 ; 6.401 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 6.675 ; 6.675 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 6.331 ; 6.331 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 6.331 ; 6.331 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 6.760 ; 6.760 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 6.675 ; 6.675 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 6.401 ; 6.401 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 6.068 ; 6.068 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 6.086 ; 6.086 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 6.183 ; 6.183 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 6.183 ; 6.183 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.648 ; 4.708 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.021 ; 5.081 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.648 ; 4.708 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.648 ; 4.708 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.928 ; 4.994 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.151 ; 5.217 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.221 ; 5.287 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.483 ; 5.549 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.153 ; 5.219 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.153 ; 5.219 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.565 ; 5.631 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.483 ; 5.549 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.221 ; 5.287 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.901 ; 4.967 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.918 ; 4.984 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.022 ; 5.082 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.022 ; 5.082 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 5.432     ; 5.563     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.795     ; 5.926     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.432     ; 5.563     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.432     ; 5.563     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.692     ; 5.829     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.900     ; 6.037     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.954     ; 6.091     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 6.314     ; 6.451     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 6.005     ; 6.142     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 6.005     ; 6.142     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 6.406     ; 6.543     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 6.314     ; 6.451     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.954     ; 6.091     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.672     ; 5.809     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.682     ; 5.819     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.792     ; 5.923     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.792     ; 5.923     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.427     ; 4.427     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.775     ; 4.775     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.427     ; 4.427     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.427     ; 4.427     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.672     ; 4.672     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.871     ; 4.871     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.923     ; 4.923     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.269     ; 5.269     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.971     ; 4.971     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.971     ; 4.971     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.357     ; 5.357     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.269     ; 5.269     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.923     ; 4.923     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.652     ; 4.652     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.662     ; 4.662     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.773     ; 4.773     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.773     ; 4.773     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


----------------------------------------------
; Slow 1200mV 85C Model Metastability Report ;
----------------------------------------------
No synchronizer chains to report.


+---------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Fmax Summary                                                     ;
+------------+-----------------+-------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                      ; Note ;
+------------+-----------------+-------------------------------------------------+------+
; 64.21 MHz  ; 64.21 MHz       ; pll|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 146.54 MHz ; 146.54 MHz      ; pll|altpll_component|auto_generated|pll1|clk[0] ;      ;
+------------+-----------------+-------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.279 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 1.946 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold Summary                                       ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.308 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.402 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery Summary                                   ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 3.729 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 9.421 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal Summary                                    ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.711 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 3.497 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width Summary                         ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.100  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.508  ; 0.000         ;
; clk8                                            ; 62.394 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                        ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                             ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.279 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 7.363      ;
; 1.481 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 7.160      ;
; 1.593 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.153     ; 7.070      ;
; 1.607 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 7.058      ;
; 1.656 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.989      ;
; 1.672 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.149     ; 6.995      ;
; 1.678 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.148     ; 6.990      ;
; 1.692 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.973      ;
; 1.709 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 6.939      ;
; 1.710 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.170     ; 6.936      ;
; 1.711 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.157     ; 6.948      ;
; 1.715 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.950      ;
; 1.724 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.170     ; 6.922      ;
; 1.731 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.147     ; 6.938      ;
; 1.735 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.930      ;
; 1.748 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.157     ; 6.911      ;
; 1.766 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.879      ;
; 1.775 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.147     ; 6.894      ;
; 1.784 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.177     ; 6.855      ;
; 1.793 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.851      ;
; 1.795 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.846      ;
; 1.804 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.149     ; 6.863      ;
; 1.815 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 6.827      ;
; 1.826 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.148     ; 6.842      ;
; 1.827 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.182     ; 6.807      ;
; 1.838 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.154     ; 6.824      ;
; 1.848 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.159     ; 6.809      ;
; 1.851 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.814      ;
; 1.852 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.147     ; 6.817      ;
; 1.858 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.148     ; 6.810      ;
; 1.871 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.153     ; 6.792      ;
; 1.882 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.761      ;
; 1.891 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.774      ;
; 1.899 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.183     ; 6.734      ;
; 1.931 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.714      ;
; 1.950 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.183     ; 6.683      ;
; 1.954 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.690      ;
; 1.993 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.154     ; 6.669      ;
; 1.993 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.157     ; 6.666      ;
; 1.993 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.651      ;
; 2.001 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 6.641      ;
; 2.005 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.640      ;
; 2.031 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.149     ; 6.636      ;
; 2.033 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.150     ; 6.633      ;
; 2.036 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.157     ; 6.623      ;
; 2.048 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.593      ;
; 2.051 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.147     ; 6.618      ;
; 2.055 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.478     ;
; 2.061 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.158     ; 6.597      ;
; 2.068 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 6.574      ;
; 2.071 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.170     ; 6.575      ;
; 2.086 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.178     ; 6.552      ;
; 2.086 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.559      ;
; 2.097 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.544      ;
; 2.121 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.544      ;
; 2.121 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.148     ; 6.547      ;
; 2.125 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.519      ;
; 2.140 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.182     ; 6.494      ;
; 2.151 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 6.491      ;
; 2.156 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.509      ;
; 2.156 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.485      ;
; 2.172 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 15.352     ;
; 2.202 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.442      ;
; 2.218 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.149     ; 6.449      ;
; 2.220 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.178     ; 6.418      ;
; 2.234 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.159     ; 6.423      ;
; 2.244 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.401      ;
; 2.247 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 15.316     ;
; 2.265 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.380      ;
; 2.284 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.381      ;
; 2.314 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 15.214     ;
; 2.315 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 6.327      ;
; 2.319 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.152     ; 6.345      ;
; 2.334 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.152     ; 6.330      ;
; 2.334 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.199     ;
; 2.361 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 15.163     ;
; 2.364 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 6.278      ;
; 2.364 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 15.190     ;
; 2.369 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[42] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.275      ;
; 2.379 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.148     ; 6.289      ;
; 2.387 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.157     ; 6.272      ;
; 2.393 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.148     ; 6.275      ;
; 2.417 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.147     ; 6.252      ;
; 2.438 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.205      ;
; 2.446 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.197      ;
; 2.458 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[17] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.207      ;
; 2.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.068     ;
; 2.470 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.153     ; 6.193      ;
; 2.487 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.046     ;
; 2.497 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.177     ; 6.142      ;
; 2.506 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 15.052     ;
; 2.510 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.149     ; 6.157      ;
; 2.525 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.149     ; 6.142      ;
; 2.526 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 15.037     ;
; 2.532 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 6.104      ;
; 2.541 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.176     ; 6.099      ;
; 2.553 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 15.001     ;
; 2.556 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.147     ; 6.113      ;
; 2.558 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.178     ; 6.080      ;
; 2.560 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.149     ; 6.107      ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                 ;
+-------+-----------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                            ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.946 ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[13]   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.192     ; 6.552      ;
; 1.990 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.754      ;
; 2.135 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.609      ;
; 2.166 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.065     ; 6.585      ;
; 2.216 ; chameleon_cdtv_remote:myIr|bitlength[3]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.522      ;
; 2.227 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.511      ;
; 2.234 ; chameleon_cdtv_remote:myIr|timer[13]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.503      ;
; 2.249 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 6.304      ;
; 2.311 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.065     ; 6.440      ;
; 2.343 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 6.210      ;
; 2.357 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.065     ; 6.394      ;
; 2.357 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.065     ; 6.394      ;
; 2.365 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 6.188      ;
; 2.410 ; chameleon_cdtv_remote:myIr|timer[13]                ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.334      ;
; 2.416 ; chameleon_cdtv_remote:myIr|bitlength[1]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.322      ;
; 2.437 ; chameleon_cdtv_remote:myIr|bitlength[3]             ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.308      ;
; 2.439 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 6.157      ;
; 2.448 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.297      ;
; 2.450 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 6.151      ;
; 2.455 ; chameleon_cdtv_remote:myIr|timer[14]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.282      ;
; 2.466 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 6.087      ;
; 2.476 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 6.125      ;
; 2.482 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 6.071      ;
; 2.498 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 6.103      ;
; 2.502 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.065     ; 6.249      ;
; 2.502 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.065     ; 6.249      ;
; 2.502 ; sdram_statemachine:sdram_adaptor|dqm_mask_sreg[0]   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.170     ; 6.018      ;
; 2.504 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.135     ; 6.051      ;
; 2.520 ; chameleon_cdtv_remote:myIr|bitlength[3]             ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.225      ;
; 2.520 ; chameleon_cdtv_remote:myIr|bitlength[3]             ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.225      ;
; 2.522 ; chameleon_cdtv_remote:myIr|bitlength[0]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.216      ;
; 2.531 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.214      ;
; 2.531 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.214      ;
; 2.539 ; chameleon_cdtv_remote:myIr|timer[5]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.198      ;
; 2.540 ; chameleon_cdtv_remote:myIr|timer[4]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.197      ;
; 2.549 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.065     ; 6.202      ;
; 2.552 ; chameleon_cdtv_remote:myIr|bitlength[8]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.186      ;
; 2.555 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 6.041      ;
; 2.574 ; sdram_statemachine:sdram_adaptor|delay_reg[5]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 5.979      ;
; 2.599 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 6.002      ;
; 2.601 ; chameleon_cdtv_remote:myIr|timer[13]                ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.143      ;
; 2.601 ; chameleon_cdtv_remote:myIr|timer[13]                ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.143      ;
; 2.608 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 5.943      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[0]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[1]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[2]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[3]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[4]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[5]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[6]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[7]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[8]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[9]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[10]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[11]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[12]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.617 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|bitlength[13]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 6.133      ;
; 2.619 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 5.982      ;
; 2.629 ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[10]   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.865      ;
; 2.631 ; chameleon_cdtv_remote:myIr|timer[14]                ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.113      ;
; 2.631 ; chameleon_cdtv_remote:myIr|timer[11]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.106      ;
; 2.637 ; chameleon_cdtv_remote:myIr|bitlength[1]             ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.108      ;
; 2.642 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.131     ; 5.917      ;
; 2.644 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.969      ;
; 2.665 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.889      ;
; 2.675 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|ba_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 5.926      ;
; 2.685 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.928      ;
; 2.694 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.065     ; 6.057      ;
; 2.707 ; sdram_statemachine:sdram_adaptor|delay_reg[5]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 5.894      ;
; 2.710 ; chameleon_cdtv_remote:myIr|timer[12]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.027      ;
; 2.711 ; chameleon_cdtv_remote:myIr|bitlength[7]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.027      ;
; 2.715 ; chameleon_cdtv_remote:myIr|timer[5]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.029      ;
; 2.716 ; chameleon_cdtv_remote:myIr|timer[4]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.028      ;
; 2.716 ; chameleon_cdtv_remote:myIr|bitlength[3]             ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.029      ;
; 2.720 ; chameleon_cdtv_remote:myIr|bitlength[1]             ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.025      ;
; 2.720 ; chameleon_cdtv_remote:myIr|bitlength[1]             ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.025      ;
; 2.726 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|current_code[11]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.013      ;
; 2.727 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.018      ;
; 2.728 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|current_code[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.011      ;
; 2.728 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|current_code[2]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.011      ;
; 2.729 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|current_code[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.010      ;
; 2.737 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 5.814      ;
; 2.743 ; chameleon_cdtv_remote:myIr|bitlength[0]             ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.002      ;
; 2.743 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.870      ;
; 2.753 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 5.798      ;
; 2.758 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.131     ; 5.801      ;
; 2.761 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 5.835      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[0]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[1]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[2]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[3]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[4]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[5]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[6]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[7]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[8]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[9]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[10]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[11]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
; 2.762 ; chameleon_cdtv_remote:myIr|timer[2]                 ; chameleon_cdtv_remote:myIr|bitlength[12]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.066     ; 5.988      ;
+-------+-----------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                               ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                  ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.308 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 0.965      ;
; 0.310 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][6]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 0.967      ;
; 0.322 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 0.979      ;
; 0.335 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 0.992      ;
; 0.340 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 0.997      ;
; 0.384 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.423      ; 1.037      ;
; 0.390 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.046      ;
; 0.393 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.049      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|chan0_output_reg                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|chan0_output_reg                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass0_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass0_reg                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass1_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass1_reg                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[0]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[0]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[7]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[7]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[0]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[0]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[7]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[7]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[1]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[1]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[1]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[1]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[1]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[1]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[12]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[12]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[7]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[7]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[7]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[7]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[0]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[2]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[1]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[3]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[3]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[4]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[4]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[5]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[5]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[7]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[7]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[9]                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[9]                                                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[36]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[36]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[54]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[54]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[4]                                                                                                              ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[4]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[33]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[33]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                           ;
+-------+--------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                              ; To Node                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.402 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; chameleon_io:chameleon_io|c64_ba_reg                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; chameleon_cdtv_remote:myIr|timer[9]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; chameleon_cdtv_remote:myIr|timer[12]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; chameleon_cdtv_remote:myIr|timer[14]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; chameleon_io:chameleon_io|c64_data_reg[4]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; chameleon_usb:usb|state.STATE_ADDR2                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_ADDR1                                                                    ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_ADDR0                                                                    ; chameleon_usb:usb|state.STATE_ADDR0                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_LEN1                                                                     ; chameleon_usb:usb|state.STATE_LEN1                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_LEN0                                                                     ; chameleon_usb:usb|state.STATE_LEN0                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; chameleon_cdtv_remote:myIr|timer[0]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; chameleon_cdtv_remote:myIr|timer[1]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; chameleon_cdtv_remote:myIr|timer[2]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; chameleon_cdtv_remote:myIr|timer[3]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; chameleon_cdtv_remote:myIr|timer[6]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; chameleon_cdtv_remote:myIr|current_code[4]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|current_code[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; chameleon_cdtv_remote:myIr|current_code[1]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; chameleon_cdtv_remote:myIr|current_code[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; chameleon_cdtv_remote:myIr|current_code[3]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; chameleon_cdtv_remote:myIr|current_code[5]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; chameleon_cdtv_remote:myIr|current_code[7]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|current_code[11]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|state.STATE_RESET                                                                    ; chameleon_usb:usb|state.STATE_RESET                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                     ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|req_reg                                                                              ; chameleon_usb:usb|req_reg                                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; sdram_statemachine:sdram_adaptor|reply_reg                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.417 ; chameleon_io:chameleon_io|mux_toggle                                                                   ; chameleon_io:chameleon_io|mux_toggle                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.684      ;
; 0.417 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.684      ;
; 0.418 ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; chameleon_io:chameleon_io|mux_clk_reg                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.418 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.464 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.730      ;
; 0.469 ; chameleon_usb:usb|state.STATE_ADDR3                                                                    ; chameleon_usb:usb|state.STATE_ADDR2                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.736      ;
; 0.469 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.736      ;
; 0.470 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.736      ;
; 0.470 ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.737      ;
; 0.470 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.738      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localEnd                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.738      ;
; 0.472 ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|rom_lh_n_reg   ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.472 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.739      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.739      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.739      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[84]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.739      ;
; 0.473 ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.739      ;
; 0.475 ; chameleon_cdtv_remote:myIr|bitlength[13]                                                               ; chameleon_cdtv_remote:myIr|bitlength[13]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.742      ;
; 0.477 ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.743      ;
; 0.477 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[5]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[5]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.743      ;
; 0.478 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[97]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.744      ;
; 0.478 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[7]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[6]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.744      ;
; 0.478 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                    ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.745      ;
; 0.479 ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.746      ;
; 0.479 ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_cdtv_remote:myIr|shiftreg[5]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[5]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[4]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[7]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[7]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.480 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC4H                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.746      ;
; 0.480 ; chameleon_io:chameleon_io|mux_state.MUX_CLKPORT                                                        ; chameleon_io:chameleon_io|mux_state.MUX_MMC5L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.746      ;
+-------+--------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 3.729 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.302     ; 4.648      ;
; 3.729 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.302     ; 4.648      ;
; 3.729 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.299     ; 4.651      ;
; 3.729 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.302     ; 4.648      ;
; 3.729 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.299     ; 4.651      ;
; 3.729 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.302     ; 4.648      ;
; 3.730 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.298     ; 4.651      ;
; 3.730 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.299     ; 4.650      ;
; 3.730 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.302     ; 4.647      ;
; 3.730 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.299     ; 4.650      ;
; 3.730 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.298     ; 4.651      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 4.762      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.759      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.759      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.759      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.759      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 4.762      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.174     ; 4.767      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.174     ; 4.767      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.181     ; 4.760      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.181     ; 4.760      ;
; 3.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.759      ;
; 3.750 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 4.762      ;
; 3.750 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 4.761      ;
; 3.750 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.758      ;
; 3.750 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 4.761      ;
; 3.750 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 4.762      ;
; 3.750 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 4.761      ;
; 3.750 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 4.760      ;
; 3.750 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.758      ;
; 3.759 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.351     ; 4.569      ;
; 3.759 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.351     ; 4.569      ;
; 3.767 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.348     ; 4.564      ;
; 3.767 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.348     ; 4.564      ;
; 3.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.224     ; 4.697      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.224     ; 4.696      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.227     ; 4.693      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.229     ; 4.691      ;
; 3.776 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.347     ; 4.556      ;
; 3.778 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.219     ; 4.693      ;
; 3.778 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.221     ; 4.691      ;
; 3.778 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.225     ; 4.687      ;
; 3.778 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.220     ; 4.692      ;
; 3.778 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.220     ; 4.692      ;
; 3.779 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.231     ; 4.680      ;
; 3.779 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.231     ; 4.680      ;
; 3.779 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.216     ; 4.695      ;
; 3.787 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.228     ; 4.675      ;
; 3.787 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.228     ; 4.675      ;
; 3.787 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.222     ; 4.681      ;
; 3.796 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.227     ; 4.667      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.421 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.209      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.429 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 4.215      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 4.200      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.185     ; 4.201      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.185     ; 4.201      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.185     ; 4.201      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.185     ; 4.201      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.185     ; 4.201      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.185     ; 4.201      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.185     ; 4.201      ;
; 4.430 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 4.202      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                   ;
+-------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                                                                                                           ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 9.421 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[16]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 8.150      ;
; 9.421 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[13]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 8.150      ;
; 9.421 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[15]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 8.150      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 8.150      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 8.143      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.146      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.146      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.146      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.146      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 8.150      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 8.144      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[3]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 8.144      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 8.144      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[2]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 8.144      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_ready_reg                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 8.150      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[16]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 8.144      ;
; 9.422 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[17]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 8.144      ;
; 9.442 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 8.106      ;
; 9.442 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 8.097      ;
; 9.442 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 8.097      ;
; 9.442 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 8.097      ;
; 9.454 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.114      ;
; 9.454 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.114      ;
; 9.454 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.114      ;
; 9.454 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.114      ;
; 9.454 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[7]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 8.114      ;
; 9.492 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 8.054      ;
; 9.492 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 8.054      ;
; 9.492 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 8.054      ;
; 9.492 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 8.054      ;
; 9.492 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 8.056      ;
; 9.492 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 8.054      ;
; 9.492 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 8.056      ;
; 9.492 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 8.054      ;
; 9.887 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 7.651      ;
; 9.887 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 7.651      ;
; 9.887 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 7.651      ;
; 9.887 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][0]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 7.649      ;
; 9.902 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 7.636      ;
; 9.902 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[7]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 7.637      ;
; 9.902 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 7.636      ;
; 9.910 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 7.633      ;
; 9.910 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 7.633      ;
; 9.910 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 7.637      ;
; 9.910 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 7.638      ;
; 9.910 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 7.638      ;
; 9.910 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.636      ;
; 9.910 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 7.634      ;
; 9.910 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 7.638      ;
; 9.911 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 7.636      ;
; 9.911 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 7.636      ;
; 9.911 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.099     ; 7.620      ;
; 9.911 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[11]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.099     ; 7.620      ;
; 9.911 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 7.625      ;
; 9.915 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 7.629      ;
; 9.915 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 7.629      ;
; 9.915 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[10]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 7.613      ;
; 9.915 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 7.613      ;
; 9.919 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 7.611      ;
; 9.919 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 7.611      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[26]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[28]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[21]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[19]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[16]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[0]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[1]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[2]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[3]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[4]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[5]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[6]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[7]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_reset_reg                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[13]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[31]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[12]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[15]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[18]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[11]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[11]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[8]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[14]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[30]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.648      ;
; 9.923 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[7]                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.066     ; 7.641      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 7.647      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 7.642      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 7.630      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[19]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 7.637      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 7.637      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[26]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 7.637      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 7.637      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[27]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 7.637      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 7.637      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[24]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 7.637      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[25]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 7.637      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[28]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 7.637      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 7.648      ;
; 9.924 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[22]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 7.648      ;
+-------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.711 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|dffe4                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.282      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.377      ; 2.310      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.377      ; 2.310      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.377      ; 2.310      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.377      ; 2.310      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.377      ; 2.310      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.377      ; 2.310      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.338      ; 2.302      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 1.786 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.342      ; 2.318      ;
; 2.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 3.331      ;
; 2.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 3.331      ;
; 2.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 3.331      ;
; 2.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 3.331      ;
; 2.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 3.331      ;
; 2.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 3.331      ;
; 2.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.387      ; 3.331      ;
; 3.590 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[16]                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.872      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[2]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[3]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[4]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[5]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[6]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[7]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[8]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[9]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[10]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[11]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[12]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.874      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[13]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.876      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[14]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.876      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[15]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.876      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[16]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.876      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[17]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.876      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[18]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.876      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[19]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.876      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[20]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.876      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[21]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.876      ;
; 3.592 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[22]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.876      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 3.497 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.159      ; 3.871      ;
; 3.497 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.159      ; 3.871      ;
; 3.497 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.159      ; 3.871      ;
; 3.497 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.159      ; 3.871      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 3.871      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 3.871      ;
; 3.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.870      ;
; 3.501 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.887      ;
; 3.501 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.887      ;
; 3.501 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.887      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.884      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.887      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 3.888      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 3.510 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 3.882      ;
; 4.002 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.175      ; 4.309      ;
; 4.002 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.175      ; 4.309      ;
; 4.005 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.304      ;
; 4.005 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.304      ;
; 4.005 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 4.305      ;
; 4.005 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.304      ;
; 4.005 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 4.305      ;
; 4.005 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.304      ;
; 4.006 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 4.308      ;
; 4.006 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 4.308      ;
; 4.006 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.307      ;
; 4.006 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 4.304      ;
; 4.006 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.307      ;
; 4.006 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 4.308      ;
; 4.006 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 4.308      ;
; 4.006 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.307      ;
; 4.006 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 4.306      ;
; 4.009 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 4.307      ;
; 4.009 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 4.307      ;
; 4.010 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.120      ; 4.262      ;
; 4.023 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.125      ; 4.280      ;
; 4.024 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.119      ; 4.275      ;
; 4.024 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.119      ; 4.275      ;
; 4.034 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.116      ; 4.282      ;
; 4.034 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.116      ; 4.282      ;
; 4.035 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.126      ; 4.293      ;
; 4.035 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.122      ; 4.289      ;
; 4.036 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 4.299      ;
; 4.036 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.129      ; 4.297      ;
; 4.037 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.127      ; 4.296      ;
; 4.037 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.127      ; 4.296      ;
; 4.038 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.123      ; 4.293      ;
; 4.038 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.120      ; 4.290      ;
; 4.039 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.123      ; 4.294      ;
; 4.039 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.117      ; 4.288      ;
; 4.088 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.041      ; 4.207      ;
; 4.088 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.041      ; 4.207      ;
; 4.089 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.044      ; 4.211      ;
; 4.089 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.043      ; 4.210      ;
; 4.089 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.040      ; 4.207      ;
; 4.089 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.044      ; 4.211      ;
; 4.089 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.043      ; 4.210      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 4.100 ; 4.316        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[16]                                                         ;
; 4.100 ; 4.316        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[17]                                                         ;
; 4.100 ; 4.316        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[18]                                                         ;
; 4.100 ; 4.316        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[19]                                                         ;
; 4.100 ; 4.316        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[21]                                                         ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[4]                                                   ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[0] ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[1] ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[2] ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[3] ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[4] ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[0] ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[1] ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[2] ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[3] ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[4] ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[20]                                                         ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[22]                                                         ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[23]                                                         ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                       ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                       ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                       ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                       ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                             ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                             ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_STOP                             ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|transmit_buffer[1]                                   ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|transmit_buffer[4]                                   ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|transmit_buffer[5]                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[0]                                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[11]                                              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[1]                                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[2]                                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[3]                                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[4]                                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[5]                                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[7]                                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[0]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[1]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[2]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[3]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[4]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[0]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[1]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[2]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[3]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[4]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_1                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_2                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_3                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_4                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_cdtv                                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_genlock                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_power                                                     ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_stop                                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[13]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[14]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[15]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[16]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[17]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[5]                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[0]                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[10]                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[11]                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[12]                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[13]                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[14]                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[15]                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[1]                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[2]                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[3]                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[4]                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[5]                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[6]                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[7]                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[8]                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|cmd_length[9]                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|command.CMD_NONE                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|command.CMD_READ                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|command.CMD_WRITE                                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[0]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[1]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[2]                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|q[3]                                                 ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                         ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                                                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------+
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|delay_line:delay_line_phase|shift_reg[29]   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|delay_line:delay_line_phase|shift_reg[30]   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[10]                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[11]                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[12]                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[13]                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[14]                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[15]                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[16]                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[5]                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[6]                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[7]                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[8]                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[9]                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[8]                                                                ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[9]                                                                ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_reg[3]                                                                     ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_reg[5]                                                                     ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_reg[8]                                                                     ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_reg[9]                                                                     ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[0]                                                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_n                                                                                                                                   ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchPage   ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchTaken  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreRead      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleRead2        ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; half_scandouble_enable_reg                                                                                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_reg[4]                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|pending_extended_reg                                                                 ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|pending_keyup_reg                                                                    ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[11]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[120]                                                                                           ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[13]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[1]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[20]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[35]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[41]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[42]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[43]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[65]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[70]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[73]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[76]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[78]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[90]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[9]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[10]                                                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[11]                                                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[12]                                                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[13]                                                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[14]                                                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[15]                                                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[1]                                                                                                                          ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[2]                                                                                                                          ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[3]                                                                                                                          ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[4]                                                                                                                          ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[5]                                                                                                                          ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[6]                                                                                                                          ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[7]                                                                                                                          ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[8]                                                                                                                          ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_counter[9]                                                                                                                          ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|hsync_reg                                                                                                        ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[0]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[10]                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[1]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[2]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[3]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[4]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[5]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[6]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[7]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[8]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|input_address_reg[9]                                                                                             ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|output_address_reg[10]                                                                                           ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|vga_hsync_reg                                                                                                    ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|vga_odd_reg                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|count[29]                                                                  ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[13]                                 ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[5]                                  ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|cpu_fetch_real_reg                           ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|write_enable_reg                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                   ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[0] ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[1] ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[2] ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[3] ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[4] ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|antic_dma_clock:antic_dma_clock1|dma_shiftreg_reg[5] ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|display_shift_reg[0]                                 ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                  ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[4]                                     ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[5]                                     ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                        ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'clk8'                                                                                            ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.449  ; 62.449       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.473  ; 62.473       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.526  ; 62.526       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.551  ; 62.551       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 1.868 ; 2.130 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.136 ; 2.405 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 2.410 ; 2.619 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 1.884 ; 2.214 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 2.410 ; 2.619 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 1.993 ; 2.314 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 2.083 ; 2.388 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 1.715 ; 1.980 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 1.349 ; 1.571 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.316 ; 3.099 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.356 ; 2.174 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.538 ; 2.424 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.334 ; 2.188 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.095 ; 2.984 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.900 ; 2.745 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.349 ; 2.238 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.792 ; 2.581 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.905 ; 2.725 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.970 ; 2.799 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.580 ; 2.368 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.495 ; 2.388 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.674 ; 2.478 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.661 ; 2.458 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.316 ; 3.099 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.966 ; 2.747 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.969 ; 2.758 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 3.042 ; 3.252 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 5.112 ; 5.670 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 4.630 ; 4.671 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; freeze_n     ; clk8       ; 2.459 ; 2.709 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; 4.733 ; 4.819 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -1.202 ; -1.455 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -1.443 ; -1.694 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -0.977 ; -1.213 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.176 ; -1.469 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -1.467 ; -1.717 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -1.294 ; -1.614 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -0.977 ; -1.213 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -1.040 ; -1.287 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -0.679 ; -0.903 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.524 ; -0.574 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.525 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.525 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.494 ; -0.543 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.485 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.485 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.538 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.538 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -2.329 ; -2.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -2.264 ; -2.491 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -2.013 ; -2.162 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; freeze_n     ; clk8       ; -1.770 ; -2.012 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; -3.947 ; -4.029 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.014 ; 6.161 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.014 ; 6.161 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.783 ; 5.095 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.604 ; 4.928 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.567 ; 4.892 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 6.696 ; 6.224 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 4.996 ; 5.370 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 4.473 ; 4.731 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 3.976 ; 4.107 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.180 ; 4.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 4.996 ; 5.370 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.702 ; 3.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.414 ; 3.376 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.502 ; 3.478 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.857 ; 4.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.685 ; 3.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.495 ; 3.471 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.416 ; 3.378 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.492 ; 3.468 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.850 ; 4.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.491 ; 3.467 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.503 ; 3.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.471 ; 3.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 6.097 ; 5.935 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 6.097 ; 5.524 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 4.040 ; 3.915 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 4.072 ; 3.963 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 6.093 ; 5.935 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 4.824 ; 4.621 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 6.741 ; 6.333 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 6.741 ; 6.175 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 6.564 ; 6.333 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 5.732 ; 5.579 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 6.634 ; 6.241 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.767 ; 5.572 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.789 ; 5.067 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 6.630 ; 7.115 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 8.337 ; 7.953 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 5.925 ; 5.390 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 5.257 ; 4.913 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 5.409 ; 5.059 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 8.337 ; 7.953 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 6.598 ; 6.171 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.180 ; 5.972 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 7.385 ; 6.842 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.251 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.103 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 4.073 ; 4.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 5.525 ; 5.663 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.281 ; 4.582 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.109 ; 4.422 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.073 ; 4.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 6.121 ; 5.668 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 3.507 ; 3.634 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 3.983 ; 4.233 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 3.507 ; 3.634 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 3.702 ; 3.868 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 4.486 ; 4.846 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.960 ; 2.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 2.968 ; 2.931 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.247 ; 3.341 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 2.960 ; 2.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.048 ; 3.025 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.403 ; 4.470 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.231 ; 3.325 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.045 ; 3.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.045 ; 3.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.041 ; 3.018 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.405 ; 4.472 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.042 ; 2.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 2.962 ; 2.925 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.042 ; 2.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.476 ; 4.528 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.038 ; 3.015 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.396 ; 4.463 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.037 ; 3.014 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.048 ; 2.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.476 ; 4.528 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.038 ; 2.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.015 ; 2.966 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.026 ; 2.977 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.025 ; 2.976 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.569 ; 3.447 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 5.544 ; 4.992 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 3.569 ; 3.447 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 3.599 ; 3.494 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 5.598 ; 5.449 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 4.322 ; 4.125 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.192 ; 5.042 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 6.165 ; 5.621 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 5.995 ; 5.772 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 5.192 ; 5.045 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 6.061 ; 5.684 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.229 ; 5.042 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.286 ; 4.555 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 6.054 ; 6.521 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 4.737 ; 4.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 5.379 ; 4.863 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.737 ; 4.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.885 ; 4.548 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 7.751 ; 7.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 6.023 ; 5.612 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 5.624 ; 5.425 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.782 ; 6.261 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 6.838 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.695 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 5.407 ; 5.407 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.774 ; 5.774 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.407 ; 5.407 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.407 ; 5.407 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.714 ; 5.714 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.952 ; 5.952 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 6.025 ; 6.025 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 6.238 ; 6.238 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.924 ; 5.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.924 ; 5.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 6.319 ; 6.319 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 6.238 ; 6.238 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 6.025 ; 6.025 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.686 ; 5.686 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.704 ; 5.704 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.774 ; 5.774 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.774 ; 5.774 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.662 ; 4.658 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.014 ; 5.010 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.662 ; 4.658 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.662 ; 4.658 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.950 ; 4.943 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.178 ; 5.171 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.247 ; 5.240 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.451 ; 5.444 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.150 ; 5.143 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.150 ; 5.143 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.529 ; 5.522 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.451 ; 5.444 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.247 ; 5.240 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.922 ; 4.915 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.940 ; 4.933 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.015 ; 5.011 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.015 ; 5.011 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.877     ; 4.998     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.208     ; 5.329     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.877     ; 4.998     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.877     ; 4.998     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.102     ; 5.235     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.284     ; 5.417     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.335     ; 5.468     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.669     ; 5.802     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.383     ; 5.516     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.383     ; 5.516     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.770     ; 5.903     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.669     ; 5.802     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.335     ; 5.468     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.084     ; 5.217     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.092     ; 5.225     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.210     ; 5.331     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.210     ; 5.331     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.266     ; 4.266     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.584     ; 4.584     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.266     ; 4.266     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.266     ; 4.266     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.483     ; 4.483     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.657     ; 4.657     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.706     ; 4.706     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.026     ; 5.026     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.751     ; 4.751     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.751     ; 4.751     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.123     ; 5.123     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.026     ; 5.026     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.706     ; 4.706     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.464     ; 4.464     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.473     ; 4.473     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.586     ; 4.586     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.586     ; 4.586     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


---------------------------------------------
; Slow 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 5.342 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 5.627 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold Summary                                       ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.092 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.186 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery Summary                                    ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 6.242  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 13.564 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal Summary                                    ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.822 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 1.757 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width Summary                         ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.190  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.561  ; 0.000         ;
; clk8                                            ; 62.089 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                      ;
+-------+-------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                           ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.342 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 3.364      ;
; 5.421 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.098     ; 3.282      ;
; 5.479 ; chameleon_cdtv_remote:myIr|key_play ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 3.229      ;
; 5.528 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 3.190      ;
; 5.532 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 3.176      ;
; 5.547 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 3.171      ;
; 5.549 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 3.153      ;
; 5.553 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 3.157      ;
; 5.563 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.079     ; 3.159      ;
; 5.570 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 3.138      ;
; 5.572 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 3.130      ;
; 5.575 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 3.129      ;
; 5.582 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.102     ; 3.117      ;
; 5.583 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 3.122      ;
; 5.585 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.102     ; 3.114      ;
; 5.586 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 3.132      ;
; 5.587 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 3.118      ;
; 5.596 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 3.110      ;
; 5.600 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.082     ; 3.119      ;
; 5.604 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 3.114      ;
; 5.604 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 3.117      ;
; 5.615 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.105     ; 3.081      ;
; 5.624 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 3.083      ;
; 5.632 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 3.089      ;
; 5.635 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 3.085      ;
; 5.636 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.078     ; 3.087      ;
; 5.651 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 3.067      ;
; 5.652 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.084     ; 3.065      ;
; 5.653 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 3.049      ;
; 5.655 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 3.052      ;
; 5.658 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.084     ; 3.059      ;
; 5.663 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 3.058      ;
; 5.668 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 3.053      ;
; 5.672 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 3.030      ;
; 5.677 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.082     ; 3.042      ;
; 5.678 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.082     ; 3.041      ;
; 5.679 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 3.029      ;
; 5.679 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 3.026      ;
; 5.679 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 3.026      ;
; 5.680 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 3.025      ;
; 5.682 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 3.038      ;
; 5.699 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 3.021      ;
; 5.702 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.086     ; 3.013      ;
; 5.709 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.999      ;
; 5.711 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 3.010      ;
; 5.714 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.991      ;
; 5.726 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.974      ;
; 5.732 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.970      ;
; 5.733 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.969      ;
; 5.734 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.082     ; 2.985      ;
; 5.738 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.969      ;
; 5.740 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.965      ;
; 5.748 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 2.973      ;
; 5.749 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.956      ;
; 5.759 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.084     ; 2.958      ;
; 5.762 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.077     ; 2.962      ;
; 5.762 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.956      ;
; 5.766 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.952      ;
; 5.772 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 2.937      ;
; 5.788 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.920      ;
; 5.798 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.084     ; 2.919      ;
; 5.799 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.907      ;
; 5.800 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.098     ; 2.903      ;
; 5.804 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.079     ; 2.918      ;
; 5.820 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 2.900      ;
; 5.821 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.082     ; 2.898      ;
; 5.823 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.889      ;
; 5.826 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[42] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.879      ;
; 5.839 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.866      ;
; 5.842 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.876      ;
; 5.858 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.846      ;
; 5.869 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.082     ; 2.850      ;
; 5.884 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.820      ;
; 5.888 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.098     ; 2.815      ;
; 5.897 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.807      ;
; 5.897 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.082     ; 2.822      ;
; 5.907 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.798      ;
; 5.910 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.795      ;
; 5.921 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 2.800      ;
; 5.922 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 2.794      ;
; 5.928 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 2.793      ;
; 5.928 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.776      ;
; 5.931 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.084     ; 2.786      ;
; 5.937 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.768      ;
; 5.938 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.767      ;
; 5.944 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[17] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.774      ;
; 5.944 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.758      ;
; 5.947 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.755      ;
; 5.949 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.755      ;
; 5.951 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 2.770      ;
; 5.952 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 2.769      ;
; 5.964 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.741      ;
; 5.970 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.736      ;
; 5.974 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.730      ;
; 5.976 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.730      ;
; 5.980 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 2.740      ;
; 5.998 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.707      ;
; 5.998 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 2.723      ;
; 6.006 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.695      ;
; 6.009 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.698      ;
+-------+-------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                  ;
+-------+------------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                            ; To Node                                            ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.627 ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[13]    ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.111     ; 3.016      ;
; 5.677 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.999      ;
; 5.717 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.959      ;
; 5.719 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.956      ;
; 5.725 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.951      ;
; 5.750 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.950      ;
; 5.756 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.944      ;
; 5.756 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.920      ;
; 5.758 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.942      ;
; 5.772 ; chameleon_cdtv_remote:myIr|timer[3]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.992      ;
; 5.776 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.900      ;
; 5.789 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.911      ;
; 5.792 ; chameleon_cdtv_remote:myIr|bitlength[3]              ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.968      ;
; 5.796 ; chameleon_cdtv_remote:myIr|bitlength[2]              ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.964      ;
; 5.802 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.876      ;
; 5.806 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.892      ;
; 5.809 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.891      ;
; 5.827 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.851      ;
; 5.828 ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[10]    ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.114     ; 2.812      ;
; 5.836 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.838      ;
; 5.840 ; chameleon_cdtv_remote:myIr|timer[2]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.924      ;
; 5.854 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.820      ;
; 5.867 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.808      ;
; 5.873 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.805      ;
; 5.879 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.795      ;
; 5.880 ; chameleon_cdtv_remote:myIr|timer[13]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.880      ;
; 5.883 ; chameleon_cdtv_remote:myIr|timer[3]                  ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.033     ; 2.885      ;
; 5.883 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.792      ;
; 5.885 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|ba_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.815      ;
; 5.887 ; sdram_statemachine:sdram_adaptor|delay_reg[5]        ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.789      ;
; 5.888 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]  ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.788      ;
; 5.891 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.807      ;
; 5.892 ; chameleon_cdtv_remote:myIr|bitlength[1]              ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.868      ;
; 5.893 ; sdram_statemachine:sdram_adaptor|dqm_mask_sreg[0]    ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 2.766      ;
; 5.895 ; chameleon_cdtv_remote:myIr|bitlength[3]              ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.869      ;
; 5.899 ; chameleon_cdtv_remote:myIr|bitlength[2]              ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.865      ;
; 5.904 ; chameleon_cdtv_remote:myIr|timer[5]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.856      ;
; 5.905 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.045     ; 2.804      ;
; 5.906 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.045     ; 2.803      ;
; 5.909 ; chameleon_cdtv_remote:myIr|timer[4]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.851      ;
; 5.913 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.045     ; 2.796      ;
; 5.916 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.758      ;
; 5.920 ; sdram_statemachine:sdram_adaptor|delay_reg[5]        ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.780      ;
; 5.921 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]  ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.779      ;
; 5.924 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.750      ;
; 5.925 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|addr_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.749      ;
; 5.929 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.742      ;
; 5.934 ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[11]    ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.110     ; 2.710      ;
; 5.935 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.740      ;
; 5.935 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.763      ;
; 5.939 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.045     ; 2.770      ;
; 5.941 ; chameleon_cdtv_remote:myIr|bitlength[0]              ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.819      ;
; 5.945 ; chameleon_cdtv_remote:myIr|timer[14]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 2.814      ;
; 5.947 ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[14] ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 2.671      ;
; 5.948 ; chameleon_cdtv_remote:myIr|bitlength[3]              ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.816      ;
; 5.948 ; chameleon_cdtv_remote:myIr|bitlength[3]              ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.816      ;
; 5.950 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.725      ;
; 5.951 ; chameleon_cdtv_remote:myIr|timer[2]                  ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.033     ; 2.817      ;
; 5.952 ; chameleon_cdtv_remote:myIr|timer[3]                  ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.033     ; 2.816      ;
; 5.952 ; chameleon_cdtv_remote:myIr|timer[3]                  ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.033     ; 2.816      ;
; 5.952 ; chameleon_cdtv_remote:myIr|bitlength[8]              ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.808      ;
; 5.952 ; chameleon_cdtv_remote:myIr|bitlength[2]              ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.812      ;
; 5.952 ; chameleon_cdtv_remote:myIr|bitlength[2]              ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.812      ;
; 5.954 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.717      ;
; 5.955 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.719      ;
; 5.957 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.721      ;
; 5.960 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.714      ;
; 5.962 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.736      ;
; 5.970 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|ba_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.730      ;
; 5.974 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.701      ;
; 5.975 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|ldqm_reg          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.057     ; 2.722      ;
; 5.975 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.699      ;
; 5.979 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.045     ; 2.730      ;
; 5.980 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.048     ; 2.726      ;
; 5.990 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.682      ;
; 5.991 ; chameleon_cdtv_remote:myIr|timer[13]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.773      ;
; 5.994 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.681      ;
; 5.995 ; chameleon_cdtv_remote:myIr|bitlength[1]              ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.769      ;
; 5.998 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|ba_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.700      ;
; 6.000 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|addr_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.671      ;
; 6.002 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 2.679      ;
; 6.004 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 2.677      ;
; 6.004 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|addr_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.672      ;
; 6.006 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.048     ; 2.700      ;
; 6.009 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|addr_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.665      ;
; 6.012 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.045     ; 2.697      ;
; 6.014 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|ba_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.686      ;
; 6.015 ; chameleon_cdtv_remote:myIr|timer[5]                  ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.749      ;
; 6.015 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]  ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.660      ;
; 6.020 ; chameleon_cdtv_remote:myIr|timer[2]                  ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.033     ; 2.748      ;
; 6.020 ; chameleon_cdtv_remote:myIr|timer[2]                  ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.033     ; 2.748      ;
; 6.020 ; chameleon_cdtv_remote:myIr|timer[4]                  ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.744      ;
; 6.026 ; chameleon_cdtv_remote:myIr|bitlength[7]              ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.734      ;
; 6.026 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.650      ;
; 6.027 ; chameleon_cdtv_remote:myIr|timer[3]                  ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.033     ; 2.741      ;
; 6.031 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.644      ;
; 6.032 ; chameleon_cdtv_remote:myIr|bitlength[3]              ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.732      ;
; 6.033 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 2.637      ;
; 6.035 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 2.673      ;
; 6.036 ; chameleon_cdtv_remote:myIr|bitlength[2]              ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.728      ;
+-------+------------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.092 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.422      ;
; 0.092 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.422      ;
; 0.098 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.428      ;
; 0.104 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.434      ;
; 0.107 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.437      ;
; 0.139 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.467      ;
; 0.141 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.466      ;
; 0.142 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.472      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.469      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.473      ;
; 0.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.473      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.474      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.474      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.475      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.473      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.473      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.476      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.474      ;
; 0.150 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[5]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~portb_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.478      ;
; 0.151 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[5]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~porta_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.477      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.215      ; 0.471      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.482      ;
; 0.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.482      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.480      ;
; 0.158 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[2]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~portb_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.486      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.215      ; 0.477      ;
; 0.159 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[2]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~porta_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.485      ;
; 0.161 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[6]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~portb_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.489      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.489      ;
; 0.162 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[6]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~porta_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.488      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.487      ;
; 0.163 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[0]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~portb_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.491      ;
; 0.164 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[1]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~portb_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.493      ;
; 0.164 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[0]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~porta_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.490      ;
; 0.165 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[1]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~porta_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.492      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.493      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.492      ;
; 0.169 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[4]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~portb_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.497      ;
; 0.170 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[4]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~porta_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.496      ;
; 0.173 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[3]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~portb_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.501      ;
; 0.174 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|cntr_8rf:cntr1|counter_reg_bit[3]                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~porta_address_reg0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.500      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.215      ; 0.497      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.509      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[5]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[6]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[7]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[1]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[2]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[3]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[3]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[0]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[4]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_last_enabled_reg                                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_last_enabled_reg                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[0]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[0]                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[1]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[1]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[2]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[2]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[2]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[2]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[2]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[2]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[36]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[36]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[54]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[54]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[4]                                                                                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[4]                                                                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[33]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[33]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[8]                                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[8]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[13]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[13]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[1]                                                                                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[1]                                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[16]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[16]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[8]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[8]                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[15]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[15]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                           ;
+-------+--------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                              ; To Node                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.186 ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; chameleon_io:chameleon_io|c64_ba_reg                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; chameleon_cdtv_remote:myIr|timer[9]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; chameleon_cdtv_remote:myIr|timer[12]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; chameleon_cdtv_remote:myIr|timer[14]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; chameleon_io:chameleon_io|c64_data_reg[4]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_RESET                                                                    ; chameleon_usb:usb|state.STATE_RESET                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                     ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; chameleon_usb:usb|state.STATE_ADDR2                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_ADDR1                                                                    ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_ADDR0                                                                    ; chameleon_usb:usb|state.STATE_ADDR0                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_LEN1                                                                     ; chameleon_usb:usb|state.STATE_LEN1                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_LEN0                                                                     ; chameleon_usb:usb|state.STATE_LEN0                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|req_reg                                                                              ; chameleon_usb:usb|req_reg                                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; chameleon_cdtv_remote:myIr|timer[0]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; chameleon_cdtv_remote:myIr|timer[1]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; chameleon_cdtv_remote:myIr|timer[2]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; chameleon_cdtv_remote:myIr|timer[3]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; chameleon_cdtv_remote:myIr|timer[6]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; chameleon_cdtv_remote:myIr|current_code[4]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|current_code[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; chameleon_cdtv_remote:myIr|current_code[1]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; chameleon_cdtv_remote:myIr|current_code[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; chameleon_cdtv_remote:myIr|current_code[3]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; chameleon_cdtv_remote:myIr|current_code[5]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; chameleon_cdtv_remote:myIr|current_code[7]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|current_code[11]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; sdram_statemachine:sdram_adaptor|reply_reg                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.193 ; chameleon_usb:usb|state.STATE_ADDR3                                                                    ; chameleon_usb:usb|state.STATE_ADDR2                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.193 ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; chameleon_io:chameleon_io|mux_clk_reg                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.314      ;
; 0.193 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.314      ;
; 0.193 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.193 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.194 ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|mux_toggle                                                                   ; chameleon_io:chameleon_io|mux_toggle                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.195 ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.316      ;
; 0.195 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.315      ;
; 0.196 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[5]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[5]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.317      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|rom_lh_n_reg   ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[84]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.197 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[7]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[6]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[97]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.198 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[7]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[7]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC4H                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.319      ;
; 0.198 ; chameleon_io:chameleon_io|mux_state.MUX_CLKPORT                                                        ; chameleon_io:chameleon_io|mux_state.MUX_MMC5L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.319      ;
; 0.198 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.199 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[5]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[4]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.319      ;
; 0.199 ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.319      ;
; 0.199 ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.319      ;
; 0.199 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.320      ;
; 0.199 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.320      ;
; 0.200 ; chameleon_cdtv_remote:myIr|shiftreg[5]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.320      ;
; 0.200 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[99]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.320      ;
+-------+--------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 6.242 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.181     ; 2.329      ;
; 6.242 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.181     ; 2.329      ;
; 6.249 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 2.321      ;
; 6.249 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 2.321      ;
; 6.252 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.120     ; 2.382      ;
; 6.253 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.122     ; 2.379      ;
; 6.253 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.124     ; 2.377      ;
; 6.253 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 2.378      ;
; 6.253 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 2.378      ;
; 6.253 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.124     ; 2.377      ;
; 6.254 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.127     ; 2.373      ;
; 6.254 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.127     ; 2.373      ;
; 6.254 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.124     ; 2.376      ;
; 6.254 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 2.374      ;
; 6.254 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.127     ; 2.373      ;
; 6.254 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.128     ; 2.372      ;
; 6.257 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 2.315      ;
; 6.261 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.128     ; 2.365      ;
; 6.261 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.128     ; 2.365      ;
; 6.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.122     ; 2.370      ;
; 6.263 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 2.332      ;
; 6.263 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 2.335      ;
; 6.263 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 2.332      ;
; 6.264 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.153     ; 2.335      ;
; 6.264 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 2.334      ;
; 6.264 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.158     ; 2.330      ;
; 6.264 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 2.334      ;
; 6.264 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.153     ; 2.335      ;
; 6.264 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 2.334      ;
; 6.265 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 2.331      ;
; 6.265 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 2.331      ;
; 6.269 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 2.359      ;
; 6.275 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 2.376      ;
; 6.275 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 2.376      ;
; 6.275 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.379      ;
; 6.275 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.098     ; 2.381      ;
; 6.275 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.098     ; 2.381      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.379      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.378      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.378      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 2.374      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.378      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.379      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.378      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 2.377      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 2.377      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 2.376      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 2.377      ;
; 6.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 2.376      ;
; 6.277 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 2.375      ;
; 6.277 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 2.375      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.183      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.185      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.524 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.187      ;
; 6.525 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.186      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 2.174      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.098     ; 2.176      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.098     ; 2.176      ;
; 6.528 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.174      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                             ;
+--------+-----------+----------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node ; To Node                                                                    ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------+----------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 13.564 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 4.026      ;
; 13.564 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.031     ; 4.020      ;
; 13.564 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 4.026      ;
; 13.564 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 4.021      ;
; 13.564 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[3]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 4.021      ;
; 13.564 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 4.021      ;
; 13.564 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[2]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 4.021      ;
; 13.564 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_ready_reg                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 4.026      ;
; 13.564 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[16]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 4.021      ;
; 13.564 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[17]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 4.021      ;
; 13.565 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[16]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 4.025      ;
; 13.565 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 4.021      ;
; 13.565 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 4.021      ;
; 13.565 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 4.021      ;
; 13.565 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 4.021      ;
; 13.565 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[13]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 4.025      ;
; 13.565 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[15]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 4.025      ;
; 13.566 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 4.008      ;
; 13.572 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.047     ; 3.996      ;
; 13.572 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.047     ; 3.996      ;
; 13.572 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.047     ; 3.996      ;
; 13.573 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 4.013      ;
; 13.573 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 4.013      ;
; 13.573 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 4.013      ;
; 13.573 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 4.013      ;
; 13.573 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[7]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 4.013      ;
; 13.598 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 3.974      ;
; 13.598 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 3.974      ;
; 13.598 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 3.974      ;
; 13.598 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 3.974      ;
; 13.598 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.976      ;
; 13.598 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 3.974      ;
; 13.598 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.976      ;
; 13.598 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 3.974      ;
; 13.785 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 3.782      ;
; 13.785 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 3.782      ;
; 13.786 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[7]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.047     ; 3.782      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.045     ; 3.779      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.045     ; 3.779      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.783      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.784      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.784      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 3.782      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.045     ; 3.779      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 3.782      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 3.782      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.784      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.772      ;
; 13.791 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[11]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.772      ;
; 13.792 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.047     ; 3.776      ;
; 13.792 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.047     ; 3.776      ;
; 13.792 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 3.775      ;
; 13.793 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[10]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.766      ;
; 13.793 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.766      ;
; 13.797 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.765      ;
; 13.797 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.765      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.786      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.775      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[19]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.035     ; 3.781      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[26]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[27]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.035     ; 3.781      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[24]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[25]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[28]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 3.791      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[22]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 3.791      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[22]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.035     ; 3.781      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[21]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.787      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[21]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[29]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 3.791      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[29]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 3.791      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[29]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.775      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[20]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 3.791      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[20]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 3.791      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[20]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.775      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[16]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.782      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.035     ; 3.781      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[16]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.026     ; 3.790      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.026     ; 3.790      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[7]         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.031     ; 3.785      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.031     ; 3.785      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[6]         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.031     ; 3.785      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_last_reg ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.784      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[9]   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.784      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[8]   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.784      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[7]   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.784      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[6]   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.784      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[5]   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.784      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[4]   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.784      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[3]   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.784      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[2]   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.784      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[1]   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.784      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 3.791      ;
; 13.799 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.025     ; 3.791      ;
+--------+-----------+----------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.822 ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|dffe4                                                                   ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.205      ; 1.117      ;
; 0.840 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.132      ;
; 0.840 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.132      ;
; 0.840 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.132      ;
; 0.840 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.132      ;
; 0.840 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.132      ;
; 0.840 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.202      ; 1.132      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.849 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.182      ; 1.121      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 0.852 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.177      ; 1.119      ;
; 1.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.669      ;
; 1.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.669      ;
; 1.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.669      ;
; 1.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.669      ;
; 1.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.669      ;
; 1.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.669      ;
; 1.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.669      ;
; 1.817 ; reset_n                                                                                                                                                                             ; chameleon_reset_n_reg[0]                                                                                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[2]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[3]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[4]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[5]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[6]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[7]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[8]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[9]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[10]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[11]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_fwd_p1[12]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 1.951      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[1]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.047      ; 1.948      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[2]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.047      ; 1.948      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[3]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.047      ; 1.948      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[4]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.047      ; 1.948      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[5]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.047      ; 1.948      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[6]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.047      ; 1.948      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[7]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.047      ; 1.948      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[8]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.047      ; 1.948      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[9]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.047      ; 1.948      ;
; 1.817 ; reset_n                                                                                                                                                                             ; hq_dac:dac_right|r_data_lpf_p2[10]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.047      ; 1.948      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.946      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.946      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.946      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.946      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.946      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.948      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.948      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.948      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.946      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.948      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.955      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.946      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.086      ; 1.948      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.086      ; 1.948      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 1.954      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.956      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.956      ;
; 1.758 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 1.956      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.952      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 2.160      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 2.159      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.086      ; 2.157      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.086      ; 2.157      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 2.159      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 2.160      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.162      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 2.159      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.162      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.158      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.086      ; 2.157      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.158      ;
; 1.993 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.086      ; 2.157      ;
; 1.994 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 2.160      ;
; 1.994 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 2.156      ;
; 1.994 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 2.160      ;
; 1.994 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.159      ;
; 1.995 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 2.158      ;
; 1.995 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 2.158      ;
; 2.006 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 2.145      ;
; 2.011 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.059      ; 2.148      ;
; 2.011 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.059      ; 2.148      ;
; 2.012 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.065      ; 2.155      ;
; 2.017 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.155      ;
; 2.017 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.155      ;
; 2.017 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.163      ;
; 2.017 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 2.158      ;
; 2.018 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.065      ; 2.161      ;
; 2.018 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.156      ;
; 2.018 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 2.160      ;
; 2.018 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 2.160      ;
; 2.019 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 2.160      ;
; 2.019 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 2.158      ;
; 2.020 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 2.161      ;
; 2.020 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.059      ; 2.157      ;
; 2.021 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 2.104      ;
; 2.021 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.030      ; 2.101      ;
; 2.021 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.032      ; 2.103      ;
; 2.021 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.030      ; 2.101      ;
; 2.021 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.032      ; 2.103      ;
; 2.021 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 2.104      ;
; 2.022 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.028      ; 2.100      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[0]                                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[1]                                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[2]                                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[3]                                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[4]                                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[5]                                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[6]                                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|ena_out                                                                            ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[0]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[11]                                                              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[1]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[2]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[3]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[4]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[5]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[7]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[0]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[1]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[2]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[3]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[4]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[0]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[1]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[2]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[3]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[4]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_1                                                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_2                                                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_3                                                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_4                                                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_cdtv                                                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_genlock                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_power                                                                     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_stop                                                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[13]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[14]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[15]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[16]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[17]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                                  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[4]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[5]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|state.STATE_HIGH                                                              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[0]                                                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[1]                                                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[2]                                                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[3]                                                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[6]                                                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|button_reset_n                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|c64_data_reg[0]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|c64_data_reg[1]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|c64_data_reg[2]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|c64_data_reg[3]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[1]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[2]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[4]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[8]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[0]                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[1]                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[2]                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[3]                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[4]                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[0]                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[1]                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[2]                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[3]                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[4]                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[0]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[1]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[2]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[3]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[4]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[5]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[6]                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|we                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[0] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[1] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[2] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[3] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[4] ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                        ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type            ; Clock                                           ; Clock Edge ; Target                                                                                                                                                                                                                                    ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a10~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a17~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a1~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a2~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                               ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                           ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer:pokey_mixer_r|altsyncram:Ram0_rtl_0|altsyncram_kt71:auto_generated|ram_block1a0~porta_address_reg0                                                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer:pokey_mixer_r|altsyncram:Ram0_rtl_0|altsyncram_kt71:auto_generated|ram_block1a7~porta_address_reg0                                                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a14~porta_address_reg0                                                                                                                                     ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a20~porta_address_reg0                                                                                                                                     ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a22~porta_address_reg0                                                                                                                                     ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a3~porta_address_reg0                                                                                                                                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a6~porta_address_reg0                                                                                                                                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a8~porta_address_reg0                                                                                                                                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_address_reg0   ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:linea|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a4~porta_address_reg0                                                                                             ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:linea|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a4~porta_we_reg                                                                                                   ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a11~porta_address_reg0                                                                                                                                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a21~porta_address_reg0                                                                                                                                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a5~porta_address_reg0                                                                                                                                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                           ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                          ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                            ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~portb_address_reg0   ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_address_reg0   ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer:pokey_mixer_l|altsyncram:Ram0_rtl_0|altsyncram_kt71:auto_generated|ram_block1a0~porta_address_reg0                                                    ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer:pokey_mixer_l|altsyncram:Ram0_rtl_0|altsyncram_kt71:auto_generated|ram_block1a7~porta_address_reg0                                                    ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~porta_address_reg0                                                                   ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:linea|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a0~porta_address_reg0                                                                                             ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:linea|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a0~porta_we_reg                                                                                                   ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:lineb|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a0~porta_address_reg0                                                                                             ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:lineb|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a0~porta_we_reg                                                                                                   ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:lineb|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a4~porta_address_reg0                                                                                             ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:lineb|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a4~porta_we_reg                                                                                                   ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a7~porta_address_reg0                                                                                                                                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                           ;
; 8.565 ; 8.795        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ;
; 8.565 ; 8.795        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~portb_address_reg0   ;
; 8.565 ; 8.795        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0                                                                                      ;
; 8.565 ; 8.795        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~portb_address_reg0                                                                   ;
; 8.565 ; 8.795        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:linea|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a4~porta_datain_reg0                                                                                              ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0                      ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1                      ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2                      ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3                      ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4~porta_datain_reg0    ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63                     ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8                      ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9                      ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|delay_line:hsync_delay|altshift_taps:shift_reg_rtl_0|shift_taps_nkm:auto_generated|altsyncram_14b1:altsyncram2|ram_block5a0~porta_datain_reg0                                                                    ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:linea|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a0~porta_datain_reg0                                                                                              ;
; 8.566 ; 8.796        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|scandouble_ram_infer:lineb|altsyncram:ram_block_rtl_0|altsyncram_2e81:auto_generated|ram_block1a0~porta_datain_reg0                                                                                              ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'clk8'                                                                                            ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.123  ; 62.123       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.131  ; 62.131       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.869  ; 62.869       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.877  ; 62.877       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 1.078 ; 1.412 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 1.250 ; 1.554 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 1.393 ; 1.680 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 1.140 ; 1.474 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 1.393 ; 1.680 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 1.181 ; 1.497 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 1.206 ; 1.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 1.014 ; 1.347 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 0.819 ; 1.173 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.620 ; 2.162 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.167 ; 1.620 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 1.265 ; 1.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.175 ; 1.621 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.553 ; 2.116 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.449 ; 1.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.199 ; 1.690 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.366 ; 1.867 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.448 ; 1.964 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.473 ; 2.004 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.297 ; 1.792 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 1.264 ; 1.770 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.325 ; 1.810 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.315 ; 1.809 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.620 ; 2.162 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.428 ; 1.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.443 ; 1.940 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 1.796 ; 1.985 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 2.822 ; 2.981 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 2.452 ; 2.682 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; freeze_n     ; clk8       ; 1.425 ; 1.699 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; 2.559 ; 3.170 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -0.729 ; -1.065 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -0.890 ; -1.190 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -0.660 ; -1.009 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -0.773 ; -1.113 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -0.926 ; -1.211 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -0.816 ; -1.141 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -0.660 ; -1.009 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -0.663 ; -0.991 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -0.470 ; -0.831 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.359 ; -0.735 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.361 ; -0.737 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.361 ; -0.737 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.356 ; -0.738 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.340 ; -0.722 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.340 ; -0.722 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.341 ; -0.723 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.346 ; -0.728 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.370 ; -0.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.370 ; -0.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -1.419 ; -1.616 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -1.373 ; -1.595 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -1.256 ; -1.492 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; freeze_n     ; clk8       ; -1.062 ; -1.340 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; -2.146 ; -2.749 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 3.207 ; 3.045 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 3.207 ; 3.045 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 2.377 ; 2.264 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 2.268 ; 2.186 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 2.268 ; 2.186 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 2.974 ; 3.215 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 2.533 ; 2.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 2.217 ; 2.113 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 1.928 ; 1.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 2.052 ; 1.970 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.533 ; 2.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.606 ; 1.605 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.784 ; 1.856 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.601 ; 1.600 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.652 ; 1.673 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.522 ; 2.580 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.769 ; 1.841 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.645 ; 1.666 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.645 ; 1.666 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.644 ; 1.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.642 ; 1.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.603 ; 1.602 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.642 ; 1.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.642 ; 1.663 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.518 ; 2.576 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.640 ; 1.661 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.650 ; 1.649 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.627 ; 1.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.626 ; 1.625 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.626 ; 1.625 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.625 ; 1.624 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.640 ; 1.639 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.598 ; 1.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.598 ; 1.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.618 ; 1.617 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.628 ; 1.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.627 ; 1.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.628 ; 1.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.013 ; 3.161 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 2.690 ; 2.820 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 1.828 ; 1.893 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 1.859 ; 1.926 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.013 ; 3.161 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.153 ; 2.263 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 3.021 ; 3.272 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 2.992 ; 3.200 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 3.021 ; 3.272 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 2.627 ; 2.825 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.986 ; 3.232 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.644 ; 2.853 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.397 ; 2.270 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 3.435 ; 3.175 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 4.005 ; 4.307 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 2.604 ; 2.743 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 2.325 ; 2.455 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 2.424 ; 2.564 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 4.005 ; 4.307 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 3.000 ; 3.200 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 2.867 ; 3.104 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 3.282 ; 3.555 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.690 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.729 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 1.993 ; 1.914 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 2.934 ; 2.776 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 2.098 ; 1.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 1.993 ; 1.914 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 1.995 ; 1.915 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 2.671 ; 2.904 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 1.666 ; 1.603 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 1.945 ; 1.844 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 1.666 ; 1.603 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 1.787 ; 1.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.248 ; 2.105 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.532 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.400 ; 1.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.270 ; 2.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.517 ; 1.589 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.392 ; 1.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.351 ; 1.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.390 ; 1.411 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.266 ; 2.324 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.388 ; 1.409 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.397 ; 1.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.372 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.387 ; 1.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.365 ; 1.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 1.571 ; 1.634 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 2.399 ; 2.524 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 1.571 ; 1.634 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 1.601 ; 1.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 2.746 ; 2.891 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 1.883 ; 1.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 2.337 ; 2.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 2.690 ; 2.891 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 2.718 ; 2.960 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 2.337 ; 2.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.684 ; 2.922 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.356 ; 2.557 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.118 ; 1.995 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 3.115 ; 2.865 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 2.049 ; 2.174 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 2.316 ; 2.450 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 2.049 ; 2.174 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 2.146 ; 2.281 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 3.697 ; 3.990 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 2.696 ; 2.888 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 2.570 ; 2.799 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.967 ; 3.230 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.461 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.499 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.304 ; 3.300 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.477 ; 3.473 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.304 ; 3.300 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.304 ; 3.300 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.431 ; 3.428 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.517 ; 3.514 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.540 ; 3.537 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.699 ; 3.696 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.549 ; 3.546 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.549 ; 3.546 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.745 ; 3.742 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.699 ; 3.696 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.540 ; 3.537 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.418 ; 3.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.421 ; 3.418 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.481 ; 3.477 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.481 ; 3.477 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 2.180 ; 2.180 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.346 ; 2.346 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.180 ; 2.180 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.180 ; 2.180 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.305 ; 2.305 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.387 ; 2.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.409 ; 2.409 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.561 ; 2.561 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.417 ; 2.417 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.417 ; 2.417 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.606 ; 2.606 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.561 ; 2.561 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.409 ; 2.409 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.293 ; 2.293 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.295 ; 2.295 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.350 ; 2.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.350 ; 2.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.443     ; 3.443     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.637     ; 3.637     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.443     ; 3.443     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.443     ; 3.443     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.585     ; 3.585     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.687     ; 3.687     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.708     ; 3.708     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.903     ; 3.903     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.730     ; 3.730     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.730     ; 3.730     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.951     ; 3.951     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.903     ; 3.903     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.708     ; 3.708     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.574     ; 3.574     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.576     ; 3.576     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.633     ; 3.633     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.633     ; 3.633     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 2.313     ; 2.371     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.499     ; 2.557     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.313     ; 2.371     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.313     ; 2.371     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.453     ; 2.519     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.551     ; 2.617     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.570     ; 2.636     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.757     ; 2.823     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.591     ; 2.657     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.591     ; 2.657     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.804     ; 2.870     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.757     ; 2.823     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.570     ; 2.636     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.442     ; 2.508     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.443     ; 2.509     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.496     ; 2.554     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.496     ; 2.554     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


---------------------------------------------
; Fast 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                         ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+
; Clock                                            ; Setup ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+
; Worst-case Slack                                 ; 0.702 ; 0.092 ; 3.340    ; 0.822   ; 4.098               ;
;  clk8                                            ; N/A   ; N/A   ; N/A      ; N/A     ; 62.089              ;
;  pll|altpll_component|auto_generated|pll1|clk[0] ; 1.604 ; 0.186 ; 3.340    ; 1.757   ; 4.098               ;
;  pll|altpll_component|auto_generated|pll1|clk[1] ; 0.702 ; 0.092 ; 8.911    ; 0.822   ; 8.505               ;
; Design-wide TNS                                  ; 0.0   ; 0.0   ; 0.0      ; 0.0     ; 0.0                 ;
;  clk8                                            ; N/A   ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.159 ; 2.335 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.482 ; 2.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 2.782 ; 2.886 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 2.199 ; 2.434 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 2.782 ; 2.886 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.316 ; 2.537 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 2.410 ; 2.608 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 2.001 ; 2.189 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 1.605 ; 1.757 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.602 ; 3.554 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.596 ; 2.522 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.798 ; 2.787 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.581 ; 2.517 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.378 ; 3.427 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.164 ; 3.145 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.588 ; 2.584 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.048 ; 2.990 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.173 ; 3.129 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.238 ; 3.224 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.831 ; 2.737 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.749 ; 2.756 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.920 ; 2.843 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.900 ; 2.830 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.602 ; 3.554 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.222 ; 3.167 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.245 ; 3.136 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 3.474 ; 3.509 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 5.778 ; 6.042 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 5.134 ; 5.077 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; freeze_n     ; clk8       ; 2.828 ; 2.951 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; 5.367 ; 5.592 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -0.729 ; -1.065 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -0.890 ; -1.190 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -0.660 ; -1.009 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -0.773 ; -1.113 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -0.926 ; -1.211 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -0.816 ; -1.141 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -0.660 ; -1.009 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -0.663 ; -0.991 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -0.470 ; -0.831 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.359 ; -0.574 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.361 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.361 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.356 ; -0.543 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.347 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.347 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.340 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.340 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.341 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.347 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.347 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.346 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.370 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.370 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -1.419 ; -1.616 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -1.373 ; -1.595 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -1.256 ; -1.492 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; freeze_n     ; clk8       ; -1.062 ; -1.340 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; -2.146 ; -2.749 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.087 ; 6.161 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.087 ; 6.161 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.901 ; 5.095 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.697 ; 4.928 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.660 ; 4.892 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 6.741 ; 6.514 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.138 ; 5.370 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 4.551 ; 4.731 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 3.994 ; 4.107 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.219 ; 4.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.138 ; 5.370 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.702 ; 3.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.414 ; 3.376 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.502 ; 3.478 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.857 ; 4.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.685 ; 3.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.495 ; 3.471 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.416 ; 3.378 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.492 ; 3.468 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.850 ; 4.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.491 ; 3.467 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.503 ; 3.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.471 ; 3.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 6.105 ; 6.002 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 6.105 ; 5.720 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 4.040 ; 3.922 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 4.072 ; 3.972 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 6.093 ; 6.002 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 4.824 ; 4.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 6.759 ; 6.571 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 6.759 ; 6.435 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 6.638 ; 6.571 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 5.772 ; 5.757 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 6.677 ; 6.504 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.796 ; 5.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.896 ; 5.067 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 6.980 ; 7.169 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 8.385 ; 8.263 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 5.925 ; 5.577 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 5.257 ; 5.041 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 5.409 ; 5.200 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 8.385 ; 8.263 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 6.658 ; 6.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.223 ; 6.195 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 7.459 ; 7.196 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.251 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.103 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 1.993 ; 1.914 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 2.934 ; 2.776 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 2.098 ; 1.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 1.993 ; 1.914 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 1.995 ; 1.915 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 2.671 ; 2.904 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 1.666 ; 1.603 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 1.945 ; 1.844 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 1.666 ; 1.603 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 1.787 ; 1.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.248 ; 2.105 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.532 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.400 ; 1.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.270 ; 2.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.517 ; 1.589 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.392 ; 1.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.351 ; 1.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.390 ; 1.411 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.266 ; 2.324 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.388 ; 1.409 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.397 ; 1.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.372 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.387 ; 1.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.365 ; 1.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 1.571 ; 1.634 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 2.399 ; 2.524 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 1.571 ; 1.634 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 1.601 ; 1.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 2.746 ; 2.891 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 1.883 ; 1.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 2.337 ; 2.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 2.690 ; 2.891 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 2.718 ; 2.960 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 2.337 ; 2.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.684 ; 2.922 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.356 ; 2.557 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.118 ; 1.995 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 3.115 ; 2.865 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 2.049 ; 2.174 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 2.316 ; 2.450 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 2.049 ; 2.174 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 2.146 ; 2.281 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 3.697 ; 3.990 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 2.696 ; 2.888 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 2.570 ; 2.799 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.967 ; 3.230 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.461 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.499 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; Pin         ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; red[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; nHSync      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; nVSync      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_clk      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[0]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[1]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[2]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[3]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[4]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[5]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[6]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[7]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[8]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[9]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[10] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[11] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[12] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ba_0     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ba_1     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_we_n     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ras_n    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_cas_n    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ldqm     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_udqm     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_clk     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[0]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[1]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[2]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[3]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sigmaL      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sigmaR      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[0]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[1]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[2]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[3]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[4]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[5]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[6]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[7]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[8]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[9]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[10] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[11] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[12] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[13] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[14] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[15] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+


+----------------------------------------------------------------+
; Input Transition Times                                         ;
+-------------+--------------+-----------------+-----------------+
; Pin         ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+-------------+--------------+-----------------+-----------------+
; mmc_cd_n    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mmc_wp      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_cts   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[0]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[1]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[2]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[3]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[4]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[5]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[6]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[7]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[8]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[9]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[10] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[11] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[12] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[13] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[14] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[15] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; clk8        ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_rts   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[1]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_clk   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; phi2_n      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; dotclock_n  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; ioef_n      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; freeze_n    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; spi_miso    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[0]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[3]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[2]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_tx    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; romlh_n     ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
+-------------+--------------+-----------------+-----------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; red[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; red[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; red[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; red[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; red[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; grn[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; grn[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; blu[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; blu[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; nHSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; nVSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_clk      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.64e-07 V                   ; 2.34 V              ; -0.00283 V          ; 0.121 V                              ; 0.028 V                              ; 1.16e-09 s                  ; 1.21e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.64e-07 V                  ; 2.34 V             ; -0.00283 V         ; 0.121 V                             ; 0.028 V                             ; 1.16e-09 s                 ; 1.21e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.64e-07 V                   ; 2.34 V              ; -0.00283 V          ; 0.121 V                              ; 0.028 V                              ; 1.16e-09 s                  ; 1.21e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.64e-07 V                  ; 2.34 V             ; -0.00283 V         ; 0.121 V                             ; 0.028 V                             ; 1.16e-09 s                 ; 1.21e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_0     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_1     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_we_n     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ras_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_cas_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; sd_ldqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_udqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_clk     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; mux[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; mux[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sigmaL      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sigmaR      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_data[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; sd_data[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[13] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[14] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[15] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; red[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; red[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; red[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; red[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; red[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; grn[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; grn[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; blu[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; blu[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; nHSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; nVSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_clk      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 5.17e-08 V                   ; 2.68 V              ; -0.0186 V           ; 0.221 V                              ; 0.079 V                              ; 6.92e-10 s                  ; 7.39e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 5.17e-08 V                  ; 2.68 V             ; -0.0186 V          ; 0.221 V                             ; 0.079 V                             ; 6.92e-10 s                 ; 7.39e-10 s                 ; No                        ; Yes                       ;
; sd_addr[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_addr[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 5.17e-08 V                   ; 2.68 V              ; -0.0186 V           ; 0.221 V                              ; 0.079 V                              ; 6.92e-10 s                  ; 7.39e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 5.17e-08 V                  ; 2.68 V             ; -0.0186 V          ; 0.221 V                             ; 0.079 V                             ; 6.92e-10 s                 ; 7.39e-10 s                 ; No                        ; Yes                       ;
; sd_addr[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_addr[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_0     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_1     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_we_n     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ras_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_cas_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; sd_ldqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_udqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_clk     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; mux[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; mux[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sigmaL      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sigmaR      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_data[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; sd_data[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[13] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[14] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[15] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                               ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8943     ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 160      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 791      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 4803390  ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8943     ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 160      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 791      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 4803390  ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                                                            ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 109      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 9242     ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                                                             ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 109      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 9242     ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 0     ; 0    ;
; Unconstrained Input Ports       ; 29    ; 29   ;
; Unconstrained Input Port Paths  ; 85    ; 85   ;
; Unconstrained Output Ports      ; 64    ; 64   ;
; Unconstrained Output Port Paths ; 80    ; 80   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Tue Jul 29 23:30:12 2014
Info: Command: quartus_sta atari800core -c atari800core
Info: qsta_default_script.tcl version: #1
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (21077): Core supply voltage is 1.2V
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Info (332104): Reading SDC File: 'atari800core.sdc'
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 156 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[0]} {pll|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 78 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[1]} {pll|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 156 -phase 180.00 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[2]} {pll|altpll_component|auto_generated|pll1|clk[2]}
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow 1200mV 85C Model
Info (332146): Worst-case setup slack is 0.702
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.702         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.604         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.319
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.319         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.453         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 3.340
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     3.340         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.911         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.894
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.894         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     3.883         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.098
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.098         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.505         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.409         0.000 clk8 
Info: Analyzing Slow 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 1.279
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.279         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.946         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.308
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.308         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.402         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 3.729
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     3.729         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     9.421         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.711
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.711         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     3.497         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.100
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.100         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.508         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.394         0.000 clk8 
Info: Analyzing Fast 1200mV 0C Model
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 5.342
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.342         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     5.627         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.092
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.092         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.186         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 6.242
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     6.242         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    13.564         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 0.822
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.822         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.757         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.190
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.190         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.561         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.089         0.000 clk8 
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 519 megabytes
    Info: Processing ended: Tue Jul 29 23:30:34 2014
    Info: Elapsed time: 00:00:22
    Info: Total CPU time (on all processors): 00:00:26


