TimeQuest Timing Analyzer report for atari800core
Tue Jul 29 23:25:22 2014
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow 1200mV 85C Model Fmax Summary
  7. Timing Closure Recommendations
  8. Slow 1200mV 85C Model Setup Summary
  9. Slow 1200mV 85C Model Hold Summary
 10. Slow 1200mV 85C Model Recovery Summary
 11. Slow 1200mV 85C Model Removal Summary
 12. Slow 1200mV 85C Model Minimum Pulse Width Summary
 13. Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 14. Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 15. Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 16. Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 17. Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 18. Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 19. Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 20. Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 21. Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 22. Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 23. Slow 1200mV 85C Model Minimum Pulse Width: 'clk8'
 24. Setup Times
 25. Hold Times
 26. Clock to Output Times
 27. Minimum Clock to Output Times
 28. Output Enable Times
 29. Minimum Output Enable Times
 30. Output Disable Times
 31. Minimum Output Disable Times
 32. Slow 1200mV 85C Model Metastability Report
 33. Slow 1200mV 0C Model Fmax Summary
 34. Slow 1200mV 0C Model Setup Summary
 35. Slow 1200mV 0C Model Hold Summary
 36. Slow 1200mV 0C Model Recovery Summary
 37. Slow 1200mV 0C Model Removal Summary
 38. Slow 1200mV 0C Model Minimum Pulse Width Summary
 39. Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 40. Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 41. Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 42. Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 43. Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 44. Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 45. Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 46. Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 47. Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 48. Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 49. Slow 1200mV 0C Model Minimum Pulse Width: 'clk8'
 50. Setup Times
 51. Hold Times
 52. Clock to Output Times
 53. Minimum Clock to Output Times
 54. Output Enable Times
 55. Minimum Output Enable Times
 56. Output Disable Times
 57. Minimum Output Disable Times
 58. Slow 1200mV 0C Model Metastability Report
 59. Fast 1200mV 0C Model Setup Summary
 60. Fast 1200mV 0C Model Hold Summary
 61. Fast 1200mV 0C Model Recovery Summary
 62. Fast 1200mV 0C Model Removal Summary
 63. Fast 1200mV 0C Model Minimum Pulse Width Summary
 64. Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 65. Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 66. Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 67. Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 68. Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 69. Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 70. Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 71. Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 72. Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 73. Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 74. Fast 1200mV 0C Model Minimum Pulse Width: 'clk8'
 75. Setup Times
 76. Hold Times
 77. Clock to Output Times
 78. Minimum Clock to Output Times
 79. Output Enable Times
 80. Minimum Output Enable Times
 81. Output Disable Times
 82. Minimum Output Disable Times
 83. Fast 1200mV 0C Model Metastability Report
 84. Multicorner Timing Analysis Summary
 85. Setup Times
 86. Hold Times
 87. Clock to Output Times
 88. Minimum Clock to Output Times
 89. Board Trace Model Assignments
 90. Input Transition Times
 91. Slow Corner Signal Integrity Metrics
 92. Fast Corner Signal Integrity Metrics
 93. Setup Transfers
 94. Hold Transfers
 95. Recovery Transfers
 96. Removal Transfers
 97. Report TCCS
 98. Report RSKM
 99. Unconstrained Paths
100. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; atari800core                                                      ;
; Device Family      ; Cyclone III                                                       ;
; Device Name        ; EP3C25E144C8                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Enabled                                                           ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.22        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;  22.2%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------+
; SDC File List                                        ;
+------------------+--------+--------------------------+
; SDC File Path    ; Status ; Read at                  ;
+------------------+--------+--------------------------+
; atari800core.sdc ; OK     ; Tue Jul 29 23:25:05 2014 ;
+------------------+--------+--------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                             ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+
; Clock Name                                      ; Type      ; Period  ; Frequency  ; Rise  ; Fall   ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source                                            ; Targets                                             ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+
; clk8                                            ; Base      ; 125.000 ; 8.0 MHz    ; 0.000 ; 62.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;                                                   ; { clk8 }                                            ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 8.814   ; 113.46 MHz ; 0.000 ; 4.407  ; 50.00      ; 11        ; 156         ;       ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[0] } ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 17.628  ; 56.73 MHz  ; 0.000 ; 8.814  ; 50.00      ; 11        ; 78          ;       ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[1] } ;
; pll|altpll_component|auto_generated|pll1|clk[2] ; Generated ; 8.814   ; 113.46 MHz ; 4.407 ; 8.814  ; 50.00      ; 11        ; 156         ; 180.0 ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[2] } ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Fmax Summary                                                    ;
+------------+-----------------+-------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                      ; Note ;
+------------+-----------------+-------------------------------------------------+------+
; 62.27 MHz  ; 62.27 MHz       ; pll|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 137.63 MHz ; 137.63 MHz      ; pll|altpll_component|auto_generated|pll1|clk[0] ;      ;
+------------+-----------------+-------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


----------------------------------
; Timing Closure Recommendations ;
----------------------------------
HTML report is unavailable in plain text report export.


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup Summary                                     ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.080 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 1.548 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.320 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.454 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery Summary                                  ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 3.756 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.487 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal Summary                                   ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.609 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 3.484 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width Summary                        ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.098  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.506  ; 0.000         ;
; clk8                                            ; 62.409 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                       ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                             ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.080 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 7.567      ;
; 1.097 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 7.531      ;
; 1.118 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.202     ; 7.495      ;
; 1.129 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.200     ; 7.486      ;
; 1.201 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.189     ; 7.425      ;
; 1.231 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.197     ; 7.387      ;
; 1.249 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.197     ; 7.369      ;
; 1.250 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 7.372      ;
; 1.299 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.179     ; 7.337      ;
; 1.302 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.204     ; 7.309      ;
; 1.322 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.189     ; 7.304      ;
; 1.341 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.178     ; 7.296      ;
; 1.351 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 7.277      ;
; 1.390 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.202     ; 7.223      ;
; 1.447 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.186     ; 7.182      ;
; 1.449 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.186     ; 7.180      ;
; 1.478 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.202     ; 7.135      ;
; 1.486 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 7.149      ;
; 1.522 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 7.100      ;
; 1.550 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.202     ; 7.063      ;
; 1.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 15.956     ;
; 1.595 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 7.052      ;
; 1.602 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 7.029      ;
; 1.604 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 7.024      ;
; 1.615 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 7.013      ;
; 1.615 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 7.013      ;
; 1.619 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.202     ; 6.994      ;
; 1.635 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.189     ; 6.991      ;
; 1.665 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 6.963      ;
; 1.680 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 6.948      ;
; 1.693 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 6.935      ;
; 1.701 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.189     ; 6.925      ;
; 1.704 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 6.931      ;
; 1.740 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.200     ; 6.875      ;
; 1.741 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 6.894      ;
; 1.746 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.169     ; 6.900      ;
; 1.748 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.200     ; 6.867      ;
; 1.756 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 15.767     ;
; 1.768 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.192     ; 6.855      ;
; 1.770 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.192     ; 6.853      ;
; 1.771 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.188     ; 6.856      ;
; 1.793 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.186     ; 6.836      ;
; 1.841 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 6.787      ;
; 1.852 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.189     ; 6.774      ;
; 1.870 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.189     ; 6.756      ;
; 1.884 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.191     ; 6.740      ;
; 1.887 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[2]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.732      ;
; 1.898 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 6.730      ;
; 1.919 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.187     ; 6.709      ;
; 1.933 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.124     ; 15.572     ;
; 1.960 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.684      ;
; 1.962 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 15.553     ;
; 1.964 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.202     ; 6.649      ;
; 1.966 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 15.582     ;
; 1.967 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.182     ; 6.666      ;
; 1.968 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 6.667      ;
; 1.969 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.202     ; 6.644      ;
; 1.971 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 6.660      ;
; 1.974 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.648      ;
; 1.974 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.202     ; 6.639      ;
; 1.979 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.182     ; 6.654      ;
; 1.993 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 15.559     ;
; 2.014 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 15.501     ;
; 2.024 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 6.611      ;
; 2.035 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.201     ; 6.579      ;
; 2.042 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.602      ;
; 2.044 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 15.499     ;
; 2.056 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 15.459     ;
; 2.064 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 15.462     ;
; 2.093 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 15.431     ;
; 2.115 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 6.516      ;
; 2.120 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|read_en_r                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[22]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.424     ;
; 2.133 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.511      ;
; 2.138 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.484      ;
; 2.138 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.186     ; 6.491      ;
; 2.138 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                     ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 15.389     ;
; 2.154 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.169     ; 6.492      ;
; 2.160 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.385     ;
; 2.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 15.351     ;
; 2.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 15.366     ;
; 2.166 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 15.352     ;
; 2.175 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.177     ; 6.463      ;
; 2.176 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.369     ;
; 2.187 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 15.362     ;
; 2.189 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 15.352     ;
; 2.193 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.107     ; 15.329     ;
; 2.196 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 15.347     ;
; 2.201 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 15.312     ;
; 2.203 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 15.346     ;
; 2.206 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 6.425      ;
; 2.206 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.120     ; 15.303     ;
; 2.212 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 15.331     ;
; 2.220 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.129     ; 15.280     ;
; 2.235 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 6.412      ;
; 2.244 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 6.391      ;
; 2.245 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.374      ;
; 2.246 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.286     ;
; 2.247 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.123     ; 15.259     ;
; 2.249 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.296     ;
; 2.251 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 15.273     ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                ;
+-------+-----------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                            ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.548 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 7.188      ;
; 1.548 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 7.188      ;
; 1.548 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 7.188      ;
; 1.749 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.987      ;
; 1.749 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.987      ;
; 1.749 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.987      ;
; 1.856 ; chameleon_cdtv_remote:myIr|timer[10]                ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.880      ;
; 1.856 ; chameleon_cdtv_remote:myIr|timer[10]                ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.880      ;
; 1.856 ; chameleon_cdtv_remote:myIr|timer[10]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.880      ;
; 1.882 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.829      ;
; 1.918 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.140     ; 6.627      ;
; 1.980 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 6.557      ;
; 2.022 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.583      ;
; 2.028 ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[8] ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.254     ; 6.403      ;
; 2.034 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 6.500      ;
; 2.035 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 6.499      ;
; 2.061 ; chameleon_cdtv_remote:myIr|timer[1]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.676      ;
; 2.061 ; chameleon_cdtv_remote:myIr|timer[1]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.676      ;
; 2.061 ; chameleon_cdtv_remote:myIr|timer[1]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.676      ;
; 2.077 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.529      ;
; 2.083 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.628      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[0]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[1]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[2]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[3]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[4]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[5]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[6]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[7]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[8]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[9]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[10]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[11]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[12]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|bitlength[13]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.638      ;
; 2.112 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.624      ;
; 2.113 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.623      ;
; 2.152 ; chameleon_cdtv_remote:myIr|timer[4]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.584      ;
; 2.152 ; chameleon_cdtv_remote:myIr|timer[4]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.584      ;
; 2.152 ; chameleon_cdtv_remote:myIr|timer[4]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.584      ;
; 2.153 ; chameleon_cdtv_remote:myIr|timer[7]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.583      ;
; 2.153 ; chameleon_cdtv_remote:myIr|timer[7]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.583      ;
; 2.153 ; chameleon_cdtv_remote:myIr|timer[7]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.583      ;
; 2.153 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|ba_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 6.441      ;
; 2.153 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 6.381      ;
; 2.158 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.140     ; 6.387      ;
; 2.161 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 6.382      ;
; 2.163 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|data_out_reg[28]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 6.306      ;
; 2.164 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.376      ;
; 2.165 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.375      ;
; 2.170 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 6.373      ;
; 2.189 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.406      ;
; 2.190 ; chameleon_cdtv_remote:myIr|timer[10]                ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.521      ;
; 2.198 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.397      ;
; 2.202 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.535      ;
; 2.202 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.535      ;
; 2.202 ; chameleon_cdtv_remote:myIr|timer[3]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.535      ;
; 2.204 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.152     ; 6.329      ;
; 2.212 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.394      ;
; 2.218 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.143     ; 6.324      ;
; 2.220 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 6.317      ;
; 2.227 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.143     ; 6.315      ;
; 2.236 ; sdram_statemachine:sdram_adaptor|delay_reg[5]       ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 6.298      ;
; 2.265 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 6.278      ;
; 2.276 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.329      ;
; 2.289 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.251      ;
; 2.293 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.302      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[0]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[1]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[2]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[3]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[4]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[5]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[6]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[7]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[8]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[9]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[10]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[11]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[12]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.299 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|bitlength[13]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.437      ;
; 2.307 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.233      ;
; 2.313 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.423      ;
; 2.314 ; chameleon_cdtv_remote:myIr|timer[16]                ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.422      ;
; 2.316 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.143     ; 6.226      ;
; 2.319 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.287      ;
; 2.322 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.143     ; 6.220      ;
; 2.323 ; chameleon_cdtv_remote:myIr|bitlength[0]             ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.413      ;
; 2.323 ; chameleon_cdtv_remote:myIr|bitlength[0]             ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.413      ;
; 2.323 ; chameleon_cdtv_remote:myIr|bitlength[0]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.413      ;
; 2.329 ; chameleon_cdtv_remote:myIr|timer[12]                ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.408      ;
; 2.329 ; chameleon_cdtv_remote:myIr|timer[12]                ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.408      ;
; 2.329 ; chameleon_cdtv_remote:myIr|timer[12]                ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.408      ;
; 2.332 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.404      ;
; 2.332 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.404      ;
; 2.332 ; chameleon_cdtv_remote:myIr|bitlength[2]             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.404      ;
; 2.344 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 6.250      ;
; 2.352 ; chameleon_cdtv_remote:myIr|timer[15]                ; chameleon_cdtv_remote:myIr|current_code[3]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.383      ;
; 2.356 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.146     ; 6.183      ;
; 2.357 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|data_out_reg[28]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 6.112      ;
+-------+-----------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                             ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                  ; To Node                                                                                                                                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.320 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][6]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.058      ;
; 0.321 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][4]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.059      ;
; 0.322 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.060      ;
; 0.349 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][0]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.087      ;
; 0.396 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.134      ;
; 0.405 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                                                                        ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.205      ; 0.842      ;
; 0.407 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.144      ;
; 0.408 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][2]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.146      ;
; 0.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][3]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.147      ;
; 0.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][0]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.147      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.148      ;
; 0.414 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.151      ;
; 0.419 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.477      ; 1.150      ;
; 0.421 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][6]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.157      ;
; 0.424 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.157      ;
; 0.425 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][0]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.162      ;
; 0.426 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.162      ;
; 0.433 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.169      ;
; 0.438 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.176      ;
; 0.442 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][3]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.178      ;
; 0.444 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][6]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.181      ;
; 0.445 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][3]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.182      ;
; 0.451 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][3]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.187      ;
; 0.453 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[0]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[0]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                         ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[14]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[14]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][4]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.190      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[1]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[0]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[7]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[7]                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[0]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[1]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[6]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_clock_reg                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_clock_reg                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[2]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[2]                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[3]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[3]                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[1]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[1]                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[3]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[4]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[5]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_shift_reg[9]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_shift_reg[9]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serial_out_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serial_out_reg                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[0]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[1]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[3]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[4]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[5]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[1]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[0]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[3]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[7]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[6]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_clock_reg                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_clock_reg                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[0]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[1]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[4]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[1]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[2]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[6]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_ip_framing_reg                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_ip_framing_reg                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[7]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[7]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[4]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[5]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[2]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[2]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[2]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[2]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[6]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                         ;
+-------+-------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                             ; To Node                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.454 ; chameleon_io:chameleon_io|c64_ba_reg                                                                  ; chameleon_io:chameleon_io|c64_ba_reg                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                   ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_kb_ack                                                                  ; chameleon_io:chameleon_io|c64_kb_ack                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_cs_loc                                                                  ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                             ; chameleon_io:chameleon_io|c64_data_reg[4]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                    ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                         ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                           ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                       ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[0]                                                                   ; chameleon_cdtv_remote:myIr|timer[0]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[1]                                                                   ; chameleon_cdtv_remote:myIr|timer[1]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[2]                                                                   ; chameleon_cdtv_remote:myIr|timer[2]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[3]                                                                   ; chameleon_cdtv_remote:myIr|timer[3]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[9]                                                                   ; chameleon_cdtv_remote:myIr|timer[9]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[12]                                                                  ; chameleon_cdtv_remote:myIr|timer[12]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[14]                                                                  ; chameleon_cdtv_remote:myIr|timer[14]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[6]                                                                   ; chameleon_cdtv_remote:myIr|timer[6]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                    ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[5]                                                            ; chameleon_cdtv_remote:myIr|current_code[5]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[3]                                                            ; chameleon_cdtv_remote:myIr|current_code[3]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[2]                                                            ; chameleon_cdtv_remote:myIr|current_code[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[1]                                                            ; chameleon_cdtv_remote:myIr|current_code[1]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[0]                                                            ; chameleon_cdtv_remote:myIr|current_code[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[7]                                                            ; chameleon_cdtv_remote:myIr|current_code[7]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[11]                                                           ; chameleon_cdtv_remote:myIr|current_code[11]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|reply_reg                                                            ; sdram_statemachine:sdram_adaptor|reply_reg                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                          ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                          ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                         ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                         ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|req_reg                                                                             ; chameleon_usb:usb|req_reg                                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_RESET                                                                   ; chameleon_usb:usb|state.STATE_RESET                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                ; chameleon_usb:usb|state.STATE_READ_ACK                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_ADDR2                                                                   ; chameleon_usb:usb|state.STATE_ADDR2                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_ADDR1                                                                   ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_ADDR0                                                                   ; chameleon_usb:usb|state.STATE_ADDR0                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_LEN1                                                                    ; chameleon_usb:usb|state.STATE_LEN1                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_LEN0                                                                    ; chameleon_usb:usb|state.STATE_LEN0                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.456 ; chameleon_cdtv_remote:myIr|current_code[4]                                                            ; chameleon_cdtv_remote:myIr|current_code[4]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.078      ; 0.746      ;
; 0.466 ; chameleon_io:chameleon_io|mux_clk_reg                                                                 ; chameleon_io:chameleon_io|mux_clk_reg                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.466 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.467 ; chameleon_io:chameleon_io|mux_toggle                                                                  ; chameleon_io:chameleon_io|mux_toggle                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.758      ;
; 0.467 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.758      ;
; 0.494 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.READ_ROW            ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|we                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.785      ;
; 0.494 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.786      ;
; 0.502 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.793      ;
; 0.502 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.793      ;
; 0.502 ; chameleon_io:chameleon_io|c64_kb_ack                                                                  ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                         ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[84]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_usb:usb|state.STATE_ADDR1                                                                   ; chameleon_usb:usb|state.STATE_ADDR0                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.504 ; chameleon_io:chameleon_io|mux_state.MUX_CLKPORT                                                       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.504 ; chameleon_io:chameleon_io|mux_state.MUX_MMC2L                                                         ; chameleon_io:chameleon_io|mux_state.MUX_A0                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.504 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.504 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.504 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.504 ; chameleon_cdtv_remote:myIr|shiftreg[17]                                                               ; chameleon_cdtv_remote:myIr|current_code[5]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.504 ; chameleon_usb:usb|state.STATE_ADDR2                                                                   ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.505 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.796      ;
; 0.510 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                        ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.802      ;
; 0.510 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                               ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.801      ;
; 0.511 ; chameleon_io:chameleon_io|mux_state.MUX_IEC1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_MMC1L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                          ; chameleon_io:chameleon_io|mux_state.MUX_MMC3H                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localEnd                                    ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.512 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                               ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                               ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                        ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.804      ;
; 0.512 ; chameleon_io:chameleon_io|mux_state.MUX_ULTIMAX                                                       ; chameleon_io:chameleon_io|mux_state.MUX_MMC0H                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.513 ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                               ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.804      ;
; 0.513 ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                               ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.804      ;
; 0.514 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.READ_ROW            ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.STORE_ROW              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.805      ;
; 0.517 ; chameleon_io:chameleon_io|mux_state.MUX_RESET                                                         ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.808      ;
; 0.518 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                               ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.809      ;
; 0.518 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                   ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.810      ;
; 0.520 ; chameleon_usb:usb|state.STATE_LEN2                                                                    ; chameleon_usb:usb|state.STATE_LEN1                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.811      ;
+-------+-------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 3.756 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 4.733      ;
; 3.756 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 4.733      ;
; 3.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.396     ; 4.520      ;
; 3.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.396     ; 4.520      ;
; 3.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.269     ; 4.647      ;
; 3.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.269     ; 4.647      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.330     ; 4.573      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.328     ; 4.575      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.329     ; 4.574      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.332     ; 4.571      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.332     ; 4.571      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.330     ; 4.573      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.332     ; 4.571      ;
; 3.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.328     ; 4.575      ;
; 3.771 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.331     ; 4.571      ;
; 3.771 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.331     ; 4.571      ;
; 3.771 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.329     ; 4.573      ;
; 3.772 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.392     ; 4.509      ;
; 3.774 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.255     ; 4.656      ;
; 3.774 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.253     ; 4.658      ;
; 3.774 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.257     ; 4.654      ;
; 3.775 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.251     ; 4.659      ;
; 3.780 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.388     ; 4.505      ;
; 3.780 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.388     ; 4.505      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.702      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.700      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.205     ; 4.698      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.205     ; 4.698      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.205     ; 4.698      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.700      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.202     ; 4.701      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.702      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.202     ; 4.701      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.700      ;
; 3.782 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.205     ; 4.698      ;
; 3.783 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.202     ; 4.700      ;
; 3.783 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.698      ;
; 3.783 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.698      ;
; 3.783 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.698      ;
; 3.783 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.698      ;
; 3.783 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.698      ;
; 3.784 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.265     ; 4.636      ;
; 3.792 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.261     ; 4.632      ;
; 3.792 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.261     ; 4.632      ;
; 3.793 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.245     ; 4.647      ;
; 3.793 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.248     ; 4.644      ;
; 3.793 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.250     ; 4.642      ;
; 3.799 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.242     ; 4.644      ;
; 3.800 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.249     ; 4.636      ;
; 3.800 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.249     ; 4.636      ;
; 3.812 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.238     ; 4.635      ;
; 4.463 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.149      ;
; 4.463 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.149      ;
; 4.463 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.149      ;
; 4.463 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.149      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 4.141      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.471 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.204     ; 4.140      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
; 4.472 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 4.142      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                     ;
+-------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                                                                                                    ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 8.487 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 9.055      ;
; 8.487 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 9.055      ;
; 8.487 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 9.055      ;
; 8.622 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 8.922      ;
; 8.622 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 8.922      ;
; 8.622 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 8.922      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[7]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 8.609      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 8.610      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 8.604      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 8.604      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[14]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 8.604      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[14]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 8.604      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 8.604      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 8.604      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[13]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 8.604      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[13]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 8.604      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[15]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 8.604      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[1]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[1]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.608      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.608      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 8.607      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 8.607      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 8.612      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.608      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 8.612      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[2]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.096     ; 8.602      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[4]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[6]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[5]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 8.611      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[4]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 8.611      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[3]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 8.611      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[2]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 8.611      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[1]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 8.611      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[11]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.608      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 8.601      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[10]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[9]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[7]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[7]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 8.601      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 8.601      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[6]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 8.601      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.608      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 8.601      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[3]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 8.601      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 8.611      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[2]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 8.601      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[2]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 8.601      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.608      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 8.611      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 8.611      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 8.600      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[1]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.608      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 8.611      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[5]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.608      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[4]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 8.608      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[4]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 8.600      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 8.601      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[0]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 8.601      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 8.606      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.931 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.605      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 8.599      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 8.599      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.604      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.604      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.604      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.604      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.604      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.604      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.604      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.604      ;
; 8.932 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.604      ;
+-------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.609 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.247      ;
; 1.609 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.247      ;
; 1.609 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.247      ;
; 1.609 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.247      ;
; 1.609 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.247      ;
; 1.609 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.247      ;
; 1.609 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 2.247      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.911 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.525      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 1.936 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.403      ; 2.550      ;
; 2.265 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.440      ; 2.916      ;
; 2.265 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.440      ; 2.916      ;
; 2.265 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.440      ; 2.916      ;
; 2.265 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.440      ; 2.916      ;
; 2.265 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.440      ; 2.916      ;
; 2.265 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.440      ; 2.916      ;
; 3.579 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|sdram_request_reg                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 3.904      ;
; 3.579 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|reply_sreg                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 3.904      ;
; 3.579 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[20]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 3.904      ;
; 3.579 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[21]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 3.904      ;
; 3.580 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[2]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.100      ; 3.892      ;
; 3.589 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[11]                                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.093      ; 3.894      ;
; 3.589 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[3]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.093      ; 3.894      ;
; 3.589 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[2]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.093      ; 3.894      ;
; 3.589 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[1]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.093      ; 3.894      ;
; 3.589 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[0]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.093      ; 3.894      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[2]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[3]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[4]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[5]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[6]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[7]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[8]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[9]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[10]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[11]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[12]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.088      ; 3.902      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[13]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.901      ;
; 3.602 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[14]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.087      ; 3.901      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 3.484 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.903      ;
; 3.484 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.903      ;
; 3.484 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.903      ;
; 3.484 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.903      ;
; 3.493 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.911      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 3.914      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 3.914      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 3.913      ;
; 3.494 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.184      ; 3.910      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.919      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.919      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.919      ;
; 3.502 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 3.919      ;
; 4.028 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 4.363      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 4.367      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 4.366      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 4.365      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 4.364      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 4.363      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 4.363      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 4.363      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 4.364      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 4.365      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 4.366      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 4.367      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 4.366      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 4.364      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 4.365      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 4.364      ;
; 4.029 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 4.363      ;
; 4.042 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.154      ; 4.342      ;
; 4.053 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.197      ; 4.396      ;
; 4.053 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.197      ; 4.396      ;
; 4.054 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 4.342      ;
; 4.054 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 4.342      ;
; 4.059 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.150      ; 4.355      ;
; 4.060 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.141      ; 4.347      ;
; 4.061 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.144      ; 4.351      ;
; 4.062 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.146      ; 4.354      ;
; 4.073 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 4.349      ;
; 4.073 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 4.349      ;
; 4.077 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 4.361      ;
; 4.077 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 4.363      ;
; 4.078 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 4.360      ;
; 4.079 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.125      ; 4.350      ;
; 4.079 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.133      ; 4.358      ;
; 4.095 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.122      ; 4.363      ;
; 4.095 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.122      ; 4.363      ;
; 4.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.058      ; 4.260      ;
; 4.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 4.262      ;
; 4.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.059      ; 4.261      ;
; 4.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.056      ; 4.258      ;
; 4.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.056      ; 4.258      ;
; 4.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 4.259      ;
; 4.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 4.259      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                  ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                              ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[0]                                                              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[2]                                                              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_reg[3]                                                                ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A3                                                          ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A3_C                                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_BUS                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_BUSVIC                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_CLKPORT                                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC0H                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC4L                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5L                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_ULTIMAX                                                     ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_toggle                                                                ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10]                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[0]                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[10]                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[11]                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[12]                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[13]                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[1]                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[2]                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[4]                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[5]                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[6]                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[7]                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[8]                                                       ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[9]                                                       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[0]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[1]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[2]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[3]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[4]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[0]                                                          ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[2]                                                          ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[3]                                                          ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_rew                                                                  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[0]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[13]                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[14]                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[15]                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[16]                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                         ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[10]                                                                ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[11]                                                                ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[13]                                                                ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[15]                                                                ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[16]                                                                ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[4]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[5]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[7]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[8]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|button_reset_n                                                            ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[1]                    ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[2]                    ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[8]                    ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|io_ef_n_reg ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[0]                                ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[1]                                ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[2]                                ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[3]                                ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|ir                                                                        ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[1]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[3]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A0                                                          ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A1                                                          ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A2                                                          ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0VIC                                                       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_1                                                      ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_END0                                                        ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC1                                                        ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                        ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC4                                                        ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_LED                                                         ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC0L                                                       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC1H                                                       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC1L                                                       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC2H                                                       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC2L                                                       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC3H                                                       ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                            ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                                                                                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[0]                                                                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[10]                                                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[11]                                                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[12]                                                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[13]                                                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[14]                                                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[15]                                                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[1]                                                                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[2]                                                                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[3]                                                                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[4]                                                                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[5]                                                                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[6]                                                                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[7]                                                                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[9]                                                                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[5]                                                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[7]                                                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[0]                                                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[1]                                                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[4]                                                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[5]                                                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[4]                                                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[5]                                                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[4]                                                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[7]                                                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|irqActive                                                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile1|count_reg[0]                                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile1|count_reg[1]                                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile1|shift_reg[6]                                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[1]                                                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[2]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|sizem_raw_reg[3]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[0][3]                                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[0][4]                                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[0][6]                                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[1][3]                                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[1][4]                                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[1][6]                                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_g7h:cntr5|counter_reg_bit[0] ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[0] ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[1] ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][1]                                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|shift_reg[0][2]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|shift_reg[0][3]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|shift_reg[1][2]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|shift_reg[1][3]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|shift_reg[2][2]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|shift_reg[2][3]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|shift_reg[3][2]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|shift_reg[3][3]                                                                                ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[16]                                                                                                     ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[17]                                                                                                     ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[12]                                                                                               ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                                                                               ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[14]                                                                                               ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21]                                                                                               ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29]                                                                                               ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|antic_fetch_real_reg                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_32bit_reg                                                                                                  ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_8bit_reg                                                                                                   ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmist_reg[6]                                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[2]                                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[6]                                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[2]                                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[5]                                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[3]                                                                                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[6]                                                                                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpf1_delay|shift_reg[1][2]                                                                               ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][3]                                                                               ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][6]                                                                               ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|synchronizer:sio_in1_synchronizer|ff_reg[0]                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|synchronizer:sio_in1_synchronizer|ff_reg[1]                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|synchronizer:sio_in1_synchronizer|ff_reg[2]                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[10]                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[11]                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[12]                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[13]                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[14]                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[15]                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[16]                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[5]                                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[6]                                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[7]                                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[8]                                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[9]                                                                                              ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|b_reg[4]                                                                                                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|b_reg[6]                                                                                                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; scandoubler:scandoubler1|g_reg[4]                                                                                                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[13]                                                                                                                                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[14]                                                                                                                                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[15]                                                                                                                                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[16]                                                                                                                                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[17]                                                                                                                                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[18]                                                                                                                                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[19]                                                                                                                                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[12]                                                                                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[13]                                                                                                                                                             ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[14]                                                                                                                                                             ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'clk8'                                                                                           ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.449  ; 62.449       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.481  ; 62.481       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.518  ; 62.518       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.551  ; 62.551       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.384 ; 2.538 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.578 ; 2.771 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 3.331 ; 3.517 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 3.320 ; 3.517 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 3.275 ; 3.368 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.599 ; 2.705 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 3.331 ; 3.398 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 2.406 ; 2.541 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 3.652 ; 3.929 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.676 ; 3.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.087 ; 3.002 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.227 ; 3.119 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.116 ; 3.024 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.011 ; 2.990 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.226 ; 3.256 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.214 ; 3.193 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.063 ; 3.061 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.267 ; 3.288 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.101 ; 3.029 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.058 ; 3.038 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.114 ; 3.150 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.676 ; 3.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.940 ; 2.961 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.971 ; 2.969 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.193 ; 3.094 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.944 ; 2.893 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 1.672 ; 1.785 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 4.834 ; 5.116 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 3.973 ; 3.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 5.792 ; 5.991 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -1.606 ; -1.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -1.809 ; -1.996 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -1.797 ; -1.913 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.967 ; -2.046 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -2.361 ; -2.450 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -1.797 ; -1.913 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.909 ; -1.956 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -1.628 ; -1.748 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -2.839 ; -3.107 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.653 ; -0.702 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.656 ; -0.705 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.656 ; -0.705 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.606 ; -0.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.597 ; -0.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.598 ; -0.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.598 ; -0.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.597 ; -0.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.596 ; -0.644 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.658 ; -0.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.658 ; -0.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -0.922 ; -1.020 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -0.985 ; -1.133 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -1.179 ; -1.299 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -4.888 ; -5.076 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.354 ; 6.436 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.354 ; 6.436 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.338 ; 4.437 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.303 ; 4.405 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.390 ; 4.461 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 5.977 ; 5.720 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.826 ; 5.985 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.420 ; 5.658 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.880 ; 5.057 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.884 ; 5.055 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.826 ; 5.985 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.810 ; 4.869 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.373 ; 3.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.653 ; 3.739 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.377 ; 3.332 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.454 ; 3.423 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.808 ; 4.867 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.637 ; 3.723 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.450 ; 3.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.450 ; 3.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.448 ; 3.417 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.810 ; 4.869 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.456 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.381 ; 3.336 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.456 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.433 ; 3.402 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.789 ; 4.848 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.430 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.461 ; 3.404 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.449 ; 3.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.438 ; 3.381 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.449 ; 3.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.451 ; 3.394 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.357 ; 3.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.357 ; 3.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.428 ; 3.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.439 ; 3.382 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.438 ; 3.381 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 7.730 ; 7.531 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.351 ; 4.227 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.195 ; 5.077 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 6.004 ; 5.810 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.730 ; 7.531 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.365 ; 6.037 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.311 ; 5.144 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.827 ; 4.747 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 5.128 ; 5.033 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.941 ; 4.806 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 5.311 ; 5.144 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.148 ; 5.037 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.041 ; 5.134 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.891 ; 6.135 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 6.234 ; 6.211 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.554 ; 4.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.583 ; 4.400 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.456 ; 4.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.234 ; 6.211 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 5.097 ; 4.940 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 8.019 ; 7.788 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.116 ; 6.024 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.135 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.013 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 3.753 ; 3.852 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 5.784 ; 5.860 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 3.786 ; 3.882 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 3.753 ; 3.852 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 3.837 ; 3.906 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 5.363 ; 5.116 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 4.307 ; 4.477 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 4.826 ; 5.056 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.307 ; 4.478 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.311 ; 4.477 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.215 ; 5.370 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.855 ; 2.811 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 2.855 ; 2.811 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.134 ; 3.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 2.858 ; 2.814 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 2.936 ; 2.906 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.290 ; 4.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.119 ; 3.206 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 2.932 ; 2.902 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 2.932 ; 2.902 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 2.930 ; 2.900 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.293 ; 4.353 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 2.936 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 2.862 ; 2.818 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 2.936 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.370 ; 4.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.916 ; 2.886 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.271 ; 4.331 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.912 ; 2.882 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.941 ; 2.885 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.929 ; 2.873 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.918 ; 2.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.370 ; 4.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.929 ; 2.873 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.931 ; 2.875 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 2.908 ; 2.852 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 2.919 ; 2.863 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 2.918 ; 2.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.801 ; 3.680 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 3.801 ; 3.680 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 4.610 ; 4.495 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 5.388 ; 5.200 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.102 ; 6.913 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 5.734 ; 5.418 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 4.260 ; 4.183 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.260 ; 4.183 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.548 ; 4.457 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.366 ; 4.236 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.725 ; 4.565 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 4.568 ; 4.461 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.462 ; 4.553 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.279 ; 5.514 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 3.903 ; 3.796 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 3.996 ; 3.846 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.023 ; 3.846 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 3.903 ; 3.796 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 5.665 ; 5.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.515 ; 4.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 7.323 ; 7.101 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 5.497 ; 5.408 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 6.661 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.543 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 5.256 ; 5.256 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.624 ; 5.624 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.618 ; 5.618 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.618 ; 5.618 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.585 ; 5.585 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 6.072 ; 6.072 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 6.406 ; 6.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.634 ; 5.634 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.256 ; 5.256 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.256 ; 5.256 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.320 ; 5.320 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.634 ; 5.634 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 6.406 ; 6.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 6.260 ; 6.260 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.575 ; 5.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.599 ; 5.599 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.599 ; 5.599 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.120 ; 4.186 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.484 ; 4.544 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.478 ; 4.538 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.478 ; 4.538 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.437 ; 4.503 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.905 ; 4.971 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.225 ; 5.291 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.484 ; 4.550 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.120 ; 4.186 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.120 ; 4.186 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.182 ; 4.248 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.484 ; 4.550 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.225 ; 5.291 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.085 ; 5.151 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.427 ; 4.493 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.461 ; 4.521 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.461 ; 4.521 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.980     ; 5.117     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.335     ; 5.466     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.304     ; 5.435     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.304     ; 5.435     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.276     ; 5.413     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.674     ; 5.811     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.953     ; 6.090     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.324     ; 5.461     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.980     ; 5.117     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.980     ; 5.117     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.023     ; 5.160     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.324     ; 5.461     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.953     ; 6.090     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.853     ; 5.990     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.266     ; 5.403     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.294     ; 5.425     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.294     ; 5.425     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.987     ; 3.987     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.333     ; 4.333     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.303     ; 4.303     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.303     ; 4.303     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.272     ; 4.272     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.654     ; 4.654     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.922     ; 4.922     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.317     ; 4.317     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.987     ; 3.987     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.987     ; 3.987     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.029     ; 4.029     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.317     ; 4.317     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.922     ; 4.922     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.826     ; 4.826     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.262     ; 4.262     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.294     ; 4.294     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.294     ; 4.294     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


----------------------------------------------
; Slow 1200mV 85C Model Metastability Report ;
----------------------------------------------
No synchronizer chains to report.


+---------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Fmax Summary                                                     ;
+------------+-----------------+-------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                      ; Note ;
+------------+-----------------+-------------------------------------------------+------+
; 65.96 MHz  ; 65.96 MHz       ; pll|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 145.43 MHz ; 145.43 MHz      ; pll|altpll_component|auto_generated|pll1|clk[0] ;      ;
+------------+-----------------+-------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.537 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 1.938 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold Summary                                       ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.308 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.402 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery Summary                                   ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.139 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 9.184 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal Summary                                    ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.480 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 3.129 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width Summary                         ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.101  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.508  ; 0.000         ;
; clk8                                            ; 62.394 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                        ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                             ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.537 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 7.098      ;
; 1.543 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 7.108      ;
; 1.570 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.178     ; 7.068      ;
; 1.587 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.147     ; 7.082      ;
; 1.590 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 7.058      ;
; 1.637 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 7.007      ;
; 1.691 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.950      ;
; 1.704 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 6.938      ;
; 1.707 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.183     ; 6.926      ;
; 1.743 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 6.905      ;
; 1.785 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.157     ; 6.874      ;
; 1.800 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.835      ;
; 1.807 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.844      ;
; 1.838 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.164     ; 6.814      ;
; 1.839 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.164     ; 6.813      ;
; 1.865 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.770      ;
; 1.936 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.699      ;
; 1.937 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.157     ; 6.722      ;
; 1.991 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.660      ;
; 1.996 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.655      ;
; 1.997 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.654      ;
; 2.018 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.617      ;
; 2.025 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.147     ; 6.644      ;
; 2.042 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.164     ; 6.610      ;
; 2.044 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.607      ;
; 2.058 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 6.590      ;
; 2.063 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.160     ; 6.593      ;
; 2.064 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.587      ;
; 2.067 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.584      ;
; 2.078 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 6.570      ;
; 2.102 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.541      ;
; 2.123 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.178     ; 6.515      ;
; 2.154 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.178     ; 6.484      ;
; 2.178 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.466      ;
; 2.179 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.465      ;
; 2.195 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.164     ; 6.457      ;
; 2.203 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.148     ; 6.465      ;
; 2.204 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.160     ; 6.452      ;
; 2.213 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.438      ;
; 2.225 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 6.423      ;
; 2.231 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.166     ; 6.419      ;
; 2.272 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 6.376      ;
; 2.275 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.160     ; 6.381      ;
; 2.281 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[2]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.174     ; 6.361      ;
; 2.285 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.366      ;
; 2.323 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.328      ;
; 2.327 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.308      ;
; 2.333 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.302      ;
; 2.345 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.290      ;
; 2.357 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.170     ; 6.289      ;
; 2.359 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.161     ; 6.296      ;
; 2.369 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.164     ; 6.283      ;
; 2.377 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.161     ; 6.278      ;
; 2.408 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.160     ; 6.248      ;
; 2.409 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.226      ;
; 2.414 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.251      ;
; 2.467 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 15.071     ;
; 2.478 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.165      ;
; 2.491 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.174      ;
; 2.504 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 6.161      ;
; 2.504 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.164     ; 6.148      ;
; 2.529 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.160     ; 6.127      ;
; 2.545 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.164     ; 6.107      ;
; 2.569 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 14.967     ;
; 2.589 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.148     ; 6.079      ;
; 2.596 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.156     ; 6.064      ;
; 2.606 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.160     ; 6.050      ;
; 2.613 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.164     ; 6.039      ;
; 2.617 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.166     ; 6.033      ;
; 2.630 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.013      ;
; 2.636 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.007      ;
; 2.662 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 5.989      ;
; 2.664 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 5.984      ;
; 2.666 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 5.982      ;
; 2.673 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.147     ; 5.996      ;
; 2.684 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 14.836     ;
; 2.726 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.170     ; 5.920      ;
; 2.766 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[17] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.168     ; 5.882      ;
; 2.774 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                     ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 14.766     ;
; 2.777 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.156     ; 5.883      ;
; 2.778 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.176     ; 5.862      ;
; 2.783 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.160     ; 5.873      ;
; 2.788 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 5.877      ;
; 2.791 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.151     ; 5.874      ;
; 2.803 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 14.756     ;
; 2.813 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 14.731     ;
; 2.840 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.158     ; 5.818      ;
; 2.842 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 14.721     ;
; 2.861 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.170     ; 5.785      ;
; 2.865 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 14.664     ;
; 2.867 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 14.660     ;
; 2.873 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.148     ; 5.795      ;
; 2.884 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.164     ; 5.768      ;
; 2.884 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[13] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.164     ; 5.768      ;
; 2.896 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.166     ; 5.754      ;
; 2.919 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.157     ; 5.740      ;
; 2.931 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.148     ; 5.737      ;
; 2.932 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.157     ; 5.727      ;
; 2.933 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 14.605     ;
; 2.935 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 14.602     ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                  ;
+-------+------------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                            ; To Node                                            ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.938 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.807      ;
; 1.938 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.807      ;
; 1.938 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.807      ;
; 2.148 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.597      ;
; 2.148 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.597      ;
; 2.148 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.597      ;
; 2.196 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 6.527      ;
; 2.222 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.523      ;
; 2.222 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.523      ;
; 2.222 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.523      ;
; 2.298 ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[8]  ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.224     ; 6.168      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[0]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[1]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[2]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[3]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[4]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[5]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[6]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[7]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[8]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[9]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[10]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[11]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[12]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.401 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[13]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.344      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 6.317      ;
; 2.415 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 6.149      ;
; 2.453 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 6.099      ;
; 2.453 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|ba_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 6.153      ;
; 2.454 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 6.098      ;
; 2.464 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.281      ;
; 2.465 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.280      ;
; 2.471 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.135     ; 6.084      ;
; 2.480 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 6.243      ;
; 2.487 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]  ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.126      ;
; 2.496 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 6.119      ;
; 2.504 ; chameleon_cdtv_remote:myIr|timer[1]                  ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.241      ;
; 2.504 ; chameleon_cdtv_remote:myIr|timer[1]                  ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.241      ;
; 2.504 ; chameleon_cdtv_remote:myIr|timer[1]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.241      ;
; 2.561 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 5.996      ;
; 2.562 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 5.995      ;
; 2.574 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 5.978      ;
; 2.581 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 6.026      ;
; 2.582 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 6.025      ;
; 2.587 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.129     ; 5.974      ;
; 2.588 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.129     ; 5.973      ;
; 2.594 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.128     ; 5.968      ;
; 2.595 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.128     ; 5.967      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[0]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[1]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[2]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[3]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[4]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[5]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[6]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[7]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[8]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[9]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[10]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[11]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[12]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.611 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[13]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.134      ;
; 2.613 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 6.002      ;
; 2.617 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|data_out_reg[28]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.192     ; 5.870      ;
; 2.628 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 5.936      ;
; 2.631 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|current_code[3]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.113      ;
; 2.644 ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[15] ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.210     ; 5.836      ;
; 2.645 ; chameleon_cdtv_remote:myIr|timer[7]                  ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.100      ;
; 2.645 ; chameleon_cdtv_remote:myIr|timer[7]                  ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.100      ;
; 2.645 ; chameleon_cdtv_remote:myIr|timer[7]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.100      ;
; 2.646 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|current_code[5]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.098      ;
; 2.647 ; chameleon_cdtv_remote:myIr|timer[4]                  ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.098      ;
; 2.647 ; chameleon_cdtv_remote:myIr|timer[4]                  ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.098      ;
; 2.647 ; chameleon_cdtv_remote:myIr|timer[4]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.098      ;
; 2.656 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.135     ; 5.899      ;
; 2.658 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 5.893      ;
; 2.662 ; sdram_statemachine:sdram_adaptor|delay_reg[5]        ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 5.890      ;
; 2.674 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.071      ;
; 2.675 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.070      ;
; 2.682 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 5.875      ;
; 2.684 ; chameleon_cdtv_remote:myIr|timer[3]                  ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.061      ;
; 2.684 ; chameleon_cdtv_remote:myIr|timer[3]                  ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.061      ;
; 2.684 ; chameleon_cdtv_remote:myIr|timer[3]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.061      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[0]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[1]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[2]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[3]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[4]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[5]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[6]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[7]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[8]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[9]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[10]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[11]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[12]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.685 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|bitlength[13]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.060      ;
; 2.702 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 5.905      ;
; 2.708 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.129     ; 5.853      ;
; 2.714 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 5.901      ;
+-------+------------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                              ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                  ; To Node                                                                                                                                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.308 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][6]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 0.966      ;
; 0.309 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][4]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 0.967      ;
; 0.309 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 0.967      ;
; 0.332 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][0]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 0.990      ;
; 0.379 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.037      ;
; 0.380 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                                                                        ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 0.775      ;
; 0.390 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.047      ;
; 0.391 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][2]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.049      ;
; 0.392 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][3]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.050      ;
; 0.393 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][0]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.051      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.052      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.423      ; 1.048      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.052      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.423      ; 1.054      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[7]                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[7]                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_shift_reg[9]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_shift_reg[9]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serial_out_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serial_out_reg                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[0]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[3]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[7]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[6]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[1]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[4]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[1]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[1]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[2]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[6]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[7]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[5]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[3]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pf_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pf_reg[3]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p3pf_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p3pf_reg[3]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[3]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[3]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[3]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[3]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[2]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[2]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[2]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[2]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[0]                                                                                       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[0]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[1]                                                                                       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[1]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[2]                                                                                       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[2]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[3]                                                                                       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[3]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                                              ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[65]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[65]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[70]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[70]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[75]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[75]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[60]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[60]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[28]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[28]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[21]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[21]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[44]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[44]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                            ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[12]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[12]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vsync_reg                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vsync_reg                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[119]                                                                                                            ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[119]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_reset_reg                                                                                         ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_reset_reg                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20]                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20]                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24]                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24]                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28]                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28]                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_add_sp2                                                                                     ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_add_sp2                                                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; sdram_statemachine:sdram_adaptor|sdram_request_reg                                                                                                         ; sdram_statemachine:sdram_adaptor|sdram_request_reg                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[8]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[8]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Ireg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Ireg                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Dreg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Dreg                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreRead                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreRead                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[7]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[7]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                          ;
+-------+-------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                             ; To Node                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.402 ; chameleon_io:chameleon_io|c64_ba_reg                                                                  ; chameleon_io:chameleon_io|c64_ba_reg                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                             ; chameleon_io:chameleon_io|c64_data_reg[4]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; sdram_statemachine:sdram_adaptor|reply_reg                                                            ; sdram_statemachine:sdram_adaptor|reply_reg                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                    ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                         ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                   ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|c64_kb_ack                                                                  ; chameleon_io:chameleon_io|c64_kb_ack                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|c64_cs_loc                                                                  ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                           ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                       ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[0]                                                                   ; chameleon_cdtv_remote:myIr|timer[0]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[1]                                                                   ; chameleon_cdtv_remote:myIr|timer[1]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[2]                                                                   ; chameleon_cdtv_remote:myIr|timer[2]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[3]                                                                   ; chameleon_cdtv_remote:myIr|timer[3]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[9]                                                                   ; chameleon_cdtv_remote:myIr|timer[9]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[12]                                                                  ; chameleon_cdtv_remote:myIr|timer[12]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[14]                                                                  ; chameleon_cdtv_remote:myIr|timer[14]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[6]                                                                   ; chameleon_cdtv_remote:myIr|timer[6]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                    ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[5]                                                            ; chameleon_cdtv_remote:myIr|current_code[5]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[3]                                                            ; chameleon_cdtv_remote:myIr|current_code[3]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[2]                                                            ; chameleon_cdtv_remote:myIr|current_code[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[1]                                                            ; chameleon_cdtv_remote:myIr|current_code[1]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[0]                                                            ; chameleon_cdtv_remote:myIr|current_code[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[7]                                                            ; chameleon_cdtv_remote:myIr|current_code[7]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[11]                                                           ; chameleon_cdtv_remote:myIr|current_code[11]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                          ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                          ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                         ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                         ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|req_reg                                                                             ; chameleon_usb:usb|req_reg                                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|state.STATE_RESET                                                                   ; chameleon_usb:usb|state.STATE_RESET                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                ; chameleon_usb:usb|state.STATE_READ_ACK                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[4]                                                            ; chameleon_cdtv_remote:myIr|current_code[4]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|state.STATE_ADDR2                                                                   ; chameleon_usb:usb|state.STATE_ADDR2                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|state.STATE_ADDR1                                                                   ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|state.STATE_ADDR0                                                                   ; chameleon_usb:usb|state.STATE_ADDR0                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|state.STATE_LEN1                                                                    ; chameleon_usb:usb|state.STATE_LEN1                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|state.STATE_LEN0                                                                    ; chameleon_usb:usb|state.STATE_LEN0                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.417 ; chameleon_io:chameleon_io|mux_clk_reg                                                                 ; chameleon_io:chameleon_io|mux_clk_reg                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.684      ;
; 0.417 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.684      ;
; 0.418 ; chameleon_io:chameleon_io|mux_toggle                                                                  ; chameleon_io:chameleon_io|mux_toggle                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.418 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.455 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.READ_ROW            ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|we                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.721      ;
; 0.458 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.724      ;
; 0.463 ; chameleon_io:chameleon_io|c64_kb_ack                                                                  ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.729      ;
; 0.466 ; chameleon_cdtv_remote:myIr|shiftreg[17]                                                               ; chameleon_cdtv_remote:myIr|current_code[5]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.732      ;
; 0.470 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.736      ;
; 0.471 ; chameleon_io:chameleon_io|mux_state.MUX_CLKPORT                                                       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                         ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[84]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localEnd                                    ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_usb:usb|state.STATE_ADDR1                                                                   ; chameleon_usb:usb|state.STATE_ADDR0                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.472 ; chameleon_io:chameleon_io|mux_state.MUX_MMC2L                                                         ; chameleon_io:chameleon_io|mux_state.MUX_A0                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.472 ; chameleon_usb:usb|state.STATE_ADDR2                                                                   ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.473 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.739      ;
; 0.477 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                               ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.743      ;
; 0.479 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                               ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                               ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                   ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                        ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.746      ;
; 0.479 ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                        ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.746      ;
; 0.479 ; chameleon_io:chameleon_io|mux_state.MUX_ULTIMAX                                                       ; chameleon_io:chameleon_io|mux_state.MUX_MMC0H                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                          ; chameleon_io:chameleon_io|mux_state.MUX_MMC3H                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_io:chameleon_io|mux_state.MUX_RESET                                                         ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.480 ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                               ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.746      ;
; 0.481 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.READ_ROW            ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.STORE_ROW              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.747      ;
; 0.482 ; chameleon_io:chameleon_io|mux_state.MUX_IEC1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_MMC1L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.748      ;
; 0.482 ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                               ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.748      ;
; 0.486 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                               ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.752      ;
; 0.486 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                ; chameleon_usb:usb|send_data[5]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.752      ;
+-------+-------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 4.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.174     ; 4.377      ;
; 4.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.174     ; 4.377      ;
; 4.146 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.299     ; 4.234      ;
; 4.146 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.302     ; 4.231      ;
; 4.146 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.302     ; 4.231      ;
; 4.146 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.299     ; 4.234      ;
; 4.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.299     ; 4.233      ;
; 4.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.298     ; 4.234      ;
; 4.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.302     ; 4.230      ;
; 4.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.302     ; 4.230      ;
; 4.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.299     ; 4.233      ;
; 4.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.302     ; 4.230      ;
; 4.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.298     ; 4.234      ;
; 4.150 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.359     ; 4.170      ;
; 4.150 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.359     ; 4.170      ;
; 4.166 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 4.345      ;
; 4.166 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.342      ;
; 4.166 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.342      ;
; 4.166 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 4.345      ;
; 4.166 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.181     ; 4.343      ;
; 4.166 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.181     ; 4.343      ;
; 4.166 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.342      ;
; 4.167 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 4.345      ;
; 4.167 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 4.344      ;
; 4.167 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.341      ;
; 4.167 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.341      ;
; 4.167 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.341      ;
; 4.167 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 4.344      ;
; 4.167 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 4.345      ;
; 4.167 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 4.344      ;
; 4.167 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 4.343      ;
; 4.167 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.182     ; 4.341      ;
; 4.169 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.356     ; 4.154      ;
; 4.170 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.239     ; 4.281      ;
; 4.170 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.239     ; 4.281      ;
; 4.175 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.351     ; 4.153      ;
; 4.175 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.351     ; 4.153      ;
; 4.179 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.225     ; 4.286      ;
; 4.180 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.227     ; 4.283      ;
; 4.180 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.224     ; 4.286      ;
; 4.180 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.229     ; 4.281      ;
; 4.189 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.236     ; 4.265      ;
; 4.195 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.231     ; 4.264      ;
; 4.195 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.231     ; 4.264      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.216     ; 4.277      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.219     ; 4.274      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.221     ; 4.272      ;
; 4.203 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.216     ; 4.271      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.220     ; 4.266      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.220     ; 4.266      ;
; 4.212 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.214     ; 4.264      ;
; 4.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 3.808      ;
; 4.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 3.808      ;
; 4.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 3.808      ;
; 4.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 3.808      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.803      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 3.802      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
; 4.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 3.803      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                      ;
+-------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                                                                                                    ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 9.184 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 8.372      ;
; 9.184 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 8.372      ;
; 9.184 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 8.372      ;
; 9.190 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 8.363      ;
; 9.190 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 8.363      ;
; 9.190 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 8.363      ;
; 9.603 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.952      ;
; 9.603 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.952      ;
; 9.603 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.952      ;
; 9.603 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.952      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.948      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.948      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.947      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.947      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 7.952      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.948      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 7.952      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.945      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.945      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.945      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[4]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.945      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[6]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.945      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.945      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.945      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[5]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.951      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[4]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.951      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[3]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.951      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[2]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.951      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[1]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.951      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[11]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.948      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[10]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.945      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[9]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.945      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[7]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.945      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.948      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.948      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 7.941      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[1]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[4]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 7.941      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 7.935      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.946      ;
; 9.604 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 7.935      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[7]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 7.949      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.950      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.944      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.944      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[14]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.944      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[14]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.944      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.944      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.944      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.946      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.946      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[13]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.944      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[13]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.944      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.946      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.946      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[15]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.944      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[1]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.946      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[1]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.946      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.946      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.946      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.946      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.946      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[2]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 7.942      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.941      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[7]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.941      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.941      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[6]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.941      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.941      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[3]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.941      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[2]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.941      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[2]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.941      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[1]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.947      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[5]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.947      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[4]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.947      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.941      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[0]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 7.941      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.945      ;
; 9.605 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.945      ;
; 9.606 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 7.939      ;
; 9.606 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 7.939      ;
; 9.606 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.944      ;
; 9.606 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.944      ;
; 9.606 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.944      ;
; 9.606 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.944      ;
+-------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.480 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.049      ;
; 1.480 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.049      ;
; 1.480 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.049      ;
; 1.480 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.049      ;
; 1.480 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.049      ;
; 1.480 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.049      ;
; 1.480 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.049      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.353      ; 2.286      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 1.754 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.352      ; 2.296      ;
; 2.044 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.625      ;
; 2.044 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.625      ;
; 2.044 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.625      ;
; 2.044 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.625      ;
; 2.044 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.625      ;
; 2.044 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.391      ; 2.625      ;
; 3.218 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|sdram_request_reg                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.102      ; 3.515      ;
; 3.218 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|reply_sreg                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.102      ; 3.515      ;
; 3.218 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[20]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.102      ; 3.515      ;
; 3.218 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[21]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.102      ; 3.515      ;
; 3.219 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[2]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.089      ; 3.503      ;
; 3.229 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[11]                                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 3.507      ;
; 3.229 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[3]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 3.507      ;
; 3.229 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[2]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 3.507      ;
; 3.229 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[1]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 3.507      ;
; 3.229 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[0]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.083      ; 3.507      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[2]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[3]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[4]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[5]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[6]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[7]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[8]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[9]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[10]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[11]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[12]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.082      ; 3.513      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[13]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 3.512      ;
; 3.236 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[14]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 3.512      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 3.129 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 3.510      ;
; 3.129 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 3.510      ;
; 3.129 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 3.510      ;
; 3.129 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 3.510      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.136 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.516      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 3.517      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.520      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.520      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.520      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.520      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.520      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.520      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.520      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.520      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.137 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.519      ;
; 3.145 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.527      ;
; 3.145 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.527      ;
; 3.146 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 3.527      ;
; 3.146 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 3.527      ;
; 3.630 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.932      ;
; 3.630 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.929      ;
; 3.630 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 3.928      ;
; 3.630 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.929      ;
; 3.630 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.932      ;
; 3.630 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.930      ;
; 3.630 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.929      ;
; 3.630 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.930      ;
; 3.630 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 3.929      ;
; 3.631 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.933      ;
; 3.631 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.932      ;
; 3.631 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 3.929      ;
; 3.631 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.166      ; 3.929      ;
; 3.631 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.932      ;
; 3.631 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 3.933      ;
; 3.631 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 3.932      ;
; 3.631 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 3.931      ;
; 3.643 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.133      ; 3.908      ;
; 3.649 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.127      ; 3.908      ;
; 3.649 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.127      ; 3.908      ;
; 3.654 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.175      ; 3.961      ;
; 3.654 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.175      ; 3.961      ;
; 3.655 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.129      ; 3.916      ;
; 3.655 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 3.918      ;
; 3.656 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.126      ; 3.914      ;
; 3.658 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 3.921      ;
; 3.659 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.116      ; 3.907      ;
; 3.659 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.116      ; 3.907      ;
; 3.666 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.111      ; 3.909      ;
; 3.671 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.122      ; 3.925      ;
; 3.672 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.120      ; 3.924      ;
; 3.673 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.117      ; 3.922      ;
; 3.674 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.123      ; 3.929      ;
; 3.680 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.107      ; 3.919      ;
; 3.680 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.107      ; 3.919      ;
; 3.713 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.044      ; 3.835      ;
; 3.713 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.041      ; 3.832      ;
; 3.713 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.041      ; 3.832      ;
; 3.713 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.044      ; 3.835      ;
; 3.713 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.040      ; 3.831      ;
; 3.714 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.043      ; 3.835      ;
; 3.714 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.044      ; 3.836      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                              ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|io_ef_n_reg ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[0]                                                              ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[2]                                                              ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_reg[3]                                                                ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A3                                                          ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A3_C                                                        ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_BUS                                                         ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_BUSVIC                                                      ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_CLKPORT                                                     ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC0H                                                       ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC4L                                                       ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5L                                                       ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_ULTIMAX                                                     ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                       ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_toggle                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_rew                                                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[1]                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[2]                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[8]                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[0]                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[1]                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[2]                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[3]                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[4]                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[5]                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[6]                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[7]                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[8]                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[0]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[10]                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[11]                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[1]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[2]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[3]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[4]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[5]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[6]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[7]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[8]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[9]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[0]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[1]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[2]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[3]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[4]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[5]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[6]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|docking_station                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|no_clock                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[0]                             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[7]                             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phiSync                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[1]                                                              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[3]                                                              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A0                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A1                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A2                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0VIC                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_1                                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_END0                                                        ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC1                                                        ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                        ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC4                                                        ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_LED                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC0L                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC1H                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC1L                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC2H                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC2L                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC3H                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC4H                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5H                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_NMIIRQ1                                                     ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_NMIIRQ2                                                     ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_PS2                                                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_RESET                                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                       ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[0]                                                              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[1]                                                              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[2]                                                              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[3]                                                              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[4]                                                              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[0]                                                              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[0]                                                                 ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[1]                                                                 ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[2]                                                                 ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[3]                                                                 ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[6]                                                                 ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]                                        ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10]                                       ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]                                        ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                             ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                                                                                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Nreg                                                                                              ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Zreg                                                                                              ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|irqActive                                                                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchTaken                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[0]                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[10]                                                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[11]                                                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[12]                                                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[13]                                                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[14]                                                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[15]                                                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[1]                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[2]                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[3]                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[4]                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[5]                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[6]                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[7]                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[9]                                                                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[2]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[4]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[5]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[6]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[7]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Creg                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[0]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[1]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[4]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[5]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[4]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[5]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[7]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[0]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[2]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[4]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[5]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[6]                                                                                              ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[7]                                                                                              ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[16]                                                                                                     ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[17]                                                                                                     ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[12]                                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[14]                                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmist_reg[6]                                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Vreg                                                                                              ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[1]                                                                                                          ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[0][3]                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[0][4]                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[0][6]                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[1][3]                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[1][4]                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:colpm3_delay|shift_reg[1][6]                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_g7h:cntr5|counter_reg_bit[0] ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[0] ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[1] ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][1]                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|synchronizer:sio_in1_synchronizer|ff_reg[0]                                                                              ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|synchronizer:sio_in1_synchronizer|ff_reg[1]                                                                              ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|synchronizer:sio_in1_synchronizer|ff_reg[2]                                                                              ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[10]                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[11]                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[12]                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[13]                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[14]                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[15]                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[16]                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[5]                                                                                              ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[6]                                                                                              ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[7]                                                                                              ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[8]                                                                                              ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[9]                                                                                              ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_reset_n_reg[0]                                                                                                                                                                                      ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_reset_n_reg[2]                                                                                                                                                                                      ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_reset_n_reg[3]                                                                                                                                                                                      ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_reset_n_reg[4]                                                                                                                                                                                      ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_reset_n_reg[5]                                                                                                                                                                                      ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_reset_n_reg[6]                                                                                                                                                                                      ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reconfig_reg                                                                                                                                                                                                  ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_long_reg                                                                                                                                                                                                ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; reset_short_reg                                                                                                                                                                                               ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[13]                                                                                                                                                          ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[14]                                                                                                                                                          ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[15]                                                                                                                                                          ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[16]                                                                                                                                                          ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[17]                                                                                                                                                          ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[18]                                                                                                                                                          ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[19]                                                                                                                                                          ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[12]                                                                                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[13]                                                                                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[14]                                                                                                                                                             ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[7]                                                                                                                                                           ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[1]                                                                                                                                                           ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[2]                                                                                                                                                           ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[3]                                                                                                                                                           ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[4]                                                                                                                                                           ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[5]                                                                                                                                                           ;
; 8.510 ; 8.726        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[12]                                                                                                                                                          ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'clk8'                                                                                            ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.449  ; 62.449       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.473  ; 62.473       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.526  ; 62.526       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.551  ; 62.551       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.054 ; 2.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.247 ; 2.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 2.941 ; 3.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 2.905 ; 3.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 2.860 ; 3.108 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.245 ; 2.464 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 2.941 ; 3.130 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 2.069 ; 2.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 3.207 ; 3.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.376 ; 3.198 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.818 ; 2.628 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.962 ; 2.699 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.861 ; 2.629 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.749 ; 2.606 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.948 ; 2.843 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.941 ; 2.790 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.795 ; 2.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.995 ; 2.852 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.821 ; 2.647 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.796 ; 2.640 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.862 ; 2.754 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.376 ; 3.198 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.677 ; 2.578 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.716 ; 2.576 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.927 ; 2.684 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.679 ; 2.506 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 1.427 ; 1.573 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 4.289 ; 4.740 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 3.592 ; 3.583 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 5.146 ; 5.204 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -1.365 ; -1.622 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -1.566 ; -1.840 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -1.537 ; -1.759 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.697 ; -1.859 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -2.053 ; -2.285 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -1.537 ; -1.759 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.657 ; -1.804 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -1.380 ; -1.621 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -2.488 ; -2.920 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.533 ; -0.583 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.537 ; -0.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.537 ; -0.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.494 ; -0.543 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.485 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.485 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.538 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.538 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -0.763 ; -0.896 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -0.807 ; -1.012 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -0.989 ; -1.170 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -4.343 ; -4.398 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.255 ; 6.457 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.255 ; 6.457 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.295 ; 4.449 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.269 ; 4.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.355 ; 4.465 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 5.934 ; 5.582 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.629 ; 5.979 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.262 ; 5.678 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.757 ; 5.087 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.794 ; 5.067 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.629 ; 5.979 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.702 ; 3.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.502 ; 3.478 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.857 ; 4.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.685 ; 3.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.495 ; 3.471 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.424 ; 3.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.483 ; 3.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.838 ; 4.904 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.479 ; 3.455 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.503 ; 3.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.471 ; 3.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 7.772 ; 7.310 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.379 ; 4.183 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.204 ; 4.948 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 6.012 ; 5.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.772 ; 7.310 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.411 ; 5.802 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.329 ; 5.005 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.844 ; 4.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 5.136 ; 4.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.969 ; 4.695 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 5.329 ; 5.005 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.136 ; 4.951 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.904 ; 5.136 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.690 ; 6.129 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 6.233 ; 6.150 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.584 ; 4.351 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.616 ; 4.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.481 ; 4.300 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.233 ; 6.150 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 5.082 ; 4.856 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 7.899 ; 7.428 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.063 ; 5.819 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.272 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.119 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 3.786 ; 3.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 5.755 ; 5.947 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 3.811 ; 3.961 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 3.786 ; 3.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 3.870 ; 3.977 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 5.388 ; 5.050 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 4.255 ; 4.555 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 4.740 ; 5.141 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.255 ; 4.573 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.292 ; 4.555 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.093 ; 5.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.968 ; 2.931 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 2.968 ; 2.931 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.247 ; 3.341 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 2.968 ; 2.931 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.048 ; 3.025 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.403 ; 4.470 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.231 ; 3.325 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.045 ; 3.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.045 ; 3.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.041 ; 3.018 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.405 ; 4.472 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.042 ; 2.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 2.970 ; 2.933 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.042 ; 2.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.476 ; 4.528 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.029 ; 3.006 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.385 ; 4.452 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.026 ; 3.003 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.048 ; 2.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.476 ; 4.528 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.038 ; 2.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.015 ; 2.966 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.026 ; 2.977 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.025 ; 2.976 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.895 ; 3.706 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 3.895 ; 3.706 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 4.686 ; 4.439 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 5.462 ; 5.063 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.210 ; 6.769 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 5.844 ; 5.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 4.342 ; 4.160 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.342 ; 4.160 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.623 ; 4.412 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.458 ; 4.194 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.807 ; 4.496 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 4.623 ; 4.445 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.397 ; 4.621 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.151 ; 5.574 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 3.996 ; 3.821 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.090 ; 3.866 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.122 ; 3.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 3.996 ; 3.821 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 5.732 ; 5.655 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.568 ; 4.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 7.275 ; 6.822 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 5.513 ; 5.279 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 6.857 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.710 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.854 ; 4.854 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.218 ; 5.218 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.220 ; 5.220 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.220 ; 5.220 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.203 ; 5.203 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.694 ; 5.694 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 6.020 ; 6.020 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.227 ; 5.227 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.854 ; 4.854 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.854 ; 4.854 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.918 ; 4.918 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.227 ; 5.227 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 6.020 ; 6.020 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.844 ; 5.844 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.193 ; 5.193 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.204 ; 5.204 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.204 ; 5.204 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.123 ; 4.116 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.481 ; 4.477 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.483 ; 4.479 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.483 ; 4.479 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.458 ; 4.451 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.929 ; 4.922 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.242 ; 5.235 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.481 ; 4.474 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.123 ; 4.116 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.123 ; 4.116 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.185 ; 4.178 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.481 ; 4.474 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.242 ; 5.235 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.074 ; 5.067 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.448 ; 4.441 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.468 ; 4.464 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.468 ; 4.464 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.504     ; 4.637     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.810     ; 4.931     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.773     ; 4.894     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.773     ; 4.894     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.741     ; 4.874     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.091     ; 5.224     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.340     ; 5.473     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.814     ; 4.947     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.504     ; 4.637     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.504     ; 4.637     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.545     ; 4.678     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.814     ; 4.947     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.340     ; 5.473     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.264     ; 5.397     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.731     ; 4.864     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.772     ; 4.893     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.772     ; 4.893     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.907     ; 3.907     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.201     ; 4.201     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.166     ; 4.166     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.166     ; 4.166     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.136     ; 4.136     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.471     ; 4.471     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.710     ; 4.710     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.205     ; 4.205     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.907     ; 3.907     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.907     ; 3.907     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.947     ; 3.947     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.205     ; 4.205     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.710     ; 4.710     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.638     ; 4.638     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.126     ; 4.126     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.165     ; 4.165     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.165     ; 4.165     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


---------------------------------------------
; Slow 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 5.404 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 5.665 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold Summary                                       ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.091 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.186 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery Summary                                    ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 6.479  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 13.319 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal Summary                                    ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.695 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 1.568 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width Summary                         ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.189  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.561  ; 0.000         ;
; clk8                                            ; 62.089 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                      ;
+-------+-------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                           ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.404 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 3.300      ;
; 5.465 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 3.256      ;
; 5.507 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 3.197      ;
; 5.514 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 3.202      ;
; 5.535 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 3.169      ;
; 5.565 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 3.146      ;
; 5.567 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 3.144      ;
; 5.580 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 3.122      ;
; 5.586 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 3.124      ;
; 5.596 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 3.125      ;
; 5.597 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 3.112      ;
; 5.613 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.087     ; 3.101      ;
; 5.623 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 3.086      ;
; 5.631 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 3.080      ;
; 5.642 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 3.060      ;
; 5.647 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 3.065      ;
; 5.647 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 3.060      ;
; 5.654 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 3.054      ;
; 5.656 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 3.052      ;
; 5.657 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 3.047      ;
; 5.662 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 3.050      ;
; 5.663 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 3.049      ;
; 5.678 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 3.034      ;
; 5.686 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 3.019      ;
; 5.691 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[2]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 3.015      ;
; 5.694 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 3.026      ;
; 5.717 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.985      ;
; 5.726 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.978      ;
; 5.732 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.980      ;
; 5.735 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.976      ;
; 5.737 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.974      ;
; 5.741 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.970      ;
; 5.759 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 2.950      ;
; 5.764 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.947      ;
; 5.766 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.945      ;
; 5.770 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.941      ;
; 5.777 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.927      ;
; 5.779 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 2.931      ;
; 5.789 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.918      ;
; 5.791 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.920      ;
; 5.799 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 2.910      ;
; 5.812 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.900      ;
; 5.819 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.893      ;
; 5.819 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.893      ;
; 5.821 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.884      ;
; 5.824 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.088     ; 2.889      ;
; 5.831 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.887      ;
; 5.832 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.098     ; 2.871      ;
; 5.835 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.876      ;
; 5.838 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.088     ; 2.875      ;
; 5.848 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.864      ;
; 5.854 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 2.855      ;
; 5.855 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 2.854      ;
; 5.858 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.853      ;
; 5.874 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.844      ;
; 5.875 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.843      ;
; 5.882 ; chameleon_cdtv_remote:myIr|key_ff   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.822      ;
; 5.886 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.825      ;
; 5.887 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.815      ;
; 5.890 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.812      ;
; 5.894 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.808      ;
; 5.900 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.811      ;
; 5.902 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.802      ;
; 5.923 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.782      ;
; 5.926 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 2.794      ;
; 5.936 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.776      ;
; 5.955 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 2.766      ;
; 5.985 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 2.735      ;
; 5.989 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.717      ;
; 5.996 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.086     ; 2.719      ;
; 6.000 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.718      ;
; 6.007 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.711      ;
; 6.009 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.703      ;
; 6.011 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.696      ;
; 6.012 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.088     ; 2.701      ;
; 6.028 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 2.681      ;
; 6.029 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.086     ; 2.686      ;
; 6.030 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 2.679      ;
; 6.038 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.673      ;
; 6.047 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 2.663      ;
; 6.048 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.657      ;
; 6.051 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.661      ;
; 6.060 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.087     ; 2.654      ;
; 6.070 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.087     ; 2.644      ;
; 6.078 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 2.642      ;
; 6.079 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 2.631      ;
; 6.091 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.087     ; 2.623      ;
; 6.105 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[17] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 2.604      ;
; 6.106 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 2.614      ;
; 6.121 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.087     ; 2.593      ;
; 6.126 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.592      ;
; 6.132 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.586      ;
; 6.135 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.087     ; 2.579      ;
; 6.140 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.571      ;
; 6.142 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.570      ;
; 6.146 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[13] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.566      ;
; 6.157 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[42] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 2.563      ;
; 6.159 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[2]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.549      ;
; 6.161 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 2.559      ;
; 6.164 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 2.556      ;
+-------+-------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                  ;
+-------+------------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                            ; To Node                                            ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.665 ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[8]  ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.127     ; 2.962      ;
; 5.694 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 3.071      ;
; 5.694 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 3.071      ;
; 5.694 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 3.071      ;
; 5.701 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|ba_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 3.002      ;
; 5.704 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.049     ; 3.048      ;
; 5.766 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 2.915      ;
; 5.774 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.991      ;
; 5.774 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.991      ;
; 5.774 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.991      ;
; 5.774 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.900      ;
; 5.778 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.896      ;
; 5.784 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.049     ; 2.968      ;
; 5.786 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.888      ;
; 5.787 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]  ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 2.921      ;
; 5.787 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.893      ;
; 5.791 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.889      ;
; 5.804 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.906      ;
; 5.806 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.867      ;
; 5.818 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.947      ;
; 5.818 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.947      ;
; 5.818 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.947      ;
; 5.819 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.860      ;
; 5.825 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.849      ;
; 5.828 ; chameleon_cdtv_remote:myIr|timer[10]                 ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.049     ; 2.924      ;
; 5.832 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 2.849      ;
; 5.838 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.842      ;
; 5.862 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.848      ;
; 5.863 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.050     ; 2.841      ;
; 5.867 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.050     ; 2.837      ;
; 5.870 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.804      ;
; 5.872 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.806      ;
; 5.874 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.805      ;
; 5.876 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.802      ;
; 5.878 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.801      ;
; 5.882 ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[15] ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 2.754      ;
; 5.895 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 2.808      ;
; 5.897 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.813      ;
; 5.899 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|ba_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 2.804      ;
; 5.904 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.773      ;
; 5.906 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.772      ;
; 5.914 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.050     ; 2.790      ;
; 5.921 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.045     ; 2.788      ;
; 5.922 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.751      ;
; 5.923 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.755      ;
; 5.925 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.755      ;
; 5.925 ; sdram_statemachine:sdram_adaptor|delay_reg[4]        ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.754      ;
; 5.926 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.839      ;
; 5.928 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.837      ;
; 5.928 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.749      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[0]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[1]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[2]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[3]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[4]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[5]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[6]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[7]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[8]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[9]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[10]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[11]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[12]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.931 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|bitlength[13]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.834      ;
; 5.936 ; sdram_statemachine:sdram_adaptor|delay_reg[5]        ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.738      ;
; 5.949 ; sdram_statemachine:sdram_adaptor|delay_reg[5]        ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.731      ;
; 5.956 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|addr_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.718      ;
; 5.957 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|data_out_reg[28]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 2.699      ;
; 5.957 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|addr_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 2.725      ;
; 5.971 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.708      ;
; 5.976 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]  ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.047     ; 2.731      ;
; 5.982 ; chameleon_cdtv_remote:myIr|timer[1]                  ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.035     ; 2.784      ;
; 5.982 ; chameleon_cdtv_remote:myIr|timer[1]                  ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.035     ; 2.784      ;
; 5.982 ; chameleon_cdtv_remote:myIr|timer[1]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.035     ; 2.784      ;
; 5.982 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|udqm_reg          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.718      ;
; 5.984 ; sdram_statemachine:sdram_adaptor|delay_reg[1]        ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.696      ;
; 5.985 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.694      ;
; 5.985 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|addr_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.694      ;
; 5.986 ; chameleon_cdtv_remote:myIr|timer[7]                  ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.779      ;
; 5.986 ; chameleon_cdtv_remote:myIr|timer[7]                  ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.779      ;
; 5.986 ; chameleon_cdtv_remote:myIr|timer[7]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.779      ;
; 5.989 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.690      ;
; 5.989 ; sdram_statemachine:sdram_adaptor|delay_reg[0]        ; sdram_statemachine:sdram_adaptor|addr_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.690      ;
; 5.990 ; chameleon_cdtv_remote:myIr|timer[4]                  ; chameleon_cdtv_remote:myIr|state.STATE_LOW         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.775      ;
; 5.990 ; chameleon_cdtv_remote:myIr|timer[4]                  ; chameleon_cdtv_remote:myIr|state.STATE_START       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.775      ;
; 5.990 ; chameleon_cdtv_remote:myIr|timer[4]                  ; chameleon_cdtv_remote:myIr|state.STATE_HIGH        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.775      ;
; 5.992 ; chameleon_cdtv_remote:myIr|timer[1]                  ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.048     ; 2.761      ;
; 5.993 ; sdram_statemachine:sdram_adaptor|delay_reg[3]        ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.045     ; 2.716      ;
; 5.994 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|current_code[3]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.770      ;
; 5.995 ; sdram_statemachine:sdram_adaptor|delay_reg[2]        ; sdram_statemachine:sdram_adaptor|addr_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.680      ;
; 5.996 ; chameleon_cdtv_remote:myIr|timer[7]                  ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.049     ; 2.756      ;
; 5.997 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.045     ; 2.712      ;
; 5.997 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]  ; sdram_statemachine:sdram_adaptor|addr_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.680      ;
; 5.997 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 2.706      ;
; 6.000 ; chameleon_cdtv_remote:myIr|timer[4]                  ; chameleon_cdtv_remote:myIr|current_code[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.049     ; 2.752      ;
; 6.003 ; chameleon_cdtv_remote:myIr|timer[15]                 ; chameleon_cdtv_remote:myIr|current_code[5]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.037     ; 2.761      ;
; 6.006 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.759      ;
; 6.006 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]  ; sdram_statemachine:sdram_adaptor|addr_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.671      ;
; 6.008 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.757      ;
; 6.011 ; chameleon_cdtv_remote:myIr|timer[16]                 ; chameleon_cdtv_remote:myIr|bitlength[0]            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 2.754      ;
+-------+------------------------------------------------------+----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.091 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.420      ;
; 0.092 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.422      ;
; 0.093 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.422      ;
; 0.105 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.435      ;
; 0.134 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.463      ;
; 0.139 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.468      ;
; 0.142 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.471      ;
; 0.143 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.467      ;
; 0.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.470      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.474      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.474      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.475      ;
; 0.148 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.097      ; 0.349      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.477      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.477      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.477      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.478      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.478      ;
; 0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.479      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.481      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.482      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.483      ;
; 0.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.484      ;
; 0.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.483      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.486      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.487      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.487      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.485      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.488      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.486      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.489      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.491      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.491      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.490      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.490      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.494      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.494      ;
; 0.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.498      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.499      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.497      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.498      ;
; 0.179 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.503      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.504      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_clock_reg                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_clock_reg                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_bitcount_reg[1]                                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_bitcount_reg[1]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pl_reg[3]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pl_reg[3]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[3]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[3]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[2]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[2]                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[2]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[2]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p3pf_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p3pf_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pf_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pf_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass0_reg                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|highpass0_reg                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[6]                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[5]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[5]                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[5]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[5]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; sdram_statemachine:sdram_adaptor|sdram_request_reg                                                                                                                                                              ; sdram_statemachine:sdram_adaptor|sdram_request_reg                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[0]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[0]                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[8]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[8]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreRead                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreRead                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|nmi_pending_reg                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|nmi_pending_reg                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                        ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[9]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[9]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[10]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[10]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[14]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[14]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|insn.dec_insn_fetch                                                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_decode                                                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_decode                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load2                                                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load2                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.510      ;
; 0.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[1]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[1]                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[0]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[0]                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|skctl_reg[1]                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|skctl_reg[1]                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                          ;
+-------+-------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                             ; To Node                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.186 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                             ; chameleon_io:chameleon_io|c64_data_reg[4]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                    ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_ba_reg                                                                  ; chameleon_io:chameleon_io|c64_ba_reg                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                   ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_kb_ack                                                                  ; chameleon_io:chameleon_io|c64_kb_ack                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_cs_loc                                                                  ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                           ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                       ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[9]                                                                   ; chameleon_cdtv_remote:myIr|timer[9]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[12]                                                                  ; chameleon_cdtv_remote:myIr|timer[12]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[14]                                                                  ; chameleon_cdtv_remote:myIr|timer[14]                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                    ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[5]                                                            ; chameleon_cdtv_remote:myIr|current_code[5]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[3]                                                            ; chameleon_cdtv_remote:myIr|current_code[3]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[2]                                                            ; chameleon_cdtv_remote:myIr|current_code[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[0]                                                            ; chameleon_cdtv_remote:myIr|current_code[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|reply_reg                                                            ; sdram_statemachine:sdram_adaptor|reply_reg                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                    ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                          ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                          ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                   ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                         ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                         ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|req_reg                                                                             ; chameleon_usb:usb|req_reg                                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_RESET                                                                   ; chameleon_usb:usb|state.STATE_RESET                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                ; chameleon_usb:usb|state.STATE_READ_ACK                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[4]                                                            ; chameleon_cdtv_remote:myIr|current_code[4]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_ADDR2                                                                   ; chameleon_usb:usb|state.STATE_ADDR2                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_ADDR1                                                                   ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_ADDR0                                                                   ; chameleon_usb:usb|state.STATE_ADDR0                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_LEN1                                                                    ; chameleon_usb:usb|state.STATE_LEN1                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|state.STATE_LEN0                                                                    ; chameleon_usb:usb|state.STATE_LEN0                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.188 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                         ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|timer[0]                                                                   ; chameleon_cdtv_remote:myIr|timer[0]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|timer[1]                                                                   ; chameleon_cdtv_remote:myIr|timer[1]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|timer[2]                                                                   ; chameleon_cdtv_remote:myIr|timer[2]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|timer[3]                                                                   ; chameleon_cdtv_remote:myIr|timer[3]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|timer[6]                                                                   ; chameleon_cdtv_remote:myIr|timer[6]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|current_code[1]                                                            ; chameleon_cdtv_remote:myIr|current_code[1]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|current_code[7]                                                            ; chameleon_cdtv_remote:myIr|current_code[7]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|current_code[11]                                                           ; chameleon_cdtv_remote:myIr|current_code[11]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.193 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.193 ; chameleon_io:chameleon_io|mux_state.MUX_CLKPORT                                                       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.193 ; chameleon_io:chameleon_io|mux_state.MUX_MMC2L                                                         ; chameleon_io:chameleon_io|mux_state.MUX_A0                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.193 ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                         ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.194 ; chameleon_io:chameleon_io|mux_clk_reg                                                                 ; chameleon_io:chameleon_io|mux_clk_reg                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|mux_toggle                                                                  ; chameleon_io:chameleon_io|mux_toggle                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[84]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_usb:usb|state.STATE_ADDR1                                                                   ; chameleon_usb:usb|state.STATE_ADDR0                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.195 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.315      ;
; 0.195 ; chameleon_usb:usb|state.STATE_ADDR2                                                                   ; chameleon_usb:usb|state.STATE_ADDR1                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.315      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                               ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.197 ; chameleon_io:chameleon_io|mux_state.MUX_ULTIMAX                                                       ; chameleon_io:chameleon_io|mux_state.MUX_MMC0H                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.198 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                               ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                               ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                        ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|mux_state.MUX_IEC1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_MMC1L                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                          ; chameleon_io:chameleon_io|mux_state.MUX_MMC3H                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.200 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.READ_ROW            ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.STORE_ROW              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.320      ;
; 0.201 ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                        ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
; 0.201 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.READ_ROW            ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|we                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
; 0.201 ; chameleon_io:chameleon_io|c64_kb_ack                                                                  ; chameleon_io:chameleon_io|c64_cs_loc                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
; 0.201 ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                               ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
; 0.201 ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                               ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
; 0.202 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                               ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.322      ;
; 0.202 ; chameleon_usb:usb|state.STATE_LEN2                                                                    ; chameleon_usb:usb|state.STATE_LEN1                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.322      ;
; 0.203 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.323      ;
; 0.203 ; chameleon_cdtv_remote:myIr|shiftreg[17]                                                               ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.323      ;
; 0.204 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                               ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.324      ;
; 0.204 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[99] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.324      ;
; 0.205 ; chameleon_io:chameleon_io|mux_state.MUX_IEC4                                                          ; chameleon_io:chameleon_io|mux_state.MUX_MMC2H                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.325      ;
+-------+-------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+-------+-----------+--------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                      ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+--------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 6.479 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.192     ; 2.081      ;
; 6.479 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.192     ; 2.081      ;
; 6.487 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.188     ; 2.077      ;
; 6.491 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 2.125      ;
; 6.491 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 2.125      ;
; 6.493 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 2.075      ;
; 6.493 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 2.075      ;
; 6.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 2.126      ;
; 6.498 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.127     ; 2.129      ;
; 6.499 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.134     ; 2.121      ;
; 6.499 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.129     ; 2.126      ;
; 6.499 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.131     ; 2.124      ;
; 6.505 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 2.119      ;
; 6.505 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 2.119      ;
; 6.505 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 2.126      ;
; 6.505 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.125     ; 2.124      ;
; 6.506 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.127     ; 2.121      ;
; 6.509 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.122     ; 2.123      ;
; 6.511 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 2.142      ;
; 6.511 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 2.142      ;
; 6.512 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 2.116      ;
; 6.512 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 2.116      ;
; 6.515 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 2.080      ;
; 6.515 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 2.081      ;
; 6.515 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 2.080      ;
; 6.515 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 2.080      ;
; 6.515 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 2.080      ;
; 6.515 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.161     ; 2.076      ;
; 6.515 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 2.081      ;
; 6.516 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.160     ; 2.076      ;
; 6.516 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.160     ; 2.076      ;
; 6.516 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 2.077      ;
; 6.516 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 2.077      ;
; 6.519 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.119     ; 2.116      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 2.125      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 2.124      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 2.124      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.107     ; 2.120      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 2.124      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 2.124      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 2.125      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 2.124      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 2.123      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.105     ; 2.122      ;
; 6.527 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.105     ; 2.122      ;
; 6.528 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.105     ; 2.121      ;
; 6.528 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 2.120      ;
; 6.528 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 2.120      ;
; 6.528 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.105     ; 2.121      ;
; 6.528 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 2.122      ;
; 6.528 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 2.122      ;
; 6.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 1.942      ;
; 6.763 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 1.942      ;
; 6.764 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.942      ;
; 6.764 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.942      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 1.938      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 1.938      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 1.938      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 1.938      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 1.938      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 1.938      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 1.938      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 1.938      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.769 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 1.937      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 1.934      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 1.935      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 1.935      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 1.935      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 1.935      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 1.935      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 1.935      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 1.935      ;
; 6.770 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 1.935      ;
+-------+-----------+--------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                       ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                                                                                                    ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 13.319 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 4.258      ;
; 13.319 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 4.258      ;
; 13.319 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 4.258      ;
; 13.433 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 4.143      ;
; 13.433 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 4.143      ;
; 13.433 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 4.143      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 4.066      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 4.058      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 4.058      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.063      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|sio_out_reg                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 4.058      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 4.058      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[17]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 4.058      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[17]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 4.058      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[1]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[1]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[18]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 4.058      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.509 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.062      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[7]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 4.065      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.061      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.061      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[14]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.061      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[14]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.061      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.061      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.061      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[13]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.061      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[13]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.061      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.062      ;
; 13.510 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[15]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[5]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 4.065      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 4.065      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[4]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[6]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[5]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 4.064      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[4]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 4.064      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[3]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 4.064      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[2]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 4.064      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|rx_data[1]                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 4.064      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[11]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.061      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[10]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[9]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[7]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.050     ; 4.053      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.060      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.059      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 4.059      ;
; 13.512 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.050     ; 4.053      ;
; 13.513 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.060      ;
; 13.513 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 4.059      ;
; 13.513 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 4.060      ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.695 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 0.985      ;
; 0.695 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 0.985      ;
; 0.695 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 0.985      ;
; 0.695 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 0.985      ;
; 0.695 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 0.985      ;
; 0.695 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 0.985      ;
; 0.695 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.200      ; 0.985      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.841 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.186      ; 1.117      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.185      ; 1.118      ;
; 0.969 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.270      ;
; 0.969 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.270      ;
; 0.969 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.270      ;
; 0.969 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.270      ;
; 0.969 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.270      ;
; 0.969 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.211      ; 1.270      ;
; 1.626 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|sdram_request_reg                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.057      ; 1.767      ;
; 1.626 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|reply_sreg                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.057      ; 1.767      ;
; 1.626 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[20]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.057      ; 1.767      ;
; 1.626 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[21]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.057      ; 1.767      ;
; 1.627 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[2]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.049      ; 1.760      ;
; 1.634 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[11]                                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.763      ;
; 1.634 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[3]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.763      ;
; 1.634 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[2]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.763      ;
; 1.634 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[1]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.763      ;
; 1.634 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[0]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.763      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[2]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[3]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[4]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[5]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[6]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[7]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[8]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[9]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[10]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[11]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_fwd_p1[12]                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 1.768      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_lpf_p2[1]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.044      ; 1.767      ;
; 1.639 ; reset_n                                                                                                                                                                             ; hq_dac:dac_left|r_data_lpf_p2[2]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.044      ; 1.767      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.568 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.762      ;
; 1.568 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.762      ;
; 1.568 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.762      ;
; 1.568 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.762      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.765      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.767      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.767      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.767      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.767      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.767      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.767      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.767      ;
; 1.573 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.767      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.574 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 1.765      ;
; 1.579 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.772      ;
; 1.579 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 1.772      ;
; 1.580 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.772      ;
; 1.580 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.772      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.086      ; 1.967      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.966      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 1.964      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.963      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 1.963      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 1.962      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 1.964      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.966      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.086      ; 1.967      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.966      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.965      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.965      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 1.964      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 1.965      ;
; 1.803 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 1.964      ;
; 1.804 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.967      ;
; 1.804 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.085      ; 1.967      ;
; 1.816 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 1.962      ;
; 1.817 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.983      ;
; 1.817 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.088      ; 1.983      ;
; 1.821 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 1.965      ;
; 1.822 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 1.961      ;
; 1.822 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 1.961      ;
; 1.826 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 1.961      ;
; 1.826 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 1.961      ;
; 1.827 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.065      ; 1.970      ;
; 1.828 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.062      ; 1.968      ;
; 1.828 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 1.966      ;
; 1.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.029      ; 1.910      ;
; 1.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.030      ; 1.911      ;
; 1.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.026      ; 1.907      ;
; 1.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.026      ; 1.907      ;
; 1.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.908      ;
; 1.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.027      ; 1.908      ;
; 1.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.029      ; 1.910      ;
; 1.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.025      ; 1.906      ;
; 1.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.030      ; 1.911      ;
; 1.832 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.029      ; 1.911      ;
; 1.832 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.029      ; 1.911      ;
; 1.833 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.052      ; 1.963      ;
; 1.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.058      ; 1.971      ;
; 1.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.056      ; 1.969      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                           ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------+
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                               ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                               ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                               ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                               ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                     ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                     ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_STOP                     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[0]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[1]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[2]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[3]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitcount[4]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[0]                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[11]                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[1]                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[2]                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[3]                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[7]                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[0]                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[1]                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[2]                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[3]                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[4]                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[0]                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[1]                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[2]                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[3]                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_ff                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[0]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[10]                                          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[11]                                          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[12]                                          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[13]                                          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[14]                                          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[15]                                          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[16]                                          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[1]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[22]                                          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[23]                                          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[2]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[3]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[0]                                              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[13]                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[15]                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[16]                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[1]                                              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[2]                                              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[3]                                              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[6]                                              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|button_reset_n                                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[1] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[2] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[8] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[0]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[1]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[2]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[3]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[4]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[5]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[6]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|docking_station        ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[0]             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[1]             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[2]             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[3]             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localEnd               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreEnd            ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|no_clock               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[0]          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[7]          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phiSync                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|ir                                                     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[0]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[1]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[2]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[3]                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A0                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A1                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A2                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A3                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_BUS                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0VIC                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC4                                     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_LED                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC0L                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC2H                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC2L                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_RESET                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                        ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type            ; Clock                                           ; Clock Edge ; Target                                                                                                                                                                                                                                    ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_address_reg0   ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_address_reg0  ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a10~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a14~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a17~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a20~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a21~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a2~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a3~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a5~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a7~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~portb_address_reg0   ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~portb_address_reg0  ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a11~porta_address_reg0                                                                                                                                     ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a1~porta_address_reg0                                                                                                                                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a30~porta_address_reg0                                                                                                                                     ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a6~porta_address_reg0                                                                                                                                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a8~porta_address_reg0                                                                                                                                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                               ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                           ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                 ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                           ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28                     ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'clk8'                                                                                            ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.123  ; 62.123       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.131  ; 62.131       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.869  ; 62.869       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.877  ; 62.877       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 1.199 ; 1.513 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 1.298 ; 1.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 1.742 ; 1.957 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 1.682 ; 1.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 1.667 ; 1.889 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 1.331 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 1.742 ; 1.957 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 1.207 ; 1.512 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 1.793 ; 2.036 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.669 ; 2.227 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.383 ; 1.870 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 1.428 ; 1.939 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.403 ; 1.890 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.396 ; 1.888 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.484 ; 2.020 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.465 ; 2.002 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.397 ; 1.912 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.459 ; 2.018 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.423 ; 1.917 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.387 ; 1.906 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 1.438 ; 1.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.669 ; 2.227 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.905 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.361 ; 1.875 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.433 ; 1.921 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.342 ; 1.826 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 0.860 ; 1.227 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 2.354 ; 2.585 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 1.844 ; 2.270 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 2.747 ; 3.378 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -0.841 ; -1.151 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -0.941 ; -1.260 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -0.960 ; -1.245 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.085 ; -1.339 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -1.228 ; -1.485 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -0.960 ; -1.245 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.087 ; -1.322 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -0.849 ; -1.150 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -1.417 ; -1.663 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.365 ; -0.741 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.368 ; -0.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.368 ; -0.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.356 ; -0.738 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.340 ; -0.722 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.340 ; -0.722 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.341 ; -0.723 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.346 ; -0.728 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.370 ; -0.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.370 ; -0.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -0.515 ; -0.876 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -0.556 ; -0.909 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -0.621 ; -0.969 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -2.327 ; -2.949 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 3.337 ; 3.166 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 3.337 ; 3.166 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 2.108 ; 2.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 2.090 ; 2.009 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 2.131 ; 2.050 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 2.657 ; 2.841 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 2.888 ; 2.675 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 2.661 ; 2.541 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 2.342 ; 2.247 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 2.366 ; 2.263 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.888 ; 2.675 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.606 ; 1.605 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.784 ; 1.856 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.607 ; 1.606 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.652 ; 1.673 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.522 ; 2.580 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.769 ; 1.841 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.645 ; 1.666 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.645 ; 1.666 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.644 ; 1.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.642 ; 1.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.609 ; 1.608 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.642 ; 1.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.636 ; 1.657 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.511 ; 2.569 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.633 ; 1.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.650 ; 1.649 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.627 ; 1.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.626 ; 1.625 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.626 ; 1.625 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.625 ; 1.624 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.640 ; 1.639 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.598 ; 1.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.598 ; 1.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.618 ; 1.617 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.628 ; 1.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.627 ; 1.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.628 ; 1.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.700 ; 3.958 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 1.977 ; 2.052 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.331 ; 2.489 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.682 ; 2.841 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.700 ; 3.958 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.817 ; 2.944 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 2.372 ; 2.514 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 2.189 ; 2.314 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 2.316 ; 2.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 2.205 ; 2.316 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.372 ; 2.514 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.345 ; 2.482 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.450 ; 2.313 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.888 ; 2.726 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 3.114 ; 3.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 2.056 ; 2.131 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 2.062 ; 2.143 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 2.031 ; 2.111 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 3.114 ; 3.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 2.306 ; 2.408 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 3.594 ; 3.904 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.772 ; 2.996 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.697 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.738 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 1.823 ; 1.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 3.059 ; 2.892 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 1.839 ; 1.757 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 1.823 ; 1.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 1.863 ; 1.785 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 2.369 ; 2.546 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 2.066 ; 1.974 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 2.372 ; 2.255 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 2.066 ; 1.974 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 2.088 ; 1.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.590 ; 2.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.532 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.354 ; 1.353 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.400 ; 1.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.270 ; 2.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.517 ; 1.589 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.392 ; 1.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.357 ; 1.356 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.385 ; 1.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.259 ; 2.317 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.381 ; 1.402 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.397 ; 1.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.372 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.387 ; 1.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.365 ; 1.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 1.714 ; 1.786 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 1.714 ; 1.786 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.054 ; 2.206 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.391 ; 2.544 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.406 ; 3.656 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.521 ; 2.643 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 1.919 ; 2.040 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 1.919 ; 2.040 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 2.042 ; 2.169 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 1.932 ; 2.040 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.095 ; 2.233 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.069 ; 2.202 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.168 ; 2.037 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.589 ; 2.433 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 1.767 ; 1.846 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 1.790 ; 1.863 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 1.796 ; 1.875 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 1.767 ; 1.846 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 2.842 ; 2.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 2.029 ; 2.127 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 3.268 ; 3.566 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.478 ; 2.695 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.468 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.507 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.130 ; 3.127 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.288 ; 3.284 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.271 ; 3.267 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.271 ; 3.267 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.253 ; 3.250 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.432 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.556 ; 3.553 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.285 ; 3.282 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.130 ; 3.127 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.130 ; 3.127 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.146 ; 3.143 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.285 ; 3.282 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.556 ; 3.553 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.528 ; 3.525 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.243 ; 3.240 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.277 ; 3.273 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.277 ; 3.273 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 2.015 ; 2.015 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.164 ; 2.164 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.148 ; 2.148 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.148 ; 2.148 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.134 ; 2.134 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.306 ; 2.306 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.424 ; 2.424 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.164 ; 2.164 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.015 ; 2.015 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.015 ; 2.015 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.030 ; 2.030 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.164 ; 2.164 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.424 ; 2.424 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.397 ; 2.397 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.124 ; 2.124 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.154 ; 2.154 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.154 ; 2.154 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.218     ; 3.218     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.406     ; 3.406     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.385     ; 3.385     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.385     ; 3.385     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.364     ; 3.364     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.562     ; 3.562     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.697     ; 3.697     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.405     ; 3.405     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.218     ; 3.218     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.218     ; 3.218     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.244     ; 3.244     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.405     ; 3.405     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.697     ; 3.697     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.682     ; 3.682     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.354     ; 3.354     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.393     ; 3.393     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.393     ; 3.393     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 2.099     ; 2.165     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.277     ; 2.335     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.257     ; 2.315     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.257     ; 2.315     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.241     ; 2.307     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.430     ; 2.496     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.559     ; 2.625     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.279     ; 2.345     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.099     ; 2.165     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.099     ; 2.165     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.125     ; 2.191     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.279     ; 2.345     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.559     ; 2.625     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.545     ; 2.611     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.231     ; 2.297     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.266     ; 2.324     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.266     ; 2.324     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


---------------------------------------------
; Fast 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                         ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+
; Clock                                            ; Setup ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+
; Worst-case Slack                                 ; 1.080 ; 0.091 ; 3.756    ; 0.695   ; 4.098               ;
;  clk8                                            ; N/A   ; N/A   ; N/A      ; N/A     ; 62.089              ;
;  pll|altpll_component|auto_generated|pll1|clk[0] ; 1.548 ; 0.186 ; 3.756    ; 1.568   ; 4.098               ;
;  pll|altpll_component|auto_generated|pll1|clk[1] ; 1.080 ; 0.091 ; 8.487    ; 0.695   ; 8.506               ;
; Design-wide TNS                                  ; 0.0   ; 0.0   ; 0.0      ; 0.0     ; 0.0                 ;
;  clk8                                            ; N/A   ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.384 ; 2.538 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.578 ; 2.771 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 3.331 ; 3.517 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 3.320 ; 3.517 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 3.275 ; 3.368 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.599 ; 2.705 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 3.331 ; 3.398 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 2.406 ; 2.541 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 3.652 ; 3.929 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.676 ; 3.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.087 ; 3.002 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.227 ; 3.119 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.116 ; 3.024 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.011 ; 2.990 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.226 ; 3.256 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.214 ; 3.193 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.063 ; 3.061 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.267 ; 3.288 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.101 ; 3.029 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.058 ; 3.038 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.114 ; 3.150 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.676 ; 3.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.940 ; 2.961 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.971 ; 2.969 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.193 ; 3.094 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.944 ; 2.893 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 1.672 ; 1.785 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 4.834 ; 5.116 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 3.973 ; 3.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 5.792 ; 5.991 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -0.841 ; -1.151 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -0.941 ; -1.260 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -0.960 ; -1.245 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.085 ; -1.339 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -1.228 ; -1.485 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -0.960 ; -1.245 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.087 ; -1.322 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -0.849 ; -1.150 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -1.417 ; -1.663 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.365 ; -0.583 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.368 ; -0.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.368 ; -0.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.356 ; -0.543 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.347 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.347 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.340 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.340 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.341 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.347 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.347 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.346 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.370 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.370 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -0.515 ; -0.876 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -0.556 ; -0.909 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -0.621 ; -0.969 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -2.327 ; -2.949 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.354 ; 6.457 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.354 ; 6.457 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.338 ; 4.449 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.303 ; 4.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.390 ; 4.465 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 5.977 ; 5.720 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.826 ; 5.985 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.420 ; 5.678 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.880 ; 5.087 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.884 ; 5.067 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.826 ; 5.985 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.702 ; 3.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.502 ; 3.478 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.857 ; 4.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.685 ; 3.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.495 ; 3.471 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.424 ; 3.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.483 ; 3.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.838 ; 4.904 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.479 ; 3.455 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.503 ; 3.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.471 ; 3.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 7.772 ; 7.531 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.379 ; 4.227 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.204 ; 5.077 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 6.012 ; 5.810 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.772 ; 7.531 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.411 ; 6.037 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.329 ; 5.144 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.844 ; 4.747 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 5.136 ; 5.033 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.969 ; 4.806 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 5.329 ; 5.144 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.148 ; 5.037 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.041 ; 5.136 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.891 ; 6.135 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 6.234 ; 6.211 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.584 ; 4.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.616 ; 4.400 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.481 ; 4.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.234 ; 6.211 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 5.097 ; 4.940 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 8.019 ; 7.788 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.116 ; 6.024 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.272 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.119 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 1.823 ; 1.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 3.059 ; 2.892 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 1.839 ; 1.757 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 1.823 ; 1.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 1.863 ; 1.785 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 2.369 ; 2.546 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 2.066 ; 1.974 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 2.372 ; 2.255 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 2.066 ; 1.974 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 2.088 ; 1.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.590 ; 2.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.532 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.354 ; 1.353 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.400 ; 1.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.270 ; 2.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.517 ; 1.589 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.392 ; 1.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.357 ; 1.356 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.385 ; 1.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.259 ; 2.317 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.381 ; 1.402 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.397 ; 1.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.372 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.387 ; 1.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.365 ; 1.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 1.714 ; 1.786 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 1.714 ; 1.786 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.054 ; 2.206 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.391 ; 2.544 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.406 ; 3.656 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.521 ; 2.643 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 1.919 ; 2.040 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 1.919 ; 2.040 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 2.042 ; 2.169 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 1.932 ; 2.040 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.095 ; 2.233 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.069 ; 2.202 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.168 ; 2.037 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.589 ; 2.433 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 1.767 ; 1.846 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 1.790 ; 1.863 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 1.796 ; 1.875 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 1.767 ; 1.846 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 2.842 ; 2.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 2.029 ; 2.127 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 3.268 ; 3.566 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.478 ; 2.695 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.468 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.507 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; Pin         ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; red[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; nHSync      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; nVSync      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_clk      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[0]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[1]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[2]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[3]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[4]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[5]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[6]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[7]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[8]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[9]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[10] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[11] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[12] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ba_0     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ba_1     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_we_n     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ras_n    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_cas_n    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ldqm     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_udqm     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_clk     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[0]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[1]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[2]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[3]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sigmaL      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sigmaR      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[0]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[1]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[2]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[3]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[4]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[5]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[6]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[7]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[8]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[9]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[10] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[11] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[12] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[13] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[14] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[15] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+


+----------------------------------------------------------------+
; Input Transition Times                                         ;
+-------------+--------------+-----------------+-----------------+
; Pin         ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+-------------+--------------+-----------------+-----------------+
; freeze_n    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mmc_cd_n    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mmc_wp      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_cts   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[0]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[1]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[2]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[3]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[4]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[5]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[6]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[7]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[8]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[9]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[10] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[11] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[12] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[13] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[14] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[15] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; clk8        ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_rts   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[1]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_clk   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; phi2_n      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; dotclock_n  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; ioef_n      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; spi_miso    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[0]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[2]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[3]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_tx    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; romlh_n     ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
+-------------+--------------+-----------------+-----------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; red[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; red[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; red[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; red[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; red[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; grn[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; grn[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; blu[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; blu[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; nHSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; nVSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_clk      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.64e-07 V                   ; 2.34 V              ; -0.00283 V          ; 0.121 V                              ; 0.028 V                              ; 1.16e-09 s                  ; 1.21e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.64e-07 V                  ; 2.34 V             ; -0.00283 V         ; 0.121 V                             ; 0.028 V                             ; 1.16e-09 s                 ; 1.21e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.64e-07 V                   ; 2.34 V              ; -0.00283 V          ; 0.121 V                              ; 0.028 V                              ; 1.16e-09 s                  ; 1.21e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.64e-07 V                  ; 2.34 V             ; -0.00283 V         ; 0.121 V                             ; 0.028 V                             ; 1.16e-09 s                 ; 1.21e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_0     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_1     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_we_n     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ras_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_cas_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; sd_ldqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_udqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_clk     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; mux[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; mux[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sigmaL      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sigmaR      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_data[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; sd_data[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[13] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[14] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[15] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; red[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; red[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; red[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; red[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; red[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; grn[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; grn[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; blu[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; blu[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; nHSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; nVSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_clk      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 5.17e-08 V                   ; 2.68 V              ; -0.0186 V           ; 0.221 V                              ; 0.079 V                              ; 6.92e-10 s                  ; 7.39e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 5.17e-08 V                  ; 2.68 V             ; -0.0186 V          ; 0.221 V                             ; 0.079 V                             ; 6.92e-10 s                 ; 7.39e-10 s                 ; No                        ; Yes                       ;
; sd_addr[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_addr[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 5.17e-08 V                   ; 2.68 V              ; -0.0186 V           ; 0.221 V                              ; 0.079 V                              ; 6.92e-10 s                  ; 7.39e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 5.17e-08 V                  ; 2.68 V             ; -0.0186 V          ; 0.221 V                             ; 0.079 V                             ; 6.92e-10 s                 ; 7.39e-10 s                 ; No                        ; Yes                       ;
; sd_addr[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_addr[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_0     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_1     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_we_n     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ras_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_cas_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; sd_ldqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_udqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_clk     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; mux[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; mux[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sigmaL      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sigmaR      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_data[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; sd_data[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[13] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[14] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[15] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                               ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8943     ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 160      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 644      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 4628370  ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8943     ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 160      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 644      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 4628370  ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                                                            ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 109      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 9107     ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                                                             ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 109      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 9107     ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 0     ; 0    ;
; Unconstrained Input Ports       ; 28    ; 28   ;
; Unconstrained Input Port Paths  ; 84    ; 84   ;
; Unconstrained Output Ports      ; 64    ; 64   ;
; Unconstrained Output Port Paths ; 80    ; 80   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Tue Jul 29 23:25:01 2014
Info: Command: quartus_sta atari800core -c atari800core
Info: qsta_default_script.tcl version: #1
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (21077): Core supply voltage is 1.2V
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Info (332104): Reading SDC File: 'atari800core.sdc'
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 156 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[0]} {pll|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 78 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[1]} {pll|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 156 -phase 180.00 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[2]} {pll|altpll_component|auto_generated|pll1|clk[2]}
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow 1200mV 85C Model
Info (332146): Worst-case setup slack is 1.080
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.080         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.548         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.320
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.320         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.454         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 3.756
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     3.756         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.487         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.609
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.609         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     3.484         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.098
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.098         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.506         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.409         0.000 clk8 
Info: Analyzing Slow 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 1.537
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.537         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.938         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.308
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.308         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.402         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 4.139
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.139         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     9.184         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.480
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.480         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     3.129         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.101
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.101         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.508         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.394         0.000 clk8 
Info: Analyzing Fast 1200mV 0C Model
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 5.404
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.404         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     5.665         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.091
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.091         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.186         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 6.479
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     6.479         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    13.319         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 0.695
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.695         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.568         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.189
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.189         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.561         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.089         0.000 clk8 
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 494 megabytes
    Info: Processing ended: Tue Jul 29 23:25:22 2014
    Info: Elapsed time: 00:00:21
    Info: Total CPU time (on all processors): 00:00:25


