TimeQuest Timing Analyzer report for atari800core
Tue Jul 29 23:09:59 2014
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow 1200mV 85C Model Fmax Summary
  7. Timing Closure Recommendations
  8. Slow 1200mV 85C Model Setup Summary
  9. Slow 1200mV 85C Model Hold Summary
 10. Slow 1200mV 85C Model Recovery Summary
 11. Slow 1200mV 85C Model Removal Summary
 12. Slow 1200mV 85C Model Minimum Pulse Width Summary
 13. Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 14. Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 15. Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 16. Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 17. Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 18. Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 19. Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 20. Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 21. Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 22. Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 23. Slow 1200mV 85C Model Minimum Pulse Width: 'clk8'
 24. Setup Times
 25. Hold Times
 26. Clock to Output Times
 27. Minimum Clock to Output Times
 28. Output Enable Times
 29. Minimum Output Enable Times
 30. Output Disable Times
 31. Minimum Output Disable Times
 32. Slow 1200mV 85C Model Metastability Report
 33. Slow 1200mV 0C Model Fmax Summary
 34. Slow 1200mV 0C Model Setup Summary
 35. Slow 1200mV 0C Model Hold Summary
 36. Slow 1200mV 0C Model Recovery Summary
 37. Slow 1200mV 0C Model Removal Summary
 38. Slow 1200mV 0C Model Minimum Pulse Width Summary
 39. Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 40. Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 41. Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 42. Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 43. Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 44. Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 45. Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 46. Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 47. Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 48. Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 49. Slow 1200mV 0C Model Minimum Pulse Width: 'clk8'
 50. Setup Times
 51. Hold Times
 52. Clock to Output Times
 53. Minimum Clock to Output Times
 54. Output Enable Times
 55. Minimum Output Enable Times
 56. Output Disable Times
 57. Minimum Output Disable Times
 58. Slow 1200mV 0C Model Metastability Report
 59. Fast 1200mV 0C Model Setup Summary
 60. Fast 1200mV 0C Model Hold Summary
 61. Fast 1200mV 0C Model Recovery Summary
 62. Fast 1200mV 0C Model Removal Summary
 63. Fast 1200mV 0C Model Minimum Pulse Width Summary
 64. Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 65. Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 66. Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 67. Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 68. Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 69. Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 70. Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 71. Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 72. Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 73. Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 74. Fast 1200mV 0C Model Minimum Pulse Width: 'clk8'
 75. Setup Times
 76. Hold Times
 77. Clock to Output Times
 78. Minimum Clock to Output Times
 79. Output Enable Times
 80. Minimum Output Enable Times
 81. Output Disable Times
 82. Minimum Output Disable Times
 83. Fast 1200mV 0C Model Metastability Report
 84. Multicorner Timing Analysis Summary
 85. Setup Times
 86. Hold Times
 87. Clock to Output Times
 88. Minimum Clock to Output Times
 89. Board Trace Model Assignments
 90. Input Transition Times
 91. Slow Corner Signal Integrity Metrics
 92. Fast Corner Signal Integrity Metrics
 93. Setup Transfers
 94. Hold Transfers
 95. Recovery Transfers
 96. Removal Transfers
 97. Report TCCS
 98. Report RSKM
 99. Unconstrained Paths
100. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; atari800core                                                      ;
; Device Family      ; Cyclone III                                                       ;
; Device Name        ; EP3C25E144C8                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Enabled                                                           ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.21        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;  20.7%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------+
; SDC File List                                        ;
+------------------+--------+--------------------------+
; SDC File Path    ; Status ; Read at                  ;
+------------------+--------+--------------------------+
; atari800core.sdc ; OK     ; Tue Jul 29 23:09:32 2014 ;
+------------------+--------+--------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                             ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+
; Clock Name                                      ; Type      ; Period  ; Frequency  ; Rise  ; Fall   ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source                                            ; Targets                                             ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+
; clk8                                            ; Base      ; 125.000 ; 8.0 MHz    ; 0.000 ; 62.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;                                                   ; { clk8 }                                            ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 8.814   ; 113.46 MHz ; 0.000 ; 4.407  ; 50.00      ; 11        ; 156         ;       ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[0] } ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 17.628  ; 56.73 MHz  ; 0.000 ; 8.814  ; 50.00      ; 11        ; 78          ;       ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[1] } ;
; pll|altpll_component|auto_generated|pll1|clk[2] ; Generated ; 8.814   ; 113.46 MHz ; 4.407 ; 8.814  ; 50.00      ; 11        ; 156         ; 180.0 ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[2] } ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Fmax Summary                                                    ;
+------------+-----------------+-------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                      ; Note ;
+------------+-----------------+-------------------------------------------------+------+
; 59.77 MHz  ; 59.77 MHz       ; pll|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 134.23 MHz ; 134.23 MHz      ; pll|altpll_component|auto_generated|pll1|clk[0] ;      ;
+------------+-----------------+-------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


----------------------------------
; Timing Closure Recommendations ;
----------------------------------
HTML report is unavailable in plain text report export.


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup Summary                                     ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.897 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 1.364 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.356 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.454 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery Summary                                  ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 2.413 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 9.935 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal Summary                                   ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.865 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.696 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width Summary                        ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.098  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.505  ; 0.000         ;
; clk8                                            ; 62.409 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                       ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                             ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.897 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 16.641     ;
; 1.036 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 16.499     ;
; 1.093 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 16.431     ;
; 1.138 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.194     ; 7.483      ;
; 1.232 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 16.289     ;
; 1.260 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 16.264     ;
; 1.268 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 16.258     ;
; 1.327 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 16.235     ;
; 1.331 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.209     ; 7.275      ;
; 1.333 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 16.193     ;
; 1.368 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 16.193     ;
; 1.368 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 16.193     ;
; 1.368 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 16.193     ;
; 1.375 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 16.185     ;
; 1.375 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 16.185     ;
; 1.375 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 16.154     ;
; 1.378 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 16.184     ;
; 1.378 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 16.184     ;
; 1.378 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 16.184     ;
; 1.378 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 16.184     ;
; 1.382 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 16.169     ;
; 1.399 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 16.122     ;
; 1.405 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 16.135     ;
; 1.407 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 16.116     ;
; 1.423 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 16.127     ;
; 1.423 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 16.127     ;
; 1.423 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 16.127     ;
; 1.427 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.207     ; 7.181      ;
; 1.430 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 16.119     ;
; 1.430 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 16.119     ;
; 1.433 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 16.118     ;
; 1.433 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 16.118     ;
; 1.433 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 16.118     ;
; 1.433 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 16.118     ;
; 1.436 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 16.090     ;
; 1.458 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.220     ; 7.137      ;
; 1.463 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 16.063     ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 16.081     ;
; 1.472 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 16.051     ;
; 1.491 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|read_en_r                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 16.081     ;
; 1.498 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.222     ; 7.095      ;
; 1.499 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.223     ; 7.093      ;
; 1.500 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 16.046     ;
; 1.509 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 16.016     ;
; 1.514 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 16.012     ;
; 1.520 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.195     ; 7.100      ;
; 1.538 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 15.997     ;
; 1.552 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.224     ; 7.039      ;
; 1.552 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 15.975     ;
; 1.555 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 15.971     ;
; 1.563 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.194     ; 7.058      ;
; 1.566 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 15.987     ;
; 1.575 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 15.948     ;
; 1.579 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 15.944     ;
; 1.601 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 15.925     ;
; 1.602 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 15.935     ;
; 1.602 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 15.921     ;
; 1.604 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 15.939     ;
; 1.611 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 15.915     ;
; 1.615 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.932     ;
; 1.622 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.206     ; 6.987      ;
; 1.635 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.222     ; 6.958      ;
; 1.636 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 15.890     ;
; 1.639 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 15.904     ;
; 1.644 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.218     ; 6.953      ;
; 1.644 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 15.897     ;
; 1.647 ; reset_short_reg                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.912     ;
; 1.648 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.107     ; 15.874     ;
; 1.650 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.909     ;
; 1.654 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.221     ; 6.940      ;
; 1.658 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.223     ; 6.934      ;
; 1.662 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.220     ; 6.933      ;
; 1.665 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.874     ;
; 1.671 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.221     ; 6.923      ;
; 1.676 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.206     ; 6.933      ;
; 1.688 ; reset_short_reg                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 15.870     ;
; 1.688 ; reset_short_reg                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 15.870     ;
; 1.688 ; reset_short_reg                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 15.870     ;
; 1.691 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 15.867     ;
; 1.691 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 15.867     ;
; 1.691 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 15.867     ;
; 1.691 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 15.833     ;
; 1.694 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 15.829     ;
; 1.695 ; reset_short_reg                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 15.862     ;
; 1.695 ; reset_short_reg                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 15.862     ;
; 1.698 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.221     ; 6.896      ;
; 1.698 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 15.859     ;
; 1.698 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 15.859     ;
; 1.698 ; reset_short_reg                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.861     ;
; 1.698 ; reset_short_reg                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.861     ;
; 1.698 ; reset_short_reg                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.861     ;
; 1.698 ; reset_short_reg                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.861     ;
; 1.701 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.858     ;
; 1.701 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.858     ;
; 1.701 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.858     ;
; 1.701 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.858     ;
; 1.718 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.109     ; 15.802     ;
; 1.723 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.197     ; 6.895      ;
; 1.725 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.224     ; 6.866      ;
; 1.728 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.207     ; 6.880      ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                      ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                ; To Node                                             ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.364 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 7.372      ;
; 1.379 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 7.357      ;
; 1.401 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 7.335      ;
; 1.408 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 7.197      ;
; 1.411 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 7.190      ;
; 1.416 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 7.320      ;
; 1.429 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 7.308      ;
; 1.431 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.108     ; 7.146      ;
; 1.434 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 7.170      ;
; 1.444 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 7.293      ;
; 1.450 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.108     ; 7.127      ;
; 1.481 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.063     ; 7.141      ;
; 1.483 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.114     ; 7.088      ;
; 1.502 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.114     ; 7.069      ;
; 1.504 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 7.108      ;
; 1.524 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 7.088      ;
; 1.548 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.140     ; 6.997      ;
; 1.601 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.108     ; 6.976      ;
; 1.636 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 6.901      ;
; 1.638 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.969      ;
; 1.641 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.962      ;
; 1.645 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 6.956      ;
; 1.652 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 7.084      ;
; 1.653 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.114     ; 6.918      ;
; 1.664 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.942      ;
; 1.672 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 6.930      ;
; 1.675 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.937      ;
; 1.677 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.928      ;
; 1.687 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.918      ;
; 1.689 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 7.047      ;
; 1.695 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|ldqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.062     ; 6.928      ;
; 1.698 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.063     ; 6.924      ;
; 1.700 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.904      ;
; 1.717 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 7.020      ;
; 1.717 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.886      ;
; 1.734 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 6.803      ;
; 1.738 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.868      ;
; 1.741 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 6.861      ;
; 1.749 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.858      ;
; 1.753 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.851      ;
; 1.764 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.841      ;
; 1.778 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 6.769      ;
; 1.809 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.140     ; 6.736      ;
; 1.812 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.791      ;
; 1.818 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.108     ; 6.759      ;
; 1.828 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.778      ;
; 1.844 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.114     ; 6.727      ;
; 1.863 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.064     ; 6.758      ;
; 1.863 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.114     ; 6.708      ;
; 1.865 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.747      ;
; 1.866 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.146     ; 6.673      ;
; 1.867 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.140     ; 6.678      ;
; 1.870 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.114     ; 6.701      ;
; 1.878 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 6.668      ;
; 1.902 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.701      ;
; 1.902 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.702      ;
; 1.912 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|ldqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.062     ; 6.711      ;
; 1.917 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.690      ;
; 1.922 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 6.615      ;
; 1.929 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 6.673      ;
; 1.930 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.676      ;
; 1.931 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.109     ; 6.645      ;
; 1.942 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 6.659      ;
; 1.946 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 6.601      ;
; 1.947 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 6.729      ;
; 1.949 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.063     ; 6.673      ;
; 1.950 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.109     ; 6.626      ;
; 1.954 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|data_out_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 6.512      ;
; 1.954 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|data_out_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.207     ; 6.512      ;
; 1.962 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 6.714      ;
; 1.964 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.146     ; 6.575      ;
; 1.965 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 6.711      ;
; 1.966 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 6.572      ;
; 1.969 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.634      ;
; 1.980 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 6.696      ;
; 1.986 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.619      ;
; 1.994 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[2]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.111     ; 6.580      ;
; 1.994 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.146     ; 6.545      ;
; 2.001 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.606      ;
; 2.001 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.603      ;
; 2.002 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.115     ; 6.568      ;
; 2.002 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.601      ;
; 2.013 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[2]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.111     ; 6.561      ;
; 2.014 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.114     ; 6.557      ;
; 2.017 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.589      ;
; 2.019 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.125     ; 6.541      ;
; 2.019 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.585      ;
; 2.021 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.115     ; 6.549      ;
; 2.026 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.577      ;
; 2.030 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.575      ;
; 2.038 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.125     ; 6.522      ;
; 2.039 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 6.508      ;
; 2.042 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 6.563      ;
; 2.053 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 6.484      ;
; 2.058 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.549      ;
; 2.064 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 6.474      ;
; 2.065 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.541      ;
; 2.069 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|data_out_reg[26]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 6.396      ;
; 2.069 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|data_out_reg[22]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 6.396      ;
; 2.075 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|data_out_reg[24]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.209     ; 6.389      ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                              ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                  ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.356 ; chameleon_io:chameleon_io|ps2_keyboard_dat_in                                                                                                              ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_dat_reg                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.794      ;
; 0.403 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][6]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.478      ; 1.135      ;
; 0.407 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.146      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.150      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.146      ;
; 0.413 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.152      ;
; 0.413 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.152      ;
; 0.415 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.154      ;
; 0.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][4]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.155      ;
; 0.418 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][0]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.478      ; 1.150      ;
; 0.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][3]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.159      ;
; 0.422 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][4]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.155      ;
; 0.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.162      ;
; 0.424 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.162      ;
; 0.427 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.166      ;
; 0.433 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.166      ;
; 0.438 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.478      ; 1.170      ;
; 0.439 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][6]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.478      ; 1.171      ;
; 0.441 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.174      ;
; 0.442 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.177      ;
; 0.445 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.478      ; 1.177      ;
; 0.448 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.187      ;
; 0.449 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][4]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.478      ; 1.181      ;
; 0.450 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][1]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.477      ; 1.181      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[0]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[0]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[1]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[1]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[3]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[3]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[2]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[2]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serial_ip_overrun_reg                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serial_ip_overrun_reg                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CA2_output_reg                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CA2_output_reg                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[1]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[1]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[1]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[1]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[1]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[0]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[0]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[0]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[0]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[0]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[0]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[0]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[0]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                          ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load2                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_load2                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[13]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[13]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_loadb2                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[1]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                                                          ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[3]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[3]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[7]                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[7]                                                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[6]                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[6]                                                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[1]                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[1]                                                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[10]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[10]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[5]                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[5]                                                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_mult5                                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_mult5                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[5]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[5]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[2]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[2]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_64_div|count_reg[0]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_64_div|count_reg[1]                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_64_div|count_reg[1]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[3]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf2_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[3]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_clock_reg                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_clock_reg                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[0]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                        ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                              ; To Node                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.454 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_usb:usb|req_reg                                                                              ; chameleon_usb:usb|req_reg                                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_RESET                                                                    ; chameleon_usb:usb|state.STATE_RESET                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_LEN1                                                                     ; chameleon_usb:usb|state.STATE_LEN1                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_LEN0                                                                     ; chameleon_usb:usb|state.STATE_LEN0                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_ADDR1                                                                    ; chameleon_usb:usb|state.STATE_ADDR1                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_ADDR0                                                                    ; chameleon_usb:usb|state.STATE_ADDR0                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                     ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.456 ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.078      ; 0.746      ;
; 0.466 ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.466 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.467 ; chameleon_io:chameleon_io|mux_toggle                                                                   ; chameleon_io:chameleon_io|mux_toggle                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.758      ;
; 0.467 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.758      ;
; 0.491 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10]                                          ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10]                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 0.784      ;
; 0.502 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.793      ;
; 0.502 ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.793      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.795      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[87]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_cdtv_remote:myIr|shiftreg[13]                                                                ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.504 ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.796      ;
; 0.504 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.505 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.796      ;
; 0.506 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|rom_lh_n_reg   ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.797      ;
; 0.510 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.801      ;
; 0.510 ; chameleon_io:chameleon_io|mux_state.MUX_IEC4                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC2H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.802      ;
; 0.510 ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.801      ;
; 0.510 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localEnd                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.802      ;
; 0.511 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.512 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[0]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_io:chameleon_io|mux_state.MUX_D0WR                                                           ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_MMC7H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[2]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[6]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[6]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_cdtv_remote:myIr|shiftreg[5]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.513 ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC3H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.805      ;
; 0.513 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[2]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[1]                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.804      ;
; 0.513 ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[4]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.804      ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 2.413 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.171     ; 6.101      ;
; 2.413 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.171     ; 6.101      ;
; 2.418 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.230     ; 6.037      ;
; 2.419 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.363     ; 5.891      ;
; 2.419 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.363     ; 5.891      ;
; 2.424 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.307     ; 5.942      ;
; 2.426 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.304     ; 5.943      ;
; 2.426 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.305     ; 5.942      ;
; 2.426 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.307     ; 5.940      ;
; 2.426 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.307     ; 5.940      ;
; 2.426 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.305     ; 5.942      ;
; 2.427 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.303     ; 5.943      ;
; 2.427 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.306     ; 5.940      ;
; 2.427 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.303     ; 5.943      ;
; 2.427 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.306     ; 5.940      ;
; 2.427 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.304     ; 5.942      ;
; 2.428 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.367     ; 5.878      ;
; 2.431 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.236     ; 6.018      ;
; 2.431 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.236     ; 6.018      ;
; 2.431 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.232     ; 6.022      ;
; 2.436 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 6.069      ;
; 2.436 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.220     ; 6.029      ;
; 2.437 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.223     ; 6.025      ;
; 2.437 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.228     ; 6.020      ;
; 2.437 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.226     ; 6.022      ;
; 2.438 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 6.069      ;
; 2.438 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 6.067      ;
; 2.438 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 6.067      ;
; 2.438 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 6.069      ;
; 2.438 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 6.070      ;
; 2.438 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 6.070      ;
; 2.438 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 6.069      ;
; 2.438 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 6.067      ;
; 2.439 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 6.070      ;
; 2.439 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 6.069      ;
; 2.439 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 6.067      ;
; 2.439 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 6.067      ;
; 2.439 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 6.070      ;
; 2.439 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 6.067      ;
; 2.439 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 6.067      ;
; 2.439 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 6.067      ;
; 2.440 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.240     ; 6.005      ;
; 2.441 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.371     ; 5.861      ;
; 2.441 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.371     ; 5.861      ;
; 2.453 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.244     ; 5.988      ;
; 2.453 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.244     ; 5.988      ;
; 2.456 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.225     ; 6.004      ;
; 2.461 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.213     ; 6.011      ;
; 2.461 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.216     ; 6.008      ;
; 2.468 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.212     ; 6.005      ;
; 2.468 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.212     ; 6.005      ;
; 3.132 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.194     ; 5.489      ;
; 3.132 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.194     ; 5.489      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.194     ; 5.488      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.194     ; 5.488      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.487      ;
; 3.133 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.194     ; 5.488      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.139 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 5.496      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.155     ; 5.509      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.155     ; 5.509      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.155     ; 5.509      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
; 3.151 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.510      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                    ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                                                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 9.935  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.634      ;
; 9.935  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.634      ;
; 9.935  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.634      ;
; 9.935  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.634      ;
; 9.935  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.634      ;
; 9.935  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.634      ;
; 9.959  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 7.598      ;
; 9.959  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 7.598      ;
; 9.959  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 7.598      ;
; 9.969  ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[2]                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.590      ;
; 9.969  ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.590      ;
; 9.998  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.560      ;
; 10.004 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 7.553      ;
; 10.004 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 7.553      ;
; 10.004 ; reset_n                                             ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 7.553      ;
; 10.010 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.559      ;
; 10.010 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.559      ;
; 10.010 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.559      ;
; 10.016 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.553      ;
; 10.016 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.553      ;
; 10.016 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_ready_reg                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 7.553      ;
; 10.017 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 7.551      ;
; 10.017 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 7.551      ;
; 10.017 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 7.551      ;
; 10.017 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 7.551      ;
; 10.017 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 7.551      ;
; 10.017 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 7.551      ;
; 10.314 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 7.225      ;
; 10.314 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 7.225      ;
; 10.314 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 7.225      ;
; 10.314 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|key_held_reg         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 7.225      ;
; 10.331 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.223      ;
; 10.331 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[0]                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.223      ;
; 10.331 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 7.223      ;
; 10.336 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.222      ;
; 10.336 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.222      ;
; 10.336 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.222      ;
; 10.336 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.222      ;
; 10.336 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.222      ;
; 10.336 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.222      ;
; 10.356 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 7.183      ;
; 10.356 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 7.183      ;
; 10.356 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[5] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 7.183      ;
; 10.356 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[4] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 7.183      ;
; 10.359 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[6]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 7.183      ;
; 10.360 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 7.186      ;
; 10.360 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 7.186      ;
; 10.360 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 7.186      ;
; 10.361 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.189      ;
; 10.361 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.189      ;
; 10.361 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.189      ;
; 10.361 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.189      ;
; 10.361 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.189      ;
; 10.363 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[0]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 7.181      ;
; 10.370 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[2]                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.178      ;
; 10.370 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 7.178      ;
; 10.390 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.168      ;
; 10.390 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.168      ;
; 10.390 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_32bit_reg                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.168      ;
; 10.392 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 7.144      ;
; 10.392 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[3] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 7.144      ;
; 10.393 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.166      ;
; 10.393 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.166      ;
; 10.393 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[12]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.166      ;
; 10.393 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.166      ;
; 10.393 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.166      ;
; 10.393 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.166      ;
; 10.393 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.135      ;
; 10.393 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.135      ;
; 10.393 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.135      ;
; 10.393 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|key_held_reg         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.135      ;
; 10.394 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.156      ;
; 10.394 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[10]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.156      ;
; 10.394 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.156      ;
; 10.394 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[11]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.156      ;
; 10.394 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[26]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.156      ;
; 10.394 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[27]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.156      ;
; 10.399 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 7.162      ;
; 10.399 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 7.162      ;
; 10.399 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 7.162      ;
; 10.399 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[8]                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.160      ;
; 10.399 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[9]                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.160      ;
; 10.399 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.160      ;
; 10.399 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[14]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.160      ;
; 10.399 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[15]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 7.160      ;
; 10.399 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 7.148      ;
; 10.403 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[3]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 7.141      ;
; 10.405 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 7.141      ;
; 10.405 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 7.141      ;
; 10.405 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 7.141      ;
; 10.410 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 7.133      ;
; 10.410 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[0]                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 7.133      ;
; 10.410 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 7.133      ;
; 10.411 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.147      ;
; 10.411 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.147      ;
; 10.411 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.147      ;
; 10.416 ; reset_n                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 7.146      ;
; 10.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.141      ;
; 10.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.141      ;
; 10.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_ready_reg                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 7.141      ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.865 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.438      ; 2.514      ;
; 1.865 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.438      ; 2.514      ;
; 1.865 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.438      ; 2.514      ;
; 1.865 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.438      ; 2.514      ;
; 1.865 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.438      ; 2.514      ;
; 1.865 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.438      ; 2.514      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 1.925 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.392      ; 2.528      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.007 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.394      ; 2.612      ;
; 2.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.443      ; 3.223      ;
; 2.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.443      ; 3.223      ;
; 2.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.443      ; 3.223      ;
; 2.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.443      ; 3.223      ;
; 2.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.443      ; 3.223      ;
; 2.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.443      ; 3.223      ;
; 2.569 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.443      ; 3.223      ;
; 4.813 ; reset_n                                                                                                                                                                             ; reconfig_reg                                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.132      ; 5.157      ;
; 4.814 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[1]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.124      ; 5.150      ;
; 4.814 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[2]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.124      ; 5.150      ;
; 4.814 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[3]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.124      ; 5.150      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[13]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[14]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[15]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[8]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[17]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[9]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[1]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[20]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[12]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[4]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[13]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[14]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[15]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[25]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[28]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[31]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.153      ;
; 4.815 ; reset_n                                                                                                                                                                             ; chameleon_reset_n_reg[0]                                                                                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.122      ; 5.149      ;
; 4.816 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[4]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.124      ; 5.152      ;
; 4.816 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[5]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.124      ; 5.152      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.233      ; 5.161      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.696 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.235      ; 5.163      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.233      ; 5.162      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.233      ; 5.162      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.233      ; 5.162      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.233      ; 5.162      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.233      ; 5.162      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.233      ; 5.162      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.234      ; 5.163      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.234      ; 5.163      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.234      ; 5.163      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.234      ; 5.163      ;
; 4.697 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.233      ; 5.162      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.710 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.149      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.144      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.144      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 5.145      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.193      ; 5.145      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.191      ; 5.143      ;
; 4.720 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.144      ;
; 5.261 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.213      ; 5.620      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.216      ; 5.624      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.215      ; 5.623      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.214      ; 5.622      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.213      ; 5.621      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.620      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.620      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.213      ; 5.621      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.214      ; 5.622      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.215      ; 5.623      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.216      ; 5.624      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.215      ; 5.623      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.213      ; 5.621      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.214      ; 5.622      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.213      ; 5.621      ;
; 5.262 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.620      ;
; 5.266 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.624      ;
; 5.274 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 5.599      ;
; 5.274 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 5.599      ;
; 5.280 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.178      ; 5.604      ;
; 5.280 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.175      ; 5.601      ;
; 5.286 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.221      ; 5.653      ;
; 5.286 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.221      ; 5.653      ;
; 5.288 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.165      ; 5.599      ;
; 5.294 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.146      ; 5.586      ;
; 5.294 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.146      ; 5.586      ;
; 5.303 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 5.611      ;
; 5.309 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 5.619      ;
; 5.310 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.168      ; 5.624      ;
; 5.311 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 5.627      ;
; 5.312 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.149      ; 5.607      ;
; 5.312 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.157      ; 5.615      ;
; 5.322 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.154      ; 5.622      ;
; 5.322 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.154      ; 5.622      ;
; 5.326 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 5.632      ;
; 5.350 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.083      ; 5.518      ;
; 5.350 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 5.519      ;
; 5.350 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.082      ; 5.517      ;
; 5.350 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 5.516      ;
; 5.350 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 5.515      ;
; 5.350 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 5.515      ;
; 5.350 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.084      ; 5.519      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                       ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|button_reset_n                                                                 ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[0]                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[1]                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[2]                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[8]                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                   ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[7]                         ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|we                           ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[0]                                      ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[1]                                      ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[2]                                      ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[3]                                      ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[4]                                      ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[5]                                      ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[6]                                      ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                      ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|docking_station                                ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|no_clock                                       ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[0]                                  ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                                  ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                                  ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                  ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                  ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                  ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                  ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[7]                                  ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phiSync                                        ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_clk_reg                                                                    ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[0]                                                                   ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[2]                                                                   ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[3]                                                                   ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_reg[0]                                                                     ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_reg[1]                                                                     ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_reg[2]                                                                     ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_reg[3]                                                                     ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A1                                                               ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A2                                                               ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A3                                                               ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_BUS                                                              ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_BUSVIC                                                           ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_CLKPORT                                                          ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0VIC                                                            ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_END0                                                             ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC1                                                             ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                             ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC4                                                             ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_LED                                                              ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC1H                                                            ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC1L                                                            ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC2H                                                            ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC3H                                                            ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                            ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC4H                                                            ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5H                                                            ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5L                                                            ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_NMIIRQ1                                                          ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_NMIIRQ2                                                          ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_PS2                                                              ;
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                            ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[0]                                                                   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[4]                 ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[0]                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[1]                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[2]                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[3]                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[4]                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[5]                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[6]                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_dly   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_reg   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[0] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[1] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[2] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[3] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[4] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[0] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[1] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[2] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[3] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[83]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[84]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[87]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[96]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[1]                                                                   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                           ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_2                                                           ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR                                                             ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_1                                                           ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_2                                                           ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                       ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[0]                                         ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[7]                                         ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Creg                                         ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|irqActive                                    ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_sreg                                                                                                            ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[7]                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[4]                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|consol_output_reg[2]                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CA2_reg                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CB2_output_reg                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CB2_reg                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|cb2_edge_reg                                                            ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[0]                                                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqb_reg[0]                                                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqb_reg[1]                                                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_direction_reg[0]                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_direction_reg[1]                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_input_reg[0]                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_input_reg[1]                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_input_reg[5]                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_control_reg[3]                                                    ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_control_reg[5]                                                    ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[6]                                                      ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[0]                                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[1]                                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[2]                                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[3]                                                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_received_reg                                                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[7]                                                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[0]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[10]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[1]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[2]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[3]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[4]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[5]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[6]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[7]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[8]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_shiftreg_reg[9]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[102]                                                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[10]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[131]                                                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[13]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[276]                                                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[364]                                                                                                          ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[46]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[49]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[51]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[7]                                                                                                            ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                           ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[11]                                                ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[12]                                                ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30]                                          ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|write_enable_reg                                            ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[4]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[5]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[6]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[7]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[4]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[5]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[6]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[7]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[3]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[4]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[5]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[6]                                                         ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[2]                                      ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[3]                                      ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[4]                                      ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[5]                                      ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[6]                                      ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[1]                                                     ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[2]                                                     ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[4]                                                     ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[6]                                                     ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[7]                                                     ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0]        ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[1]        ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[2]        ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[3]        ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[4]        ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[5]        ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg    ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[1] ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[2] ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[4] ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[5] ;
; 8.507 ; 8.727        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg  ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'clk8'                                                                                           ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.449  ; 62.449       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.481  ; 62.481       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.518  ; 62.518       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.551  ; 62.551       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.676 ; 2.864 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.019 ; 2.176 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 3.151 ; 3.253 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 3.019 ; 3.102 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 3.151 ; 3.253 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.378 ; 2.539 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 2.787 ; 2.827 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 2.297 ; 2.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 2.741 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.542 ; 3.473 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.524 ; 2.460 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.582 ; 2.503 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.876 ; 2.749 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.542 ; 3.473 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.203 ; 3.228 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.344 ; 3.232 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.182 ; 3.065 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.513 ; 2.481 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.552 ; 2.490 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.159 ; 3.067 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.113 ; 3.027 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.207 ; 3.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.027 ; 3.009 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.052 ; 3.064 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.226 ; 3.104 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.882 ; 2.824 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 3.113 ; 3.223 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 5.430 ; 5.765 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 5.143 ; 5.119 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 5.828 ; 6.080 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -1.887 ; -2.057 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -1.256 ; -1.397 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -1.590 ; -1.758 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.978 ; -2.086 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -1.747 ; -1.804 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -1.590 ; -1.758 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.867 ; -1.910 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -1.539 ; -1.697 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -1.935 ; -2.065 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.653 ; -0.702 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.656 ; -0.705 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.656 ; -0.705 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.606 ; -0.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.597 ; -0.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.598 ; -0.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.598 ; -0.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.597 ; -0.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.596 ; -0.644 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.658 ; -0.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.658 ; -0.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -2.322 ; -2.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -2.422 ; -2.502 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -2.154 ; -2.236 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -4.923 ; -5.162 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.662 ; 6.774 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.662 ; 6.774 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.718 ; 4.827 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.728 ; 4.828 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.962 ; 5.109 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 4.856 ; 4.777 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.905 ; 6.229 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.876 ; 6.229 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 5.150 ; 5.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 5.095 ; 5.330 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.905 ; 5.987 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.821 ; 4.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.373 ; 3.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.653 ; 3.739 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.365 ; 3.320 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.454 ; 3.423 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.821 ; 4.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.650 ; 3.736 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.463 ; 3.432 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.463 ; 3.432 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.448 ; 3.417 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.810 ; 4.869 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.456 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.368 ; 3.323 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.456 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.433 ; 3.402 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.789 ; 4.848 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.430 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.461 ; 3.404 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.449 ; 3.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.438 ; 3.381 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.449 ; 3.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.451 ; 3.394 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.357 ; 3.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.357 ; 3.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.428 ; 3.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.439 ; 3.382 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.438 ; 3.381 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 7.388 ; 7.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.959 ; 4.741 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.807 ; 5.647 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 5.485 ; 5.286 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.388 ; 7.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.263 ; 5.912 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.455 ; 5.276 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 5.117 ; 5.000 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 5.455 ; 5.276 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 5.398 ; 5.173 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 5.135 ; 4.995 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.078 ; 4.915 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.863 ; 6.206 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.456 ; 5.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 6.726 ; 6.656 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.950 ; 4.749 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.957 ; 4.736 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.579 ; 4.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.726 ; 6.656 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 5.017 ; 4.889 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.278 ; 6.079 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.470 ; 6.139 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.135 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.013 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 4.151 ; 4.257 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.080 ; 6.185 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.151 ; 4.257 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.161 ; 4.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.386 ; 4.529 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 4.286 ; 4.210 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 4.514 ; 4.672 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.263 ; 5.603 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.567 ; 4.672 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.514 ; 4.740 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.291 ; 5.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.847 ; 2.803 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 2.855 ; 2.811 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.134 ; 3.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 2.847 ; 2.803 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 2.936 ; 2.906 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.302 ; 4.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.131 ; 3.218 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 2.944 ; 2.914 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 2.944 ; 2.914 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 2.930 ; 2.900 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.293 ; 4.353 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 2.936 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 2.850 ; 2.806 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 2.936 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.370 ; 4.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.916 ; 2.886 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.271 ; 4.331 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.912 ; 2.882 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.941 ; 2.885 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.929 ; 2.873 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.918 ; 2.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.370 ; 4.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.929 ; 2.873 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.931 ; 2.875 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 2.908 ; 2.852 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 2.919 ; 2.863 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 2.918 ; 2.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 4.385 ; 4.174 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.385 ; 4.174 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.198 ; 5.043 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 4.889 ; 4.697 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 6.774 ; 6.617 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 5.636 ; 5.298 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 4.501 ; 4.343 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.539 ; 4.426 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.863 ; 4.690 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.804 ; 4.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.556 ; 4.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 4.501 ; 4.343 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.251 ; 5.581 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 4.860 ; 5.116 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 4.022 ; 3.901 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.376 ; 4.182 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.383 ; 4.169 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.022 ; 3.901 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.138 ; 6.074 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.439 ; 4.315 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 5.652 ; 5.461 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 5.836 ; 5.518 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 6.661 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.543 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 6.559 ; 6.559 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 7.792 ; 7.792 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 7.383 ; 7.383 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 7.383 ; 7.383 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 6.661 ; 6.661 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 6.639 ; 6.639 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 6.637 ; 6.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 6.947 ; 6.947 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 6.559 ; 6.559 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 6.559 ; 6.559 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 6.562 ; 6.562 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 6.947 ; 6.947 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 6.637 ; 6.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 6.647 ; 6.647 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 6.651 ; 6.651 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 6.970 ; 6.970 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 6.970 ; 6.970 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 5.373 ; 5.439 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 6.567 ; 6.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 6.175 ; 6.235 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 6.175 ; 6.235 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.471 ; 5.537 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.450 ; 5.516 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.448 ; 5.514 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.746 ; 5.812 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.373 ; 5.439 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.373 ; 5.439 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.376 ; 5.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.746 ; 5.812 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.448 ; 5.514 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.458 ; 5.524 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.461 ; 5.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.778 ; 5.838 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.778 ; 5.838 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 6.114     ; 6.251     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 7.339     ; 7.470     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 6.977     ; 7.108     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 6.977     ; 7.108     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 6.301     ; 6.438     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 6.280     ; 6.417     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 6.274     ; 6.411     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 6.540     ; 6.677     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 6.115     ; 6.252     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 6.115     ; 6.252     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 6.114     ; 6.251     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 6.540     ; 6.677     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 6.274     ; 6.411     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 6.282     ; 6.419     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 6.291     ; 6.428     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 6.590     ; 6.721     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 6.590     ; 6.721     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 5.077     ; 5.077     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 6.258     ; 6.258     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.910     ; 5.910     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.910     ; 5.910     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.257     ; 5.257     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.237     ; 5.237     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.231     ; 5.231     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.486     ; 5.486     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.079     ; 5.079     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.079     ; 5.079     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.077     ; 5.077     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.486     ; 5.486     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.231     ; 5.231     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.239     ; 5.239     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.247     ; 5.247     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.539     ; 5.539     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.539     ; 5.539     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


----------------------------------------------
; Slow 1200mV 85C Model Metastability Report ;
----------------------------------------------
No synchronizer chains to report.


+---------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Fmax Summary                                                     ;
+------------+-----------------+-------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                      ; Note ;
+------------+-----------------+-------------------------------------------------+------+
; 63.45 MHz  ; 63.45 MHz       ; pll|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 141.76 MHz ; 141.76 MHz      ; pll|altpll_component|auto_generated|pll1|clk[0] ;      ;
+------------+-----------------+-------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.561 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 1.760 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold Summary                                       ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.341 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.402 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery Summary                                    ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 2.850  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 10.374 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal Summary                                    ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.694 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.220 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width Summary                         ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.101  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.508  ; 0.000         ;
; clk8                                            ; 62.394 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                        ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                             ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.561 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 7.084      ;
; 1.754 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 6.878      ;
; 1.816 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.819      ;
; 1.842 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.191     ; 6.783      ;
; 1.856 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.194     ; 6.766      ;
; 1.856 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.194     ; 6.766      ;
; 1.867 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 15.684     ;
; 1.942 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.702      ;
; 1.947 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.195     ; 6.674      ;
; 2.002 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.170     ; 6.644      ;
; 2.017 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.189     ; 6.610      ;
; 2.027 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.179     ; 6.610      ;
; 2.040 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.192     ; 6.584      ;
; 2.042 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.192     ; 6.582      ;
; 2.044 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.194     ; 6.578      ;
; 2.056 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.179     ; 6.581      ;
; 2.060 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.192     ; 6.564      ;
; 2.066 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.191     ; 6.559      ;
; 2.072 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.194     ; 6.550      ;
; 2.072 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.476     ;
; 2.077 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.195     ; 6.544      ;
; 2.088 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 15.453     ;
; 2.098 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 15.445     ;
; 2.106 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.192     ; 6.518      ;
; 2.114 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 6.522      ;
; 2.162 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.473      ;
; 2.164 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.185     ; 6.467      ;
; 2.170 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.475      ;
; 2.182 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.453      ;
; 2.187 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.359     ;
; 2.189 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 6.447      ;
; 2.200 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 15.341     ;
; 2.203 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 15.338     ;
; 2.207 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.416      ;
; 2.215 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.408      ;
; 2.237 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.386      ;
; 2.239 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.404      ;
; 2.240 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.320     ;
; 2.245 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.398      ;
; 2.248 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.194     ; 6.374      ;
; 2.272 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 15.280     ;
; 2.273 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 15.286     ;
; 2.277 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.366      ;
; 2.283 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 15.260     ;
; 2.289 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 15.254     ;
; 2.293 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 15.245     ;
; 2.303 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.237     ;
; 2.304 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.319      ;
; 2.307 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.185     ; 6.324      ;
; 2.310 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.331      ;
; 2.316 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.182     ; 6.318      ;
; 2.317 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 15.244     ;
; 2.324 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 15.229     ;
; 2.326 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 15.224     ;
; 2.328 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.185     ; 6.303      ;
; 2.330 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.181     ; 6.305      ;
; 2.332 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.311      ;
; 2.338 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.179     ; 6.299      ;
; 2.339 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 15.204     ;
; 2.339 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 15.205     ;
; 2.351 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.177     ; 6.288      ;
; 2.369 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 6.267      ;
; 2.370 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 15.191     ;
; 2.374 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.166     ;
; 2.379 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.194     ; 6.243      ;
; 2.381 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.179     ; 6.256      ;
; 2.381 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 6.264      ;
; 2.386 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.237      ;
; 2.392 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 15.151     ;
; 2.400 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.192     ; 6.224      ;
; 2.404 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.216      ;
; 2.404 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.247      ;
; 2.405 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 15.133     ;
; 2.407 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|read_en_r                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[26]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 15.170     ;
; 2.408 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 15.130     ;
; 2.414 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 15.129     ;
; 2.421 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.192     ; 6.203      ;
; 2.422 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.166     ; 6.228      ;
; 2.422 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.118     ;
; 2.430 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.211      ;
; 2.435 ; chameleon_cdtv_remote:myIr|key_rew                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.194     ; 6.187      ;
; 2.439 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.202      ;
; 2.445 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 15.112     ;
; 2.456 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.188      ;
; 2.477 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.167      ;
; 2.478 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 15.065     ;
; 2.478 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 15.078     ;
; 2.479 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.164      ;
; 2.487 ; chameleon_cdtv_remote:myIr|key_ff                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.163     ; 6.166      ;
; 2.488 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.052     ;
; 2.489 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 15.054     ;
; 2.490 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.166     ; 6.160      ;
; 2.493 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 15.049     ;
; 2.498 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 15.062     ;
; 2.498 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 15.044     ;
; 2.500 ; chameleon_cdtv_remote:myIr|key_play                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.158     ; 6.158      ;
; 2.503 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 15.041     ;
; 2.511 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.029     ;
; 2.513 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.035     ;
; 2.513 ; reset_n                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 15.056     ;
+-------+-----------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                ; To Node                                             ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.760 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.985      ;
; 1.773 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.972      ;
; 1.817 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.929      ;
; 1.825 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.920      ;
; 1.825 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.792      ;
; 1.830 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.916      ;
; 1.832 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.781      ;
; 1.838 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.907      ;
; 1.848 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.738      ;
; 1.851 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.059     ; 6.780      ;
; 1.851 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 6.765      ;
; 1.853 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.733      ;
; 1.894 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 6.697      ;
; 1.899 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 6.692      ;
; 1.924 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.821      ;
; 1.962 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.067     ; 6.661      ;
; 1.967 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.067     ; 6.656      ;
; 1.972 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 6.592      ;
; 1.981 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 6.765      ;
; 1.989 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.756      ;
; 2.006 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.580      ;
; 2.029 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.134     ; 6.527      ;
; 2.052 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 6.539      ;
; 2.062 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.551      ;
; 2.064 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.553      ;
; 2.065 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.554      ;
; 2.067 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|ldqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.058     ; 6.565      ;
; 2.072 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 6.543      ;
; 2.091 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.527      ;
; 2.116 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 6.500      ;
; 2.120 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.067     ; 6.503      ;
; 2.130 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.488      ;
; 2.133 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.480      ;
; 2.134 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.134     ; 6.422      ;
; 2.137 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 6.477      ;
; 2.143 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.059     ; 6.488      ;
; 2.156 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.461      ;
; 2.171 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 6.444      ;
; 2.176 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.441      ;
; 2.201 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 6.363      ;
; 2.202 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 6.414      ;
; 2.205 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 6.425      ;
; 2.206 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.413      ;
; 2.212 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.374      ;
; 2.212 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.124     ; 6.354      ;
; 2.217 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.369      ;
; 2.226 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 6.390      ;
; 2.232 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.386      ;
; 2.269 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.132     ; 6.289      ;
; 2.273 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.313      ;
; 2.277 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.125     ; 6.288      ;
; 2.278 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 6.338      ;
; 2.302 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 6.313      ;
; 2.304 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.315      ;
; 2.307 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.306      ;
; 2.319 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 6.272      ;
; 2.327 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.059     ; 6.304      ;
; 2.330 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 6.259      ;
; 2.334 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 6.223      ;
; 2.335 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 6.254      ;
; 2.353 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.124     ; 6.213      ;
; 2.356 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.262      ;
; 2.358 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 6.206      ;
; 2.359 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|ldqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.058     ; 6.273      ;
; 2.359 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 6.334      ;
; 2.366 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.067     ; 6.257      ;
; 2.367 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 6.247      ;
; 2.369 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.249      ;
; 2.370 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.216      ;
; 2.372 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 6.321      ;
; 2.372 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 6.321      ;
; 2.374 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.132     ; 6.184      ;
; 2.377 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 6.207      ;
; 2.382 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 6.202      ;
; 2.385 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 6.308      ;
; 2.396 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[2]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 6.193      ;
; 2.401 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[2]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 6.188      ;
; 2.403 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.112     ; 6.175      ;
; 2.403 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.210      ;
; 2.408 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.112     ; 6.170      ;
; 2.410 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.132     ; 6.148      ;
; 2.414 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|data_out_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.192     ; 6.073      ;
; 2.414 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|data_out_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.192     ; 6.073      ;
; 2.421 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|ldqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.059     ; 6.210      ;
; 2.421 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.196      ;
; 2.423 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.190      ;
; 2.433 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.134     ; 6.123      ;
; 2.439 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 6.118      ;
; 2.441 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.124     ; 6.125      ;
; 2.441 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 6.174      ;
; 2.442 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.176      ;
; 2.445 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.174      ;
; 2.464 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 6.155      ;
; 2.469 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 6.146      ;
; 2.478 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.139      ;
; 2.488 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 6.101      ;
; 2.489 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 6.127      ;
; 2.490 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.128      ;
; 2.491 ; chameleon_cdtv_remote:myIr|timer[9]                      ; chameleon_cdtv_remote:myIr|state.STATE_START        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 6.256      ;
; 2.491 ; chameleon_cdtv_remote:myIr|timer[9]                      ; chameleon_cdtv_remote:myIr|state.STATE_LOW          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 6.256      ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                     ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.341 ; chameleon_io:chameleon_io|ps2_keyboard_dat_in                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_dat_reg                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.181      ; 0.737      ;
; 0.386 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][6]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.423      ; 1.039      ;
; 0.388 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][5]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.047      ;
; 0.390 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.049      ;
; 0.390 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][5]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.425      ; 1.045      ;
; 0.393 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.052      ;
; 0.394 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.053      ;
; 0.394 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][1]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.053      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][4]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.054      ;
; 0.399 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][3]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.058      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][0]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.423      ; 1.054      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][7]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.060      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[30]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[30]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[4]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[4]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[5]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[5]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[6]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[6]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[1]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[1]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[1]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[5]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_clock_reg                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_clock_reg                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[2]                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_bitcount_reg[3]                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                              ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[7]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_bitcount_reg[1]                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_bitcount_reg[1]                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_reg                                                                                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_reg                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|twotone_reg                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|twotone_reg                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[7]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[7]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[3]                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[3]                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|chan2_output_reg                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|chan2_output_reg                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[8]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[8]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[9]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[9]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[13]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[14]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[14]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[15]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[15]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[24]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_32bit_reg                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_32bit_reg                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[7]                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[7]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[5]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[5]                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmist_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmist_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[4]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[4]                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[1]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[6]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[6]                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[1]                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[1]                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[4]                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[4]                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hblank_reg                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hblank_reg                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vsync_reg                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vsync_reg                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vsync_reg                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vsync_reg                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|pmg_dma_state_reg[0]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|pmg_dma_state_reg[0]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|pmg_dma_state_reg[2]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|pmg_dma_state_reg[2]                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|odd_scanline_reg                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|odd_scanline_reg                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[0]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][7]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.061      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[7]                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[7]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile2|count_reg[1]                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile2|count_reg[1]                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile2|shift_reg[7]                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile2|shift_reg[7]                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile2|shift_reg[6]                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile2|shift_reg[6]                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[7]                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[7]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pf_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pf_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p3pf_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p3pf_reg[3]                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile0|count_reg[1]                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile0|count_reg[1]                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                         ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                              ; To Node                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.402 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_RESET                                                                    ; chameleon_usb:usb|state.STATE_RESET                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_LEN1                                                                     ; chameleon_usb:usb|state.STATE_LEN1                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_LEN0                                                                     ; chameleon_usb:usb|state.STATE_LEN0                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_ADDR1                                                                    ; chameleon_usb:usb|state.STATE_ADDR1                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_ADDR0                                                                    ; chameleon_usb:usb|state.STATE_ADDR0                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                     ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_usb:usb|req_reg                                                                              ; chameleon_usb:usb|req_reg                                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.404 ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.404 ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.404 ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.404 ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.404 ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.404 ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.404 ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.669      ;
; 0.417 ; chameleon_io:chameleon_io|mux_toggle                                                                   ; chameleon_io:chameleon_io|mux_toggle                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.684      ;
; 0.418 ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.418 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.418 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10]                                          ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10]                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.721      ;
; 0.467 ; chameleon_cdtv_remote:myIr|shiftreg[13]                                                                ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.732      ;
; 0.469 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localEnd                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.736      ;
; 0.470 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.736      ;
; 0.470 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.736      ;
; 0.470 ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.736      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.738      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[87]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.473 ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.739      ;
; 0.473 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|rom_lh_n_reg   ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.739      ;
; 0.473 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.739      ;
; 0.476 ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.742      ;
; 0.478 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.744      ;
; 0.478 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.744      ;
; 0.478 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                    ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.744      ;
; 0.478 ; chameleon_io:chameleon_io|mux_state.MUX_D0WR                                                           ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.744      ;
; 0.478 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.744      ;
; 0.478 ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.744      ;
; 0.478 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.743      ;
; 0.478 ; chameleon_cdtv_remote:myIr|shiftreg[5]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.744      ;
; 0.479 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[0]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[6]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[5]                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[2]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[2]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[1]                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[6]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[6]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.480 ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 0.745      ;
; 0.481 ; chameleon_io:chameleon_io|mux_state.MUX_IEC4                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC2H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.747      ;
; 0.481 ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC3H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.747      ;
; 0.481 ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.747      ;
; 0.481 ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_MMC7H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.747      ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 2.850 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.153     ; 5.687      ;
; 2.850 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.153     ; 5.687      ;
; 2.857 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.278     ; 5.544      ;
; 2.857 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.281     ; 5.541      ;
; 2.857 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.281     ; 5.541      ;
; 2.857 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.278     ; 5.544      ;
; 2.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.277     ; 5.544      ;
; 2.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.278     ; 5.543      ;
; 2.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.281     ; 5.540      ;
; 2.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.281     ; 5.540      ;
; 2.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.277     ; 5.544      ;
; 2.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.281     ; 5.540      ;
; 2.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.278     ; 5.543      ;
; 2.869 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.330     ; 5.480      ;
; 2.869 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.330     ; 5.480      ;
; 2.877 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.158     ; 5.655      ;
; 2.877 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.161     ; 5.652      ;
; 2.877 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.161     ; 5.652      ;
; 2.877 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.158     ; 5.655      ;
; 2.877 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.161     ; 5.652      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.655      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.158     ; 5.654      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.161     ; 5.651      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.161     ; 5.651      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.161     ; 5.651      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.158     ; 5.654      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.655      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.158     ; 5.654      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.160     ; 5.652      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.653      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.161     ; 5.651      ;
; 2.878 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.160     ; 5.652      ;
; 2.880 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.335     ; 5.464      ;
; 2.883 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.206     ; 5.601      ;
; 2.889 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.210     ; 5.591      ;
; 2.889 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.210     ; 5.591      ;
; 2.890 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.338     ; 5.451      ;
; 2.890 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.338     ; 5.451      ;
; 2.891 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 5.591      ;
; 2.898 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 5.589      ;
; 2.899 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.198     ; 5.593      ;
; 2.899 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.203     ; 5.588      ;
; 2.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.215     ; 5.575      ;
; 2.900 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.595      ;
; 2.910 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.218     ; 5.562      ;
; 2.910 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.218     ; 5.562      ;
; 2.915 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.201     ; 5.574      ;
; 2.917 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.191     ; 5.582      ;
; 2.917 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.195     ; 5.578      ;
; 2.924 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.190     ; 5.576      ;
; 2.924 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.190     ; 5.576      ;
; 3.551 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.171     ; 5.094      ;
; 3.551 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.171     ; 5.094      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.171     ; 5.093      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.171     ; 5.093      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.092      ;
; 3.552 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.171     ; 5.093      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.557 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 5.100      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 5.114      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 5.114      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 5.113      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
; 3.565 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.115      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                           ;
+--------+-----------+----------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node ; To Node                                                                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------+----------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 10.374 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 7.200      ;
; 10.374 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 7.200      ;
; 10.374 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 7.200      ;
; 10.374 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 7.200      ;
; 10.374 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 7.200      ;
; 10.374 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 7.200      ;
; 10.400 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 7.166      ;
; 10.400 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 7.166      ;
; 10.400 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 7.166      ;
; 10.408 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[2]                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 7.158      ;
; 10.408 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 7.158      ;
; 10.441 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 7.125      ;
; 10.448 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 7.117      ;
; 10.448 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 7.117      ;
; 10.448 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 7.117      ;
; 10.450 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 7.124      ;
; 10.450 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 7.124      ;
; 10.450 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 7.124      ;
; 10.458 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 7.115      ;
; 10.458 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.055     ; 7.117      ;
; 10.458 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 7.115      ;
; 10.458 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 7.115      ;
; 10.458 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 7.115      ;
; 10.458 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.055     ; 7.117      ;
; 10.458 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 7.115      ;
; 10.458 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 7.115      ;
; 10.458 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_ready_reg                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.055     ; 7.117      ;
; 10.771 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.781      ;
; 10.771 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.781      ;
; 10.771 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.781      ;
; 10.771 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|key_held_reg         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.781      ;
; 10.788 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[1]                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.775      ;
; 10.788 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[0]                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.775      ;
; 10.788 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.775      ;
; 10.814 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.738      ;
; 10.814 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.738      ;
; 10.814 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[5] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.738      ;
; 10.814 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[4] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.738      ;
; 10.815 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.746      ;
; 10.815 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.746      ;
; 10.815 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[23]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.746      ;
; 10.815 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[29]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.746      ;
; 10.815 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[30]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.746      ;
; 10.820 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_reg[0]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 6.736      ;
; 10.821 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[6]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 6.733      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.717      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.717      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.717      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[27]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.715      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_last_reg                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.719      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_full_reg                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.719      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.719      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.719      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|sio_out_reg                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.719      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[23]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.715      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[11]                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.717      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[10]                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.717      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[13]                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.717      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[12]                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.717      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_reg                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.067     ; 6.717      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[18]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.715      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[19]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.715      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[17]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.715      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[22]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.715      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[16]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.715      ;
; 10.846 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[20]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.715      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[0]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.066     ; 6.717      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[1]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.066     ; 6.717      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[30]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 6.708      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[31]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 6.708      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[28]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 6.708      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[29]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 6.708      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[26]                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 6.708      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[2]                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 6.719      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 6.719      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 6.719      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[2]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[3]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[4]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|enabled_out_reg                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.715      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.715      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.715      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.715      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.715      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.715      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.715      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.715      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 6.719      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 6.719      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[4]                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 6.719      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[0]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[1]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
; 10.847 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[2]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 6.718      ;
+--------+-----------+----------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.272      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.272      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.272      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.272      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.272      ;
; 1.694 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.388      ; 2.272      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.343      ; 2.274      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 1.828 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.363      ;
; 2.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.934      ;
; 2.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.934      ;
; 2.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.934      ;
; 2.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.934      ;
; 2.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.934      ;
; 2.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.934      ;
; 2.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.389      ; 2.934      ;
; 4.325 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[0]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 4.629      ;
; 4.325 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[1]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 4.629      ;
; 4.325 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[2]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 4.629      ;
; 4.325 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[3]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 4.629      ;
; 4.325 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|enabled_out_reg                                                                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 4.629      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[13]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 4.633      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[14]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 4.633      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[15]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 4.633      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[8]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 4.633      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[9]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 4.633      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[13]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 4.633      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[14]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 4.633      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[15]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.113      ; 4.633      ;
; 4.325 ; reset_n                                                                                                                                                                             ; chameleon_reset_n_reg[0]                                                                                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 4.629      ;
; 4.325 ; reset_n                                                                                                                                                                             ; reconfig_reg                                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.117      ; 4.637      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[1]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.110      ; 4.630      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[2]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.110      ; 4.630      ;
; 4.325 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[3]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.110      ; 4.630      ;
; 4.326 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[4]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.111      ; 4.632      ;
; 4.326 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[5]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.111      ; 4.632      ;
; 4.326 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[6]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.111      ; 4.632      ;
; 4.326 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[7]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.111      ; 4.632      ;
; 4.326 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[8]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.111      ; 4.632      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 4.641      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 4.641      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.205      ; 4.640      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 4.641      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 4.641      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 4.641      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 4.641      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 4.642      ;
; 4.220 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 4.641      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.231 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 4.629      ;
; 4.240 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 4.626      ;
; 4.240 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.171      ; 4.626      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 4.626      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 4.626      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.169      ; 4.625      ;
; 4.241 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 4.626      ;
; 4.736 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 5.058      ;
; 4.736 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 5.055      ;
; 4.736 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 5.055      ;
; 4.736 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 5.058      ;
; 4.736 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 5.056      ;
; 4.736 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 5.055      ;
; 4.736 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 5.056      ;
; 4.736 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 5.055      ;
; 4.737 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 5.059      ;
; 4.737 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 5.058      ;
; 4.737 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 5.055      ;
; 4.737 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 5.055      ;
; 4.737 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 5.058      ;
; 4.737 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.190      ; 5.059      ;
; 4.737 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.189      ; 5.058      ;
; 4.737 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 5.057      ;
; 4.739 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 5.057      ;
; 4.746 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 5.034      ;
; 4.746 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 5.034      ;
; 4.753 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.155      ; 5.040      ;
; 4.753 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 5.036      ;
; 4.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.145      ; 5.034      ;
; 4.759 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.127      ; 5.018      ;
; 4.759 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.127      ; 5.018      ;
; 4.760 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 5.087      ;
; 4.760 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.195      ; 5.087      ;
; 4.771 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 5.046      ;
; 4.772 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.131      ; 5.035      ;
; 4.776 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 5.059      ;
; 4.776 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.149      ; 5.057      ;
; 4.778 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 5.053      ;
; 4.779 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.137      ; 5.048      ;
; 4.780 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 5.048      ;
; 4.780 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 5.048      ;
; 4.791 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 5.063      ;
; 4.819 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 4.961      ;
; 4.819 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 4.958      ;
; 4.819 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.061      ; 4.958      ;
; 4.819 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 4.961      ;
; 4.820 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 4.962      ;
; 4.820 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 4.961      ;
; 4.820 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 4.958      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_dly   ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_reg   ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[83]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[84]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[87]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[96]    ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[0]                                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|button_reset_n                                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|c64_data_reg[2]                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[0]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[1]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[2]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[8]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[4]                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[0]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[1]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[2]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[3]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[4]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[5]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[6]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[7]                         ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|we                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[0] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[1] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[2] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[3] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[4] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[0] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[1] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[2] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[3] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|rom_lh_n_reg     ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100]   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101]   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102]   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103]   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80]    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[82]    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[97]    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[99]    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[0]                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[1]                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[2]                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[3]                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[4]                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[5]                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[6]                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|docking_station                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|no_clock                                       ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[0]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[7]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phiSync                                        ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_clk_reg                                                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[1]                                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[2]                                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[3]                                                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_reg[0]                                                                     ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_reg[1]                                                                     ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_reg[2]                                                                     ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_reg[3]                                                                     ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A1                                                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A2                                                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A3                                                               ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_BUS                                                              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_BUSVIC                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_CLKPORT                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_2                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0VIC                                                            ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR                                                             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_1                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_2                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_2                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1VIC                                                            ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_2                                                           ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CB2_output_reg                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CB2_reg                                                                 ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|cb2_edge_reg                                                            ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqb_reg[0]                                                             ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqb_reg[1]                                                             ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_control_reg[3]                                                    ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_control_reg[5]                                                    ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[6]                                                      ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[1] ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[2] ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[4] ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[5] ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ir_fkeys_reg[11]                                                                                                                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ir_fkeys_reg[1]                                                                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ir_fkeys_reg[2]                                                                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ir_fkeys_reg[3]                                                                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[66]                                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[67]                                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[6]                                                                                                            ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[74]                                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[75]                                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[90]                                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_sreg                                                                                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[10]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[11]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[12]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[13]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[14]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[15]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[2]                                                 ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[3]                                                 ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[4]                                                 ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[5]                                                 ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[6]                                                 ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[7]                                                 ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                 ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[0]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[1]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[2]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[3]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[0]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[1]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[2]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[3]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Creg                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Ireg                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[3]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[4]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[5]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[6]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[7]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Vreg                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[7]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[4]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|irqActive                                    ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26]                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27]                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]                                   ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33]                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40]                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|consol_output_reg[2]                                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[3]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[4]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[5]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[6]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[2]                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[3]                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[4]                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[5]                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[6]                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_input_reg[5]                                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[1]                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[2]                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[4]                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[6]                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[7]                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0]        ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|key_held_reg         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot0_reg[2]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[0]                                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[1]                                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[2]                                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[3]                                                                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_received_reg                                                                                   ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[0]                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[1]                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[2]                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[3]                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[4]                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[5]                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[6]                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|byte_reg[7]                                                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_event_reg                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[0]                                                                               ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[1]                                                                               ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'clk8'                                                                                            ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.449  ; 62.449       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.473  ; 62.473       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.526  ; 62.526       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.551  ; 62.551       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.324 ; 2.633 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 1.745 ; 1.971 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 2.744 ; 2.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 2.621 ; 2.846 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 2.744 ; 2.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.057 ; 2.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 2.418 ; 2.580 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 1.987 ; 2.224 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 2.374 ; 2.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.264 ; 3.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.287 ; 2.123 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.338 ; 2.162 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.623 ; 2.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.264 ; 3.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.922 ; 2.817 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.062 ; 2.801 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.902 ; 2.677 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.274 ; 2.151 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.309 ; 2.154 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.890 ; 2.681 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.839 ; 2.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.925 ; 2.818 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.764 ; 2.608 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.789 ; 2.666 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.954 ; 2.683 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.619 ; 2.446 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 2.736 ; 2.957 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 4.788 ; 5.417 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 4.649 ; 4.691 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 5.183 ; 5.257 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -1.625 ; -1.914 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -1.069 ; -1.279 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -1.359 ; -1.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.709 ; -1.926 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -1.493 ; -1.655 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -1.359 ; -1.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.620 ; -1.751 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -1.317 ; -1.546 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -1.661 ; -1.915 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.533 ; -0.583 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.537 ; -0.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.537 ; -0.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.494 ; -0.543 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.485 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.485 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.538 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.538 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -2.035 ; -2.249 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -2.106 ; -2.316 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -1.854 ; -2.070 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -4.381 ; -4.451 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.547 ; 6.782 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.547 ; 6.782 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.660 ; 4.808 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.671 ; 4.817 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.874 ; 5.092 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 4.847 ; 4.710 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.669 ; 6.255 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.651 ; 6.255 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 5.016 ; 5.250 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.968 ; 5.337 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.669 ; 5.958 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.866 ; 4.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.702 ; 3.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.414 ; 3.376 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.502 ; 3.478 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.866 ; 4.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.694 ; 3.787 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.508 ; 3.484 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.508 ; 3.484 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.495 ; 3.471 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.416 ; 3.378 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.483 ; 3.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.838 ; 4.904 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.479 ; 3.455 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.503 ; 3.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.471 ; 3.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 7.404 ; 7.037 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.975 ; 4.658 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.813 ; 5.461 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 5.478 ; 5.121 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.404 ; 7.037 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.289 ; 5.699 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.452 ; 5.149 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 5.131 ; 4.879 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 5.452 ; 5.149 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 5.377 ; 5.020 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 5.125 ; 4.896 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.077 ; 4.813 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.652 ; 6.226 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.268 ; 5.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 6.741 ; 6.508 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.961 ; 4.660 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.974 ; 4.650 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.620 ; 4.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.741 ; 6.508 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 5.038 ; 4.763 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.242 ; 5.849 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.441 ; 5.907 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.272 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.119 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 4.163 ; 4.306 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.036 ; 6.259 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.163 ; 4.306 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.173 ; 4.315 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.369 ; 4.580 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 4.346 ; 4.214 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 4.458 ; 4.730 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.113 ; 5.694 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.504 ; 4.730 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.458 ; 4.814 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.131 ; 5.410 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.960 ; 2.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 2.968 ; 2.931 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.247 ; 3.341 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 2.960 ; 2.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.048 ; 3.025 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.412 ; 4.479 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.240 ; 3.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.054 ; 3.031 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.054 ; 3.031 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.041 ; 3.018 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.405 ; 4.472 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.042 ; 2.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 2.962 ; 2.925 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.042 ; 2.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.476 ; 4.528 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.029 ; 3.006 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.385 ; 4.452 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.026 ; 3.003 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.048 ; 2.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.476 ; 4.528 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.038 ; 2.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.015 ; 2.966 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.026 ; 2.977 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.025 ; 2.976 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 4.466 ; 4.161 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.466 ; 4.161 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.271 ; 4.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 4.949 ; 4.606 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 6.855 ; 6.506 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 5.727 ; 5.159 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 4.567 ; 4.313 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.619 ; 4.376 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.927 ; 4.635 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.850 ; 4.506 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.612 ; 4.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 4.567 ; 4.313 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.115 ; 5.668 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 4.746 ; 5.191 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 4.129 ; 3.910 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.454 ; 4.163 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.466 ; 4.153 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.129 ; 3.910 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.219 ; 5.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.526 ; 4.261 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 5.685 ; 5.307 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 5.876 ; 5.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 6.857 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.710 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 6.134 ; 6.134 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 7.309 ; 7.309 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 6.918 ; 6.918 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 6.918 ; 6.918 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 6.236 ; 6.236 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 6.214 ; 6.214 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 6.213 ; 6.213 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 6.522 ; 6.522 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 6.134 ; 6.134 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 6.134 ; 6.134 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 6.136 ; 6.136 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 6.522 ; 6.522 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 6.213 ; 6.213 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 6.223 ; 6.223 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 6.226 ; 6.226 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 6.529 ; 6.529 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 6.529 ; 6.529 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 5.352 ; 5.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 6.489 ; 6.485 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 6.113 ; 6.109 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 6.113 ; 6.109 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.451 ; 5.444 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.429 ; 5.422 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.428 ; 5.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.724 ; 5.717 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.352 ; 5.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.352 ; 5.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.354 ; 5.347 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.724 ; 5.717 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.428 ; 5.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.438 ; 5.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.441 ; 5.434 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.740 ; 5.736 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.740 ; 5.736 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 5.501     ; 5.634     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 6.634     ; 6.755     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 6.302     ; 6.423     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 6.302     ; 6.423     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.667     ; 5.800     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.647     ; 5.780     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.644     ; 5.777     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.881     ; 6.014     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.504     ; 5.637     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.504     ; 5.637     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.501     ; 5.634     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.881     ; 6.014     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.644     ; 5.777     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.646     ; 5.779     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.657     ; 5.790     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.941     ; 6.062     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.941     ; 6.062     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.865     ; 4.865     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.953     ; 5.953     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.634     ; 5.634     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.634     ; 5.634     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.025     ; 5.025     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.005     ; 5.005     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.002     ; 5.002     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.229     ; 5.229     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.868     ; 4.868     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.868     ; 4.868     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.865     ; 4.865     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.229     ; 5.229     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.002     ; 5.002     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.004     ; 5.004     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.015     ; 5.015     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.288     ; 5.288     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.288     ; 5.288     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


---------------------------------------------
; Slow 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 5.456 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 5.552 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold Summary                                       ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.113 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.186 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery Summary                                    ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 5.819  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 14.055 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal Summary                                    ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.806 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 2.113 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width Summary                         ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.189  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.561  ; 0.000         ;
; clk8                                            ; 62.089 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                ; To Node                                             ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.456 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 3.309      ;
; 5.479 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 3.286      ;
; 5.480 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.048     ; 3.226      ;
; 5.494 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 3.216      ;
; 5.526 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 3.185      ;
; 5.529 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.035     ; 3.237      ;
; 5.541 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 3.159      ;
; 5.545 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.040     ; 3.169      ;
; 5.552 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.035     ; 3.214      ;
; 5.559 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 3.124      ;
; 5.564 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 3.201      ;
; 5.573 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.034     ; 3.147      ;
; 5.574 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 3.134      ;
; 5.579 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 3.186      ;
; 5.588 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 3.124      ;
; 5.589 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.047     ; 3.118      ;
; 5.594 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 3.106      ;
; 5.598 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.040     ; 3.116      ;
; 5.599 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 3.109      ;
; 5.602 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 3.163      ;
; 5.602 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.059     ; 3.093      ;
; 5.603 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 3.108      ;
; 5.604 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 3.106      ;
; 5.611 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 3.064      ;
; 5.613 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 3.099      ;
; 5.620 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 3.093      ;
; 5.635 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 3.076      ;
; 5.635 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 3.077      ;
; 5.637 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.035     ; 3.129      ;
; 5.639 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.048     ; 3.067      ;
; 5.645 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 3.068      ;
; 5.647 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 3.063      ;
; 5.649 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.034     ; 3.071      ;
; 5.651 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 3.024      ;
; 5.652 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 3.048      ;
; 5.653 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 3.032      ;
; 5.654 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 3.054      ;
; 5.655 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.059     ; 3.040      ;
; 5.656 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.040     ; 3.058      ;
; 5.665 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 3.046      ;
; 5.668 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 3.016      ;
; 5.673 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 3.035      ;
; 5.678 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 3.007      ;
; 5.687 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.036     ; 3.078      ;
; 5.687 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 3.025      ;
; 5.705 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.972      ;
; 5.709 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 3.001      ;
; 5.713 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.059     ; 2.982      ;
; 5.716 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.059     ; 2.979      ;
; 5.719 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.994      ;
; 5.720 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.956      ;
; 5.723 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.035     ; 2.996      ;
; 5.723 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 2.960      ;
; 5.724 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 2.959      ;
; 5.725 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|ldqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.033     ; 2.996      ;
; 5.729 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.984      ;
; 5.730 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.947      ;
; 5.741 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.969      ;
; 5.741 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 2.971      ;
; 5.744 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 2.968      ;
; 5.745 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.932      ;
; 5.748 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.962      ;
; 5.752 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 2.933      ;
; 5.754 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.959      ;
; 5.755 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.034     ; 2.965      ;
; 5.756 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.955      ;
; 5.758 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|data_out_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 2.898      ;
; 5.758 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|data_out_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 2.898      ;
; 5.760 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.916      ;
; 5.763 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.045     ; 2.946      ;
; 5.765 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.064     ; 2.925      ;
; 5.766 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.047     ; 2.941      ;
; 5.766 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 2.946      ;
; 5.769 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.059     ; 2.926      ;
; 5.770 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.907      ;
; 5.773 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.937      ;
; 5.776 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.899      ;
; 5.782 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.918      ;
; 5.784 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[2]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.914      ;
; 5.786 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 2.922      ;
; 5.788 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.040     ; 2.926      ;
; 5.791 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 2.917      ;
; 5.799 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 2.909      ;
; 5.800 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 2.912      ;
; 5.800 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.911      ;
; 5.800 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.875      ;
; 5.803 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 2.909      ;
; 5.804 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.873      ;
; 5.812 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.898      ;
; 5.813 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|ldqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.033     ; 2.908      ;
; 5.816 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|data_out_reg[27]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 2.840      ;
; 5.816 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|data_out_reg[21]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 2.840      ;
; 5.817 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 2.868      ;
; 5.818 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.893      ;
; 5.818 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.064     ; 2.872      ;
; 5.824 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.067     ; 2.910      ;
; 5.827 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.059     ; 2.868      ;
; 5.828 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.870      ;
; 5.828 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.041     ; 2.885      ;
; 5.828 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 2.884      ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                      ;
+-------+-------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                           ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.552 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 3.156      ;
; 5.614 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 3.087      ;
; 5.621 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 3.080      ;
; 5.628 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.105     ; 3.068      ;
; 5.637 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 3.070      ;
; 5.665 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.108     ; 3.028      ;
; 5.667 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.107     ; 3.027      ;
; 5.681 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 3.028      ;
; 5.683 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 3.012      ;
; 5.687 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 3.015      ;
; 5.691 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.103     ; 3.007      ;
; 5.707 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.107     ; 2.987      ;
; 5.720 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.975      ;
; 5.721 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.974      ;
; 5.725 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.977      ;
; 5.727 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.974      ;
; 5.734 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.105     ; 2.962      ;
; 5.746 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.956      ;
; 5.749 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.952      ;
; 5.750 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.105     ; 2.946      ;
; 5.766 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.940      ;
; 5.776 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.926      ;
; 5.786 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.909      ;
; 5.787 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.108     ; 2.906      ;
; 5.790 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.912      ;
; 5.793 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.913      ;
; 5.795 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.108     ; 2.898      ;
; 5.800 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.895      ;
; 5.806 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.108     ; 2.887      ;
; 5.815 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.107     ; 2.879      ;
; 5.824 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.876      ;
; 5.828 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.878      ;
; 5.829 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.877      ;
; 5.840 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.855      ;
; 5.847 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.855      ;
; 5.847 ; chameleon_cdtv_remote:myIr|key_rew  ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.109     ; 2.845      ;
; 5.848 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 2.862      ;
; 5.859 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.852      ;
; 5.860 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.835      ;
; 5.861 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.846      ;
; 5.863 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.108     ; 2.830      ;
; 5.869 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.833      ;
; 5.869 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.836      ;
; 5.870 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.834      ;
; 5.875 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.825      ;
; 5.878 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.817      ;
; 5.889 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.811      ;
; 5.894 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.806      ;
; 5.895 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.098     ; 2.808      ;
; 5.897 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.798      ;
; 5.901 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.799      ;
; 5.901 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.810      ;
; 5.902 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.804      ;
; 5.904 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.796      ;
; 5.904 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.808      ;
; 5.908 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.799      ;
; 5.913 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 2.797      ;
; 5.914 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.791      ;
; 5.918 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.777      ;
; 5.920 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.107     ; 2.774      ;
; 5.920 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.780      ;
; 5.927 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 2.783      ;
; 5.936 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.107     ; 2.758      ;
; 5.937 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.087     ; 2.777      ;
; 5.942 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[2]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.769      ;
; 5.948 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.754      ;
; 5.948 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.758      ;
; 5.952 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.752      ;
; 5.952 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.743      ;
; 5.954 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.741      ;
; 5.955 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.747      ;
; 5.957 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.744      ;
; 5.958 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.098     ; 2.745      ;
; 5.959 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.743      ;
; 5.962 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 2.744      ;
; 5.972 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.728      ;
; 5.972 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.723      ;
; 5.979 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.723      ;
; 5.987 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.708      ;
; 5.993 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.711      ;
; 5.999 ; chameleon_cdtv_remote:myIr|key_play ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.702      ;
; 6.008 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.694      ;
; 6.017 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[1]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.694      ;
; 6.019 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.681      ;
; 6.033 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.671      ;
; 6.034 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[13] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.667      ;
; 6.034 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.678      ;
; 6.039 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.668      ;
; 6.046 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.086     ; 2.669      ;
; 6.049 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.653      ;
; 6.051 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.108     ; 2.642      ;
; 6.051 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.644      ;
; 6.059 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.636      ;
; 6.061 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.105     ; 2.635      ;
; 6.067 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.105     ; 2.629      ;
; 6.072 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.636      ;
; 6.072 ; chameleon_cdtv_remote:myIr|key_rew  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.106     ; 2.623      ;
; 6.081 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.098     ; 2.622      ;
; 6.090 ; chameleon_cdtv_remote:myIr|key_ff   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 2.620      ;
; 6.097 ; chameleon_cdtv_remote:myIr|key_play ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.089     ; 2.615      ;
+-------+-------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.113 ; chameleon_io:chameleon_io|ps2_keyboard_dat_in                                                                                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|ps2_dat_reg                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.097      ; 0.314      ;
; 0.138 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.468      ;
; 0.139 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.470      ;
; 0.140 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.467      ;
; 0.143 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.473      ;
; 0.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.475      ;
; 0.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.476      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.471      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.476      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.476      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.473      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.478      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.479      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.479      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.479      ;
; 0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.476      ;
; 0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.477      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.478      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.479      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.483      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.489      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.488      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.488      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.489      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.487      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.487      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.485      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.484      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.488      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.495      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.489      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.494      ;
; 0.167 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.492      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.499      ;
; 0.170 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.496      ;
; 0.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.502      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.501      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.505      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_last_enabled_reg                                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_last_enabled_reg                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[1]                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[1]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[2]                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[2]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[3]                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[3]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[20]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[12]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[12]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[25]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[28]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[31]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[0]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[0]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[1]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[1]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[3]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[3]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[2]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[2]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serial_ip_overrun_reg                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serial_ip_overrun_reg                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|odd_scanline_reg                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|odd_scanline_reg                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[7]                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[7]                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player0|count_reg[1]                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player0|count_reg[1]                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player0|shift_reg[7]                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player0|shift_reg[7]                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player0|shift_reg[0]                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player0|shift_reg[0]                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CA2_output_reg                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CA2_output_reg                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|antic_fetch_real_reg                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|antic_fetch_real_reg                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[2]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[2]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[2]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[2]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[2]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[2]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[1]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[1]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[1]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[1]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[1]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[1]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[1]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[1]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig1_reg                                                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig1_reg                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pf_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pf_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pf_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pf_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[0]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[0]                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig2_reg                                                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|trig2_reg                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[7]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[7]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[6]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[6]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[4]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[4]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[5]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|active_bk_modify_reg[5]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.186 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                        ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.037      ; 0.307      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                         ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                              ; To Node                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.186 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_IDLE                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                           ; chameleon_usb:usb|gen_usart:myUsart|receive_state.STATE_BITS                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[0]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[1]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[2]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                     ; chameleon_usb:usb|gen_usart:myUsart|receive_cnt[3]                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|state.STATE_RESET                                                                    ; chameleon_usb:usb|state.STATE_RESET                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|state.STATE_LEN1                                                                     ; chameleon_usb:usb|state.STATE_LEN1                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|state.STATE_LEN0                                                                     ; chameleon_usb:usb|state.STATE_LEN0                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; chameleon_usb:usb|state.STATE_ADDR2                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|state.STATE_ADDR1                                                                    ; chameleon_usb:usb|state.STATE_ADDR1                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|state.STATE_ADDR0                                                                    ; chameleon_usb:usb|state.STATE_ADDR0                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                     ; chameleon_usb:usb|gen_usart:myUsart|transmit_empty                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                 ; chameleon_usb:usb|state.STATE_READ_ACK                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[0]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                    ; chameleon_usb:usb|gen_usart:myUsart|transmit_cnt[3]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_BITS                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                          ; chameleon_usb:usb|gen_usart:myUsart|transmit_state.STATE_IDLE                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_usb:usb|req_reg                                                                              ; chameleon_usb:usb|req_reg                                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.188 ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.188 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.307      ;
; 0.193 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.314      ;
; 0.193 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.193 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.193 ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.194 ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|mux_toggle                                                                   ; chameleon_io:chameleon_io|mux_toggle                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[87]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.196 ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|rom_lh_n_reg   ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10]                                          ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10]                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.197 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; chameleon_io:chameleon_io|mux_state.MUX_D0WR                                                           ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[6]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[6]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.198 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[0]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|mux_state.MUX_IEC4                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC2H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[2]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[2]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[1]                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_cdtv_remote:myIr|shiftreg[5]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.199 ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_MMC7H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.319      ;
; 0.199 ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.319      ;
; 0.200 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[6]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[5]                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.320      ;
; 0.201 ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC3H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
; 0.201 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[7]                                                   ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[6]                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
; 0.201 ; chameleon_usb:usb|gen_usart:myUsart|receive_shift[7]                                                   ; chameleon_usb:usb|gen_usart:myUsart|q[7]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+-------+-----------+--------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                      ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+--------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.819 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.169     ; 2.764      ;
; 5.819 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.169     ; 2.764      ;
; 5.821 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.173     ; 2.758      ;
; 5.824 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.114     ; 2.816      ;
; 5.830 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 2.745      ;
; 5.830 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 2.745      ;
; 5.830 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.110     ; 2.814      ;
; 5.830 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.112     ; 2.812      ;
; 5.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.115     ; 2.808      ;
; 5.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.115     ; 2.808      ;
; 5.831 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.108     ; 2.815      ;
; 5.833 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.119     ; 2.802      ;
; 5.833 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.116     ; 2.805      ;
; 5.838 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.112     ; 2.804      ;
; 5.842 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 2.789      ;
; 5.842 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 2.789      ;
; 5.845 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 2.823      ;
; 5.845 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 2.823      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 2.802      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.109     ; 2.799      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.110     ; 2.798      ;
; 5.847 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.146     ; 2.759      ;
; 5.849 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 2.761      ;
; 5.849 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.141     ; 2.762      ;
; 5.849 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 2.761      ;
; 5.849 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 2.758      ;
; 5.849 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 2.758      ;
; 5.849 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.141     ; 2.762      ;
; 5.849 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 2.761      ;
; 5.849 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 2.761      ;
; 5.850 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.144     ; 2.758      ;
; 5.850 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.144     ; 2.758      ;
; 5.852 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.105     ; 2.797      ;
; 5.852 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.105     ; 2.797      ;
; 5.859 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.803      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.087     ; 2.806      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.805      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.805      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 2.802      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 2.802      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.805      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.805      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.087     ; 2.806      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.805      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 2.804      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.803      ;
; 5.861 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.803      ;
; 5.862 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.802      ;
; 5.862 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.802      ;
; 5.862 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 2.803      ;
; 5.862 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 2.803      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.605      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.605      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.605      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.605      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.603      ;
; 6.106 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 2.605      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.112 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.606      ;
; 6.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 2.614      ;
; 6.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 2.614      ;
; 6.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 2.614      ;
; 6.117 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 2.614      ;
; 6.118 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 2.613      ;
; 6.118 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 2.613      ;
; 6.118 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 2.612      ;
; 6.118 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 2.614      ;
; 6.118 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 2.614      ;
; 6.118 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 2.614      ;
; 6.118 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 2.614      ;
; 6.118 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 2.614      ;
; 6.118 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 2.614      ;
; 6.118 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.069     ; 2.614      ;
+-------+-----------+--------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                    ;
+--------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node ; To Node                                                                                                                                           ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 14.055 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[4]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.536      ;
; 14.055 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[14]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.536      ;
; 14.055 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.536      ;
; 14.055 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.536      ;
; 14.055 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.536      ;
; 14.055 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.536      ;
; 14.060 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.525      ;
; 14.060 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.525      ;
; 14.060 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.525      ;
; 14.064 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[2]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.519      ;
; 14.064 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[3]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 3.519      ;
; 14.086 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.499      ;
; 14.090 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.495      ;
; 14.090 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.495      ;
; 14.090 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.495      ;
; 14.091 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.500      ;
; 14.091 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.500      ;
; 14.091 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.500      ;
; 14.096 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.026     ; 3.493      ;
; 14.096 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.026     ; 3.493      ;
; 14.096 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.026     ; 3.493      ;
; 14.096 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.026     ; 3.493      ;
; 14.096 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.026     ; 3.493      ;
; 14.096 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.026     ; 3.493      ;
; 14.097 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.494      ;
; 14.097 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.494      ;
; 14.097 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_ready_reg                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.024     ; 3.494      ;
; 14.257 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.317      ;
; 14.257 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.317      ;
; 14.257 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.317      ;
; 14.257 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|key_held_reg  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.317      ;
; 14.267 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[1]                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.315      ;
; 14.267 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[0]                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.315      ;
; 14.267 ; reset_n   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.315      ;
; 14.270 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[11]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 3.306      ;
; 14.270 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[10]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 3.306      ;
; 14.271 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.035     ; 3.309      ;
; 14.271 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.035     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[0]                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.031     ; 3.311      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[1]                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.031     ; 3.311      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[30]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 3.304      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[31]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 3.304      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[28]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 3.304      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[29]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 3.304      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[27]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[26]                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 3.304      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[2]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[3]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[4]                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|enabled_out_reg                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.313      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.313      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[0]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[3]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[6]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[4]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[4]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[5]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[5]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[6]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[7]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[7]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.030     ; 3.312      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.313      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.313      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[6]                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.313      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:serout_clock_delay|shift_reg[1]                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.313      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:serout_clock_delay|shift_reg[0]                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.313      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_reg                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.313      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_last_reg                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.313      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_full_reg                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.029     ; 3.313      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[4]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[9]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[7]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[8]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[6]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[7]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[6]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[5]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[3]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
; 14.273 ; reset_n   ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_shift_reg[4]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 3.309      ;
+--------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.806 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.209      ; 1.105      ;
; 0.806 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.209      ; 1.105      ;
; 0.806 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.209      ; 1.105      ;
; 0.806 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.209      ; 1.105      ;
; 0.806 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.209      ; 1.105      ;
; 0.806 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.209      ; 1.105      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.833 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.180      ; 1.103      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 0.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 1.154      ;
; 1.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.435      ;
; 1.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.435      ;
; 1.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.435      ;
; 1.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.435      ;
; 1.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.435      ;
; 1.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.435      ;
; 1.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.210      ; 1.435      ;
; 2.179 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[17]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.327      ;
; 2.179 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[1]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.327      ;
; 2.179 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[20]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.327      ;
; 2.179 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[12]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.327      ;
; 2.179 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[4]                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.327      ;
; 2.179 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[25]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.327      ;
; 2.179 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[28]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.327      ;
; 2.179 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[31]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.327      ;
; 2.179 ; reset_n                                                                                                                                                                             ; reconfig_reg                                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.068      ; 2.331      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[0]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.060      ; 2.324      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[1]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.060      ; 2.324      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[2]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.060      ; 2.324      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[3]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.060      ; 2.324      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[4]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.062      ; 2.326      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[5]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.062      ; 2.326      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[6]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.062      ; 2.326      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[7]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.062      ; 2.326      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[8]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.062      ; 2.326      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|count_reg[9]                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.062      ; 2.326      ;
; 2.180 ; reset_n                                                                                                                                                                             ; enable_divider:my10hz|enabled_out_reg                                                                                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.060      ; 2.324      ;
; 2.180 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[13]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.328      ;
; 2.180 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[14]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.328      ;
; 2.180 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[15]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.064      ; 2.328      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 2.113 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.331      ;
; 2.113 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.331      ;
; 2.113 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.331      ;
; 2.113 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.331      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.113      ; 2.331      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.113      ; 2.331      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.112      ; 2.330      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.114      ; 2.332      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.113      ; 2.331      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.113      ; 2.331      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.113      ; 2.331      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.113      ; 2.331      ;
; 2.114 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.113      ; 2.331      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.120 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.323      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 2.323      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 2.323      ;
; 2.126 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.321      ;
; 2.127 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 2.323      ;
; 2.127 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 2.323      ;
; 2.127 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 2.323      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 2.533      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.532      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 2.530      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.529      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.529      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 2.530      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.532      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.100      ; 2.533      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.532      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 2.531      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 2.530      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 2.531      ;
; 2.355 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.097      ; 2.530      ;
; 2.356 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.533      ;
; 2.356 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.099      ; 2.533      ;
; 2.356 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 2.532      ;
; 2.357 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.095      ; 2.530      ;
; 2.368 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 2.527      ;
; 2.368 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.081      ; 2.527      ;
; 2.369 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.549      ;
; 2.369 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.549      ;
; 2.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 2.532      ;
; 2.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.077      ; 2.529      ;
; 2.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 2.528      ;
; 2.379 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 2.520      ;
; 2.379 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.063      ; 2.520      ;
; 2.382 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 2.534      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.044      ; 2.477      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.043      ; 2.476      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.041      ; 2.474      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.040      ; 2.473      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.040      ; 2.473      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.044      ; 2.477      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.041      ; 2.474      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.043      ; 2.476      ;
; 2.384 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.043      ; 2.477      ;
; 2.384 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.043      ; 2.477      ;
; 2.385 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.039      ; 2.474      ;
; 2.385 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 2.529      ;
; 2.385 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 2.542      ;
; 2.386 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 2.535      ;
; 2.386 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 2.535      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                      ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                 ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------+
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[0]                       ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[1]                       ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[2]                       ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[3]                       ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[4]                       ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[5]                       ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[6]                       ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[1]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[0]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[10]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[11]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[12]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[13]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[1]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[2]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[3]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[4]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[5]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[6]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[7]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[8]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|bitlength[9]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[0]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[13]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[14]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[15]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[16]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[4]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|button_reset_n                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|c64_data_reg[2]                                                              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[0]                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[1]                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[2]                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[8]                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[7]                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|we                         ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[0]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[1]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[2]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[3]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[4]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[5]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[6]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[7]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_dly ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_reg ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|irq_q_reg      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|rom_lh_n_reg   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[82]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[83]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[84]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[87]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[96]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[97]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[99]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[0]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[1]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[2]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[3]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[4]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[5]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[6]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|docking_station                              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|no_clock                                     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[0]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[7]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phiSync                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                        ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type            ; Clock                                           ; Clock Edge ; Target                                                                                                                                                                                                                                    ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_address_reg0   ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_address_reg0  ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a10~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a11~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a14~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a17~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a1~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a20~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a22~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a5~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a6~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a7~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                               ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                           ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~portb_address_reg0   ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~portb_address_reg0  ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a21~porta_address_reg0                                                                                                                                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32~porta_datain_reg0   ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer:pokey_mixer_r|altsyncram:Ram0_rtl_0|altsyncram_kt71:auto_generated|ram_block1a7~porta_address_reg0                                                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a3~porta_address_reg0                                                                                                                                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                           ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                           ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                          ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                            ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26                     ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'clk8'                                                                                            ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.123  ; 62.123       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.131  ; 62.131       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.869  ; 62.869       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.877  ; 62.877       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 1.347 ; 1.649 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 1.028 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 1.620 ; 1.855 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 1.566 ; 1.806 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 1.620 ; 1.855 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 1.254 ; 1.544 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 1.448 ; 1.690 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 1.145 ; 1.462 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 1.392 ; 1.651 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.603 ; 2.129 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.165 ; 1.613 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 1.190 ; 1.650 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.278 ; 1.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.603 ; 2.129 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.468 ; 1.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.522 ; 2.042 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.436 ; 1.930 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.159 ; 1.622 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.169 ; 1.640 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.430 ; 1.922 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 1.421 ; 1.906 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.459 ; 1.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.900 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.419 ; 1.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.428 ; 1.907 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.307 ; 1.772 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 1.622 ; 1.856 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 2.632 ; 2.804 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 2.390 ; 2.710 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 2.770 ; 3.409 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -0.983 ; -1.282 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -0.676 ; -1.014 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -0.888 ; -1.189 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.042 ; -1.320 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -0.948 ; -1.224 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -0.888 ; -1.189 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.005 ; -1.275 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -0.794 ; -1.113 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -1.018 ; -1.289 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.365 ; -0.741 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.368 ; -0.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.368 ; -0.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.356 ; -0.738 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.340 ; -0.722 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.340 ; -0.722 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.341 ; -0.723 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.346 ; -0.728 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.370 ; -0.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.370 ; -0.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -1.252 ; -1.492 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -1.260 ; -1.521 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -1.157 ; -1.404 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -2.350 ; -2.979 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 3.499 ; 3.327 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 3.499 ; 3.327 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 2.299 ; 2.195 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 2.306 ; 2.207 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 2.423 ; 2.315 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 2.214 ; 2.340 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 2.907 ; 2.711 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 2.890 ; 2.711 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 2.486 ; 2.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 2.530 ; 2.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.907 ; 2.686 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.606 ; 1.605 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.784 ; 1.856 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.601 ; 1.600 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.652 ; 1.673 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.775 ; 1.847 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.651 ; 1.672 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.651 ; 1.672 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.644 ; 1.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.642 ; 1.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.603 ; 1.602 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.642 ; 1.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.636 ; 1.657 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.511 ; 2.569 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.633 ; 1.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.650 ; 1.649 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.627 ; 1.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.626 ; 1.625 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.626 ; 1.625 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.625 ; 1.624 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.640 ; 1.639 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.598 ; 1.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.598 ; 1.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.618 ; 1.617 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.628 ; 1.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.627 ; 1.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.628 ; 1.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.568 ; 3.793 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 2.210 ; 2.307 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.610 ; 2.764 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.424 ; 2.565 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.568 ; 3.793 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.741 ; 2.922 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 2.455 ; 2.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 2.299 ; 2.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 2.455 ; 2.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 2.401 ; 2.541 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.332 ; 2.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.302 ; 2.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.915 ; 2.753 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.653 ; 2.519 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 3.264 ; 3.460 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 2.214 ; 2.310 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 2.208 ; 2.306 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 2.072 ; 2.176 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 3.264 ; 3.460 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 2.248 ; 2.361 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 2.794 ; 3.013 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.833 ; 3.043 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.697 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.738 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 2.023 ; 1.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 3.215 ; 3.047 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 2.023 ; 1.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 2.030 ; 1.935 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 2.143 ; 2.039 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 1.943 ; 2.066 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 2.203 ; 2.070 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 2.591 ; 2.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 2.203 ; 2.070 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 2.245 ; 2.116 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.607 ; 2.395 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.532 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.400 ; 1.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.523 ; 1.595 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.399 ; 1.420 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.399 ; 1.420 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.392 ; 1.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.351 ; 1.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.385 ; 1.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.259 ; 2.317 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.381 ; 1.402 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.397 ; 1.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.372 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.387 ; 1.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.365 ; 1.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 1.938 ; 2.031 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 1.938 ; 2.031 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.322 ; 2.470 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.144 ; 2.279 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.279 ; 3.497 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.448 ; 2.622 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 2.025 ; 2.152 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 2.025 ; 2.164 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 2.175 ; 2.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 2.120 ; 2.256 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.056 ; 2.170 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.028 ; 2.152 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.616 ; 2.460 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.364 ; 2.235 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 1.808 ; 1.909 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 1.942 ; 2.035 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 1.936 ; 2.030 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 1.808 ; 1.909 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 2.987 ; 3.178 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 1.974 ; 2.083 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 2.500 ; 2.711 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.537 ; 2.739 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.468 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.507 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.651 ; 3.648 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.210 ; 4.206 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.033 ; 4.029 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.033 ; 4.029 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.724 ; 3.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.716 ; 3.713 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.710 ; 3.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.812 ; 3.809 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.651 ; 3.648 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.651 ; 3.648 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.654 ; 3.651 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.812 ; 3.809 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.710 ; 3.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.717 ; 3.714 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.714 ; 3.711 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.861 ; 3.857 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.861 ; 3.857 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 2.516 ; 2.516 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.050 ; 3.050 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.880 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.880 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.587 ; 2.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.578 ; 2.578 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.573 ; 2.573 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.670 ; 2.670 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.516 ; 2.516 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.516 ; 2.516 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.519 ; 2.519 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.670 ; 2.670 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.573 ; 2.573 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.579 ; 2.579 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.577 ; 2.577 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.715 ; 2.715 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.715 ; 2.715 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.799     ; 3.799     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.441     ; 4.441     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.243     ; 4.243     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.243     ; 4.243     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.898     ; 3.898     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.876     ; 3.876     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.874     ; 3.874     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.005     ; 4.005     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.799     ; 3.799     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.799     ; 3.799     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.804     ; 3.804     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.005     ; 4.005     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.874     ; 3.874     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.875     ; 3.875     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.888     ; 3.888     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.046     ; 4.046     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.046     ; 4.046     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 2.658     ; 2.724     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.271     ; 3.329     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.082     ; 3.140     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.082     ; 3.140     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.754     ; 2.820     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.732     ; 2.798     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.730     ; 2.796     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.856     ; 2.922     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.658     ; 2.724     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.658     ; 2.724     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.663     ; 2.729     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.856     ; 2.922     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.730     ; 2.796     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.731     ; 2.797     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.744     ; 2.810     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.892     ; 2.950     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.892     ; 2.950     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


---------------------------------------------
; Fast 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                         ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+
; Clock                                            ; Setup ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+
; Worst-case Slack                                 ; 0.897 ; 0.113 ; 2.413    ; 0.806   ; 4.098               ;
;  clk8                                            ; N/A   ; N/A   ; N/A      ; N/A     ; 62.089              ;
;  pll|altpll_component|auto_generated|pll1|clk[0] ; 1.364 ; 0.186 ; 2.413    ; 2.113   ; 4.098               ;
;  pll|altpll_component|auto_generated|pll1|clk[1] ; 0.897 ; 0.113 ; 9.935    ; 0.806   ; 8.505               ;
; Design-wide TNS                                  ; 0.0   ; 0.0   ; 0.0      ; 0.0     ; 0.0                 ;
;  clk8                                            ; N/A   ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.676 ; 2.864 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.019 ; 2.176 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 3.151 ; 3.253 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 3.019 ; 3.102 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 3.151 ; 3.253 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.378 ; 2.539 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 2.787 ; 2.827 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 2.297 ; 2.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 2.741 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.542 ; 3.473 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.524 ; 2.460 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.582 ; 2.503 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.876 ; 2.749 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.542 ; 3.473 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.203 ; 3.228 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.344 ; 3.232 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.182 ; 3.065 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.513 ; 2.481 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.552 ; 2.490 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.159 ; 3.067 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.113 ; 3.027 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.207 ; 3.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.027 ; 3.009 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.052 ; 3.064 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.226 ; 3.104 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.882 ; 2.824 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; 3.113 ; 3.223 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; 5.430 ; 5.765 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; 5.143 ; 5.119 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 5.828 ; 6.080 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -0.983 ; -1.282 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -0.676 ; -1.014 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -0.888 ; -1.189 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.042 ; -1.320 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -0.948 ; -1.224 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -0.888 ; -1.189 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.005 ; -1.275 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -0.794 ; -1.113 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -1.018 ; -1.289 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.365 ; -0.583 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.368 ; -0.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.368 ; -0.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.356 ; -0.543 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.347 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.347 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.340 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.340 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.341 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.347 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.347 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.346 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.370 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.370 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_clk    ; clk8       ; -1.252 ; -1.492 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_rts    ; clk8       ; -1.260 ; -1.521 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; usart_tx     ; clk8       ; -1.157 ; -1.404 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -2.350 ; -2.979 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.662 ; 6.782 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.662 ; 6.782 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.718 ; 4.827 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.728 ; 4.828 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.962 ; 5.109 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 4.856 ; 4.777 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.905 ; 6.255 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.876 ; 6.255 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 5.150 ; 5.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 5.095 ; 5.337 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.905 ; 5.987 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.866 ; 4.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.702 ; 3.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.414 ; 3.376 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.502 ; 3.478 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.866 ; 4.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.694 ; 3.787 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.508 ; 3.484 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.508 ; 3.484 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.495 ; 3.471 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.416 ; 3.378 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.483 ; 3.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.838 ; 4.904 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.479 ; 3.455 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.503 ; 3.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.471 ; 3.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 7.404 ; 7.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.975 ; 4.741 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.813 ; 5.647 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 5.485 ; 5.286 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.404 ; 7.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.289 ; 5.912 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.455 ; 5.276 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 5.131 ; 5.000 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 5.455 ; 5.276 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 5.398 ; 5.173 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 5.135 ; 4.995 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.078 ; 4.915 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.863 ; 6.226 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.456 ; 5.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 6.741 ; 6.656 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.961 ; 4.749 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.974 ; 4.736 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.620 ; 4.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.741 ; 6.656 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 5.038 ; 4.889 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.278 ; 6.079 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.470 ; 6.139 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.272 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.119 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 2.023 ; 1.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 3.215 ; 3.047 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 2.023 ; 1.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 2.030 ; 1.935 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 2.143 ; 2.039 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 1.943 ; 2.066 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 2.203 ; 2.070 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 2.591 ; 2.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 2.203 ; 2.070 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 2.245 ; 2.116 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.607 ; 2.395 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.532 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.400 ; 1.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.523 ; 1.595 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.399 ; 1.420 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.399 ; 1.420 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.392 ; 1.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.351 ; 1.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.385 ; 1.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.259 ; 2.317 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.381 ; 1.402 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.397 ; 1.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.372 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.387 ; 1.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.365 ; 1.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 1.938 ; 2.031 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 1.938 ; 2.031 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.322 ; 2.470 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.144 ; 2.279 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.279 ; 3.497 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.448 ; 2.622 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 2.025 ; 2.152 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 2.025 ; 2.164 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 2.175 ; 2.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 2.120 ; 2.256 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.056 ; 2.170 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.028 ; 2.152 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.616 ; 2.460 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.364 ; 2.235 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 1.808 ; 1.909 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 1.942 ; 2.035 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 1.936 ; 2.030 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 1.808 ; 1.909 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 2.987 ; 3.178 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 1.974 ; 2.083 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 2.500 ; 2.711 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.537 ; 2.739 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.468 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.507 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; Pin         ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; red[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; nHSync      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; nVSync      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_clk      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[0]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[1]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[2]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[3]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[4]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[5]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[6]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[7]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[8]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[9]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[10] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[11] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[12] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ba_0     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ba_1     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_we_n     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ras_n    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_cas_n    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ldqm     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_udqm     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_clk     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[0]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[1]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[2]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[3]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sigmaL      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sigmaR      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[0]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[1]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[2]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[3]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[4]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[5]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[6]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[7]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[8]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[9]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[10] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[11] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[12] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[13] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[14] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[15] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+


+----------------------------------------------------------------+
; Input Transition Times                                         ;
+-------------+--------------+-----------------+-----------------+
; Pin         ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+-------------+--------------+-----------------+-----------------+
; freeze_n    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mmc_cd_n    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mmc_wp      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_cts   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[0]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[1]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[2]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[3]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[4]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[5]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[6]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[7]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[8]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[9]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[10] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[11] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[12] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[13] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[14] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[15] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; clk8        ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_rts   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[1]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_clk   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; phi2_n      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; dotclock_n  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; ioef_n      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; spi_miso    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[0]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[2]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[3]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_tx    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; romlh_n     ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
+-------------+--------------+-----------------+-----------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; red[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; red[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; red[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; red[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; red[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; grn[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; grn[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; blu[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; blu[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; nHSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; nVSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_clk      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.64e-07 V                   ; 2.34 V              ; -0.00283 V          ; 0.121 V                              ; 0.028 V                              ; 1.16e-09 s                  ; 1.21e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.64e-07 V                  ; 2.34 V             ; -0.00283 V         ; 0.121 V                             ; 0.028 V                             ; 1.16e-09 s                 ; 1.21e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.64e-07 V                   ; 2.34 V              ; -0.00283 V          ; 0.121 V                              ; 0.028 V                              ; 1.16e-09 s                  ; 1.21e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.64e-07 V                  ; 2.34 V             ; -0.00283 V         ; 0.121 V                             ; 0.028 V                             ; 1.16e-09 s                 ; 1.21e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_0     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_1     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_we_n     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ras_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_cas_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; sd_ldqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_udqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_clk     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; mux[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; mux[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sigmaL      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sigmaR      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_data[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; sd_data[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[13] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[14] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[15] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; red[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; red[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; red[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; red[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; red[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; grn[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; grn[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; blu[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; blu[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; nHSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; nVSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_clk      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 5.17e-08 V                   ; 2.68 V              ; -0.0186 V           ; 0.221 V                              ; 0.079 V                              ; 6.92e-10 s                  ; 7.39e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 5.17e-08 V                  ; 2.68 V             ; -0.0186 V          ; 0.221 V                             ; 0.079 V                             ; 6.92e-10 s                 ; 7.39e-10 s                 ; No                        ; Yes                       ;
; sd_addr[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_addr[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 5.17e-08 V                   ; 2.68 V              ; -0.0186 V           ; 0.221 V                              ; 0.079 V                              ; 6.92e-10 s                  ; 7.39e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 5.17e-08 V                  ; 2.68 V             ; -0.0186 V          ; 0.221 V                             ; 0.079 V                             ; 6.92e-10 s                 ; 7.39e-10 s                 ; No                        ; Yes                       ;
; sd_addr[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_addr[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_0     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_1     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_we_n     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ras_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_cas_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; sd_ldqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_udqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_clk     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; mux[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; mux[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sigmaL      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sigmaR      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_data[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; sd_data[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[13] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[14] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[15] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                               ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8943     ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 160      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 495      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 4605838  ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8943     ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 160      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 495      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 4605838  ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                                                            ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 109      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 9107     ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                                                             ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 109      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 9107     ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 0     ; 0    ;
; Unconstrained Input Ports       ; 28    ; 28   ;
; Unconstrained Input Port Paths  ; 84    ; 84   ;
; Unconstrained Output Ports      ; 64    ; 64   ;
; Unconstrained Output Port Paths ; 80    ; 80   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Tue Jul 29 23:09:26 2014
Info: Command: quartus_sta atari800core -c atari800core
Info: qsta_default_script.tcl version: #1
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (21077): Core supply voltage is 1.2V
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Info (332104): Reading SDC File: 'atari800core.sdc'
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 156 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[0]} {pll|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 78 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[1]} {pll|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 156 -phase 180.00 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[2]} {pll|altpll_component|auto_generated|pll1|clk[2]}
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow 1200mV 85C Model
Info (332146): Worst-case setup slack is 0.897
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.897         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.364         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.356
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.356         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.454         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 2.413
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     2.413         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     9.935         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.865
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.865         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     4.696         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.098
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.098         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.505         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.409         0.000 clk8 
Info: Analyzing Slow 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 1.561
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.561         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.760         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.341
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.341         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.402         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 2.850
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     2.850         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    10.374         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.694
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.694         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     4.220         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.101
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.101         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.508         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.394         0.000 clk8 
Info: Analyzing Fast 1200mV 0C Model
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 5.456
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.456         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     5.552         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case hold slack is 0.113
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.113         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.186         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 5.819
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.819         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    14.055         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 0.806
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.806         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     2.113         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.189
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.189         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.561         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.089         0.000 clk8 
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 504 megabytes
    Info: Processing ended: Tue Jul 29 23:09:59 2014
    Info: Elapsed time: 00:00:33
    Info: Total CPU time (on all processors): 00:00:28


