TimeQuest Timing Analyzer report for atari800core
Mon Jul 21 22:11:30 2014
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow 1200mV 85C Model Fmax Summary
  7. Timing Closure Recommendations
  8. Slow 1200mV 85C Model Setup Summary
  9. Slow 1200mV 85C Model Hold Summary
 10. Slow 1200mV 85C Model Recovery Summary
 11. Slow 1200mV 85C Model Removal Summary
 12. Slow 1200mV 85C Model Minimum Pulse Width Summary
 13. Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 14. Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 15. Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 16. Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 17. Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 18. Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 19. Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 20. Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 21. Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 22. Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 23. Slow 1200mV 85C Model Minimum Pulse Width: 'clk8'
 24. Setup Times
 25. Hold Times
 26. Clock to Output Times
 27. Minimum Clock to Output Times
 28. Output Enable Times
 29. Minimum Output Enable Times
 30. Output Disable Times
 31. Minimum Output Disable Times
 32. Slow 1200mV 85C Model Metastability Report
 33. Slow 1200mV 0C Model Fmax Summary
 34. Slow 1200mV 0C Model Setup Summary
 35. Slow 1200mV 0C Model Hold Summary
 36. Slow 1200mV 0C Model Recovery Summary
 37. Slow 1200mV 0C Model Removal Summary
 38. Slow 1200mV 0C Model Minimum Pulse Width Summary
 39. Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 40. Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 41. Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 42. Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 43. Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 44. Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 45. Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 46. Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 47. Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 48. Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 49. Slow 1200mV 0C Model Minimum Pulse Width: 'clk8'
 50. Setup Times
 51. Hold Times
 52. Clock to Output Times
 53. Minimum Clock to Output Times
 54. Output Enable Times
 55. Minimum Output Enable Times
 56. Output Disable Times
 57. Minimum Output Disable Times
 58. Slow 1200mV 0C Model Metastability Report
 59. Fast 1200mV 0C Model Setup Summary
 60. Fast 1200mV 0C Model Hold Summary
 61. Fast 1200mV 0C Model Recovery Summary
 62. Fast 1200mV 0C Model Removal Summary
 63. Fast 1200mV 0C Model Minimum Pulse Width Summary
 64. Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 65. Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 66. Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 67. Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 68. Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 69. Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 70. Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 71. Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 72. Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 73. Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 74. Fast 1200mV 0C Model Minimum Pulse Width: 'clk8'
 75. Setup Times
 76. Hold Times
 77. Clock to Output Times
 78. Minimum Clock to Output Times
 79. Output Enable Times
 80. Minimum Output Enable Times
 81. Output Disable Times
 82. Minimum Output Disable Times
 83. Fast 1200mV 0C Model Metastability Report
 84. Multicorner Timing Analysis Summary
 85. Setup Times
 86. Hold Times
 87. Clock to Output Times
 88. Minimum Clock to Output Times
 89. Board Trace Model Assignments
 90. Input Transition Times
 91. Slow Corner Signal Integrity Metrics
 92. Fast Corner Signal Integrity Metrics
 93. Setup Transfers
 94. Hold Transfers
 95. Recovery Transfers
 96. Removal Transfers
 97. Report TCCS
 98. Report RSKM
 99. Unconstrained Paths
100. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; atari800core                                                      ;
; Device Family      ; Cyclone III                                                       ;
; Device Name        ; EP3C25E144C8                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Enabled                                                           ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.14        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;  13.6%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------+
; SDC File List                                        ;
+------------------+--------+--------------------------+
; SDC File Path    ; Status ; Read at                  ;
+------------------+--------+--------------------------+
; atari800core.sdc ; OK     ; Mon Jul 21 22:11:11 2014 ;
+------------------+--------+--------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                             ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+
; Clock Name                                      ; Type      ; Period  ; Frequency  ; Rise  ; Fall   ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source                                            ; Targets                                             ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+
; clk8                                            ; Base      ; 125.000 ; 8.0 MHz    ; 0.000 ; 62.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;                                                   ; { clk8 }                                            ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 8.814   ; 113.46 MHz ; 0.000 ; 4.407  ; 50.00      ; 11        ; 156         ;       ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[0] } ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 17.628  ; 56.73 MHz  ; 0.000 ; 8.814  ; 50.00      ; 11        ; 78          ;       ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[1] } ;
; pll|altpll_component|auto_generated|pll1|clk[2] ; Generated ; 8.814   ; 113.46 MHz ; 4.407 ; 8.814  ; 50.00      ; 11        ; 156         ; 180.0 ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[2] } ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Fmax Summary                                                    ;
+------------+-----------------+-------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                      ; Note ;
+------------+-----------------+-------------------------------------------------+------+
; 62.35 MHz  ; 62.35 MHz       ; pll|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 137.55 MHz ; 137.55 MHz      ; pll|altpll_component|auto_generated|pll1|clk[0] ;      ;
+------------+-----------------+-------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


----------------------------------
; Timing Closure Recommendations ;
----------------------------------
HTML report is unavailable in plain text report export.


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup Summary                                     ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.073 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 1.544 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.404 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.454 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery Summary                                  ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 2.263 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 9.007 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal Summary                                   ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.606 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.678 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width Summary                        ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.099  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.501  ; 0.000         ;
; clk8                                            ; 62.409 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                   ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.073 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 7.546      ;
; 1.292 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 7.327      ;
; 1.378 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.198     ; 7.239      ;
; 1.398 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 7.233      ;
; 1.470 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 7.149      ;
; 1.481 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.185     ; 7.149      ;
; 1.529 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.214     ; 7.072      ;
; 1.536 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 7.083      ;
; 1.544 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.219     ; 7.052      ;
; 1.590 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.944     ;
; 1.596 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.211     ; 7.008      ;
; 1.602 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.930     ;
; 1.623 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.205     ; 6.987      ;
; 1.653 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.211     ; 6.951      ;
; 1.666 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.195     ; 6.954      ;
; 1.692 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.205     ; 6.918      ;
; 1.727 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.131     ; 15.771     ;
; 1.766 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.766     ;
; 1.796 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.211     ; 6.808      ;
; 1.802 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.817      ;
; 1.805 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.814      ;
; 1.826 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.796      ;
; 1.839 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.205     ; 6.771      ;
; 1.851 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.133     ; 15.645     ;
; 1.869 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; 0.279      ; 7.225      ;
; 1.871 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.214     ; 6.730      ;
; 1.888 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.731      ;
; 1.889 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.645     ;
; 1.898 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; 0.297      ; 7.214      ;
; 1.900 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.719      ;
; 1.901 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.631     ;
; 1.910 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.624     ;
; 1.912 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.622     ;
; 1.920 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.614     ;
; 1.924 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.608     ;
; 1.932 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.600     ;
; 1.950 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.203     ; 6.662      ;
; 1.954 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; 0.279      ; 7.140      ;
; 1.954 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 15.575     ;
; 1.960 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.223     ; 6.632      ;
; 1.964 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 15.549     ;
; 1.965 ; reset_n                                                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 15.581     ;
; 2.013 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.133     ; 15.483     ;
; 2.026 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.204     ; 6.585      ;
; 2.029 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.503     ;
; 2.032 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.131     ; 15.466     ;
; 2.033 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.188     ; 6.594      ;
; 2.060 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.559      ;
; 2.065 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.554      ;
; 2.065 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.467     ;
; 2.078 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.541      ;
; 2.087 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.203     ; 6.525      ;
; 2.088 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.444     ;
; 2.088 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.118     ; 15.423     ;
; 2.096 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.436     ;
; 2.115 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.213     ; 6.487      ;
; 2.116 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.418     ;
; 2.118 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[1]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.416     ;
; 2.119 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[3]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.415     ;
; 2.128 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.404     ;
; 2.130 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[1]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.402     ;
; 2.131 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[3]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.401     ;
; 2.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 15.366     ;
; 2.180 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.205     ; 6.430      ;
; 2.186 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 15.345     ;
; 2.194 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[0]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.340     ;
; 2.196 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|read_en_r                                                                                   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 15.357     ;
; 2.202 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 15.326     ;
; 2.206 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 15.325     ;
; 2.206 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[0]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.326     ;
; 2.206 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|read_en_r                                                                                   ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 15.342     ;
; 2.209 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.325     ;
; 2.215 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.317     ;
; 2.216 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.214     ; 6.385      ;
; 2.232 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.302     ;
; 2.233 ; reset_n                                                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 15.296     ;
; 2.235 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.204     ; 6.376      ;
; 2.240 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.294     ;
; 2.250 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.118     ; 15.261     ;
; 2.253 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 15.276     ;
; 2.256 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 15.268     ;
; 2.264 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.208     ; 6.343      ;
; 2.264 ; reset_n                                                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 15.282     ;
; 2.267 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.352      ;
; 2.269 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.353      ;
; 2.269 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.353      ;
; 2.269 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 15.244     ;
; 2.271 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[13] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.351      ;
; 2.274 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.204     ; 6.337      ;
; 2.276 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 15.253     ;
; 2.276 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.133     ; 15.220     ;
; 2.284 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 6.338      ;
; 2.284 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 15.245     ;
; 2.287 ; reset_n                                                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 15.259     ;
; 2.289 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.222     ; 6.304      ;
; 2.292 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.240     ;
; 2.294 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[1]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.238     ;
; 2.295 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[3]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 15.237     ;
; 2.295 ; reset_n                                                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 15.251     ;
; 2.297 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.196     ; 6.322      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                             ;
+-------+---------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                           ; To Node                                         ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.544 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 7.041      ;
; 1.604 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 6.981      ;
; 1.635 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 6.901      ;
; 1.646 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 6.947      ;
; 1.679 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 6.857      ;
; 1.680 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 6.913      ;
; 1.711 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk ; chameleon_io:chameleon_io|mux_d_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.179     ; 6.925      ;
; 1.756 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.141     ; 6.788      ;
; 1.759 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 6.777      ;
; 1.775 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 6.818      ;
; 1.798 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 6.795      ;
; 1.840 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.857      ;
; 1.863 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.141     ; 6.681      ;
; 1.887 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 6.649      ;
; 1.988 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 6.546      ;
; 1.998 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 6.595      ;
; 2.007 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 6.529      ;
; 2.015 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.591      ;
; 2.044 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 6.499      ;
; 2.054 ; chameleon_cdtv_remote:myIr|timer[7]                                 ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.643      ;
; 2.069 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 6.465      ;
; 2.076 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.464      ;
; 2.088 ; chameleon_cdtv_remote:myIr|timer[4]                                 ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.609      ;
; 2.098 ; chameleon_cdtv_remote:myIr|timer[3]                                 ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 6.611      ;
; 2.099 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[13] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 6.508      ;
; 2.105 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 6.423      ;
; 2.127 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.116     ; 6.572      ;
; 2.147 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 6.400      ;
; 2.153 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 6.390      ;
; 2.157 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.540      ;
; 2.158 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.539      ;
; 2.158 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.539      ;
; 2.164 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.153     ; 6.368      ;
; 2.165 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.152     ; 6.368      ;
; 2.165 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.134     ; 6.386      ;
; 2.167 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 6.361      ;
; 2.182 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                 ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 6.404      ;
; 2.194 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.141     ; 6.350      ;
; 2.203 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 6.390      ;
; 2.212 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                 ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 6.317      ;
; 2.224 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.153     ; 6.308      ;
; 2.225 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.152     ; 6.308      ;
; 2.226 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.508      ;
; 2.226 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.508      ;
; 2.226 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|state.STATE_START    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.508      ;
; 2.249 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 6.279      ;
; 2.265 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.144     ; 6.276      ;
; 2.267 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.144     ; 6.274      ;
; 2.272 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.134     ; 6.279      ;
; 2.281 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.153     ; 6.251      ;
; 2.296 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 6.247      ;
; 2.300 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.240      ;
; 2.316 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 6.218      ;
; 2.318 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 6.218      ;
; 2.325 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|ldqm_reg       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 6.260      ;
; 2.338 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                       ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 6.198      ;
; 2.341 ; chameleon_cdtv_remote:myIr|timer[7]                                 ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.116     ; 6.358      ;
; 2.341 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.153     ; 6.191      ;
; 2.353 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|ba_reg[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 6.226      ;
; 2.358 ; chameleon_cdtv_remote:myIr|timer[0]                                 ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 6.351      ;
; 2.370 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 6.166      ;
; 2.371 ; chameleon_cdtv_remote:myIr|timer[7]                                 ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.326      ;
; 2.372 ; chameleon_cdtv_remote:myIr|timer[7]                                 ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.325      ;
; 2.372 ; chameleon_cdtv_remote:myIr|timer[7]                                 ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.325      ;
; 2.375 ; chameleon_cdtv_remote:myIr|timer[4]                                 ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.116     ; 6.324      ;
; 2.375 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 6.151      ;
; 2.382 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|ba_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 6.203      ;
; 2.383 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.157      ;
; 2.385 ; chameleon_cdtv_remote:myIr|timer[3]                                 ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.104     ; 6.326      ;
; 2.386 ; chameleon_cdtv_remote:myIr|bitlength[0]                             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 6.353      ;
; 2.386 ; chameleon_cdtv_remote:myIr|bitlength[0]                             ; chameleon_cdtv_remote:myIr|state.STATE_LOW      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 6.353      ;
; 2.386 ; chameleon_cdtv_remote:myIr|bitlength[0]                             ; chameleon_cdtv_remote:myIr|state.STATE_START    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 6.353      ;
; 2.388 ; chameleon_cdtv_remote:myIr|bitlength[3]                             ; chameleon_cdtv_remote:myIr|state.STATE_HIGH     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 6.351      ;
; 2.388 ; chameleon_cdtv_remote:myIr|bitlength[3]                             ; chameleon_cdtv_remote:myIr|state.STATE_LOW      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 6.351      ;
; 2.388 ; chameleon_cdtv_remote:myIr|bitlength[3]                             ; chameleon_cdtv_remote:myIr|state.STATE_START    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 6.351      ;
; 2.395 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                       ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.145      ;
; 2.396 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                       ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.144     ; 6.145      ;
; 2.404 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.136      ;
; 2.405 ; chameleon_cdtv_remote:myIr|timer[4]                                 ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.292      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[2]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[3]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[6]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[7]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[8]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[9]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[10]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[11]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[12]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[13]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|bitlength[5]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 6.324      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[4]                                 ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.291      ;
; 2.406 ; chameleon_cdtv_remote:myIr|timer[4]                                 ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 6.291      ;
; 2.415 ; chameleon_cdtv_remote:myIr|timer[3]                                 ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 6.294      ;
; 2.415 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.191      ;
; 2.416 ; chameleon_cdtv_remote:myIr|timer[3]                                 ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 6.293      ;
; 2.416 ; chameleon_cdtv_remote:myIr|timer[3]                                 ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 6.293      ;
; 2.417 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.123      ;
+-------+---------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
+-------+--------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                        ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.404 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][3]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.141      ;
; 0.405 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][5]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.142      ;
; 0.406 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][5]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.143      ;
; 0.406 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][7]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.140      ;
; 0.412 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][2]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.149      ;
; 0.413 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][0]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.150      ;
; 0.414 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:nmien_delay|shift_reg[31][1]                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.150      ;
; 0.415 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][4]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.152      ;
; 0.415 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][6]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.153      ;
; 0.418 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][4]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.155      ;
; 0.421 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][1]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.160      ;
; 0.421 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][5]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.155      ;
; 0.421 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][3]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.160      ;
; 0.422 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][1]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.156      ;
; 0.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][6]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.160      ;
; 0.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][7]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.157      ;
; 0.423 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][3]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.161      ;
; 0.426 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][0]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.163      ;
; 0.428 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][2]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.487      ; 1.169      ;
; 0.429 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][2]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.165      ;
; 0.430 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][2]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.163      ;
; 0.432 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.169      ;
; 0.432 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.166      ;
; 0.432 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][0]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.168      ;
; 0.433 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][3]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.172      ;
; 0.436 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][6]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.170      ;
; 0.438 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[10]                                                                                     ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.474      ; 1.166      ;
; 0.440 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][1]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.179      ;
; 0.441 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][3]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.179      ;
; 0.442 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[8]                                                                                      ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.474      ; 1.170      ;
; 0.443 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][7]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.177      ;
; 0.443 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:nmien_delay|shift_reg[31][0]                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.182      ;
; 0.444 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][0]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.178      ;
; 0.446 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][1]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.185      ;
; 0.449 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][4]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.186      ;
; 0.452 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][0]                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.190      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hblank_reg                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hblank_reg                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][1]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.189      ;
; 0.453 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[2]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[2]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[1]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[1]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                                                ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[0]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                              ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|pending_extended_reg                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|pending_extended_reg                                                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|pending_keyup_reg                                                                           ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|pending_keyup_reg                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[20]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[20]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[89]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[89]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[0]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[0]                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[1]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[1]                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[7]                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[7]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[93]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[93]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[91]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[91]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[21]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[21]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[28]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[28]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[27]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[27]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[84]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[84]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[29]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[29]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[30]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[30]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[74]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[74]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[34]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[34]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[82]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[82]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[33]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[33]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[54]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[54]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[5]                                                                                                    ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[5]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                                    ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[59]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[59]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[41]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[41]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[42]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[42]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[75]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[75]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[68]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[68]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[43]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[43]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[51]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[51]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[67]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[67]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[90]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[90]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[6]                                                                                                    ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[6]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[66]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[66]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[13]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[13]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[44]                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[44]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|nmiReg                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|nmiReg                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[6]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[6]                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|write_enable_reg                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|write_enable_reg                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[9]                                                                                                    ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[9]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[1]                                                                                                    ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[1]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[5]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[5]                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[2]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[2]                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[3]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[3]                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|idle_reg[1]                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|idle_reg[1]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
+-------+--------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                        ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                              ; To Node                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.454 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.466 ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.466 ; chameleon_io:chameleon_io|mux_toggle                                                                   ; chameleon_io:chameleon_io|mux_toggle                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.466 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.467 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.758      ;
; 0.501 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.793      ;
; 0.501 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.793      ;
; 0.501 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.793      ;
; 0.502 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.794      ;
; 0.502 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|mux_state.MUX_MMC7L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.794      ;
; 0.503 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.795      ;
; 0.504 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.504 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.796      ;
; 0.504 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.796      ;
; 0.504 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                    ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.795      ;
; 0.505 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.797      ;
; 0.510 ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.801      ;
; 0.510 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.801      ;
; 0.511 ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA1_B          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA2_B          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.803      ;
; 0.511 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[83]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[82]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.511 ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.512 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[82]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.512 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.803      ;
; 0.513 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.804      ;
; 0.513 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.804      ;
; 0.513 ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.804      ;
; 0.513 ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.804      ;
; 0.514 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[97]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[96]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.805      ;
; 0.518 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_MMC0L                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.810      ;
; 0.520 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.811      ;
; 0.520 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.811      ;
; 0.520 ; chameleon_io:chameleon_io|mux_state.MUX_RESET                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.812      ;
; 0.521 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|docking_station                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.812      ;
; 0.522 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[3]     ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|irq_q_reg      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.813      ;
; 0.527 ; chameleon_io:chameleon_io|mux_state.MUX_PS2                                                            ; chameleon_io:chameleon_io|mux_state.MUX_A2                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.819      ;
; 0.527 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA2_B          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.SET_COL              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.819      ;
; 0.527 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[99]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.819      ;
; 0.527 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.819      ;
; 0.527 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.819      ;
; 0.528 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC4H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.819      ;
; 0.528 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[7]     ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[7]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.819      ;
; 0.529 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_MOB     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.821      ;
; 0.529 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA2_B          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[1]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.821      ;
; 0.530 ; chameleon_io:chameleon_io|mux_state.MUX_ULTIMAX                                                        ; chameleon_io:chameleon_io|mux_state.MUX_MMC0H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.822      ;
; 0.535 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.STORE_JOY2           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.READ_JOY34           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.827      ;
; 0.538 ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.829      ;
; 0.546 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_LOW                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.838      ;
; 0.561 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[4]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.852      ;
; 0.562 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.853      ;
; 0.563 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.854      ;
; 0.564 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[1]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.855      ;
; 0.566 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|joystick_b[3]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.857      ;
; 0.571 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_b[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.862      ;
; 0.572 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|joystick_a[3]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.863      ;
; 0.577 ; chameleon_io:chameleon_io|mux_state.MUX_BUS                                                            ; chameleon_io:chameleon_io|mux_state.MUX_D0WR                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.868      ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                              ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 2.263 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.227     ; 6.195      ;
; 2.264 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.235     ; 6.186      ;
; 2.270 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.231     ; 6.184      ;
; 2.270 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.231     ; 6.184      ;
; 2.272 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.311     ; 6.090      ;
; 2.272 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.314     ; 6.087      ;
; 2.272 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.312     ; 6.089      ;
; 2.272 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.312     ; 6.089      ;
; 2.272 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.314     ; 6.087      ;
; 2.273 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.310     ; 6.090      ;
; 2.273 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.313     ; 6.087      ;
; 2.273 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.314     ; 6.086      ;
; 2.273 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.310     ; 6.090      ;
; 2.273 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.313     ; 6.087      ;
; 2.273 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.311     ; 6.089      ;
; 2.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.230     ; 6.179      ;
; 2.276 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.237     ; 6.172      ;
; 2.277 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.233     ; 6.175      ;
; 2.277 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.239     ; 6.169      ;
; 2.278 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 6.229      ;
; 2.278 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 6.229      ;
; 2.282 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.370     ; 6.021      ;
; 2.282 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.370     ; 6.021      ;
; 2.283 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.235     ; 6.167      ;
; 2.284 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.185     ; 6.216      ;
; 2.284 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.187     ; 6.214      ;
; 2.284 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.187     ; 6.214      ;
; 2.284 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.185     ; 6.216      ;
; 2.284 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 6.217      ;
; 2.284 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 6.217      ;
; 2.284 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.185     ; 6.216      ;
; 2.284 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.187     ; 6.214      ;
; 2.285 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.183     ; 6.217      ;
; 2.285 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 6.216      ;
; 2.285 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 6.214      ;
; 2.285 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.187     ; 6.213      ;
; 2.285 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 6.214      ;
; 2.285 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.183     ; 6.217      ;
; 2.285 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 6.214      ;
; 2.285 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 6.214      ;
; 2.285 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.186     ; 6.214      ;
; 2.287 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.374     ; 6.012      ;
; 2.288 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.366     ; 6.019      ;
; 2.288 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.366     ; 6.019      ;
; 2.294 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.243     ; 6.148      ;
; 2.294 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.243     ; 6.148      ;
; 2.295 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.220     ; 6.170      ;
; 2.299 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.247     ; 6.139      ;
; 2.300 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.239     ; 6.146      ;
; 2.300 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.239     ; 6.146      ;
; 2.302 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.232     ; 6.151      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.194     ; 5.642      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.979 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.196     ; 5.640      ;
; 2.980 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.657      ;
; 2.980 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.657      ;
; 2.981 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 5.657      ;
; 2.981 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 5.657      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.178     ; 5.652      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 5.653      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 5.653      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 5.653      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 5.653      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 5.653      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 5.653      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 5.653      ;
; 2.985 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 5.653      ;
; 2.986 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 5.645      ;
; 2.986 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 5.645      ;
; 2.986 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 5.645      ;
; 2.986 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 5.645      ;
; 2.986 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 5.645      ;
; 2.986 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 5.645      ;
; 2.986 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 5.645      ;
; 2.986 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 5.645      ;
; 2.986 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.184     ; 5.645      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                     ;
+-------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                                                                                                    ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 9.007 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 8.529      ;
; 9.272 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 8.286      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.123     ; 8.075      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.123     ; 8.075      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.123     ; 8.075      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[8]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.123     ; 8.075      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[12]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.123     ; 8.075      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 8.085      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 8.085      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[17]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 8.085      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[17]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 8.085      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 8.085      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 8.085      ;
; 9.431 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[18]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 8.085      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.120     ; 8.077      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[30]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.126     ; 8.071      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.126     ; 8.071      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.126     ; 8.071      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[13]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.124     ; 8.073      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.120     ; 8.077      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.120     ; 8.077      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.120     ; 8.077      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.126     ; 8.071      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.126     ; 8.071      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.126     ; 8.071      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.126     ; 8.071      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.124     ; 8.073      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.126     ; 8.071      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.121     ; 8.076      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[3]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.121     ; 8.076      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[6]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.126     ; 8.071      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[2]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.121     ; 8.076      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.121     ; 8.076      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[16]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.121     ; 8.076      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[17]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.121     ; 8.076      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[23]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[23]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[23]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[23]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[30]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[30]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[30]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[30]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[29]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[29]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[29]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[28]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[28]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[27]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[27]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[26]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[26]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 8.093      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[13]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[13]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 8.087      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 8.087      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|sio_in_reg                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 8.087      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 8.087      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 8.087      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 8.087      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 8.087      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_last_reg                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 8.087      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 8.084      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 8.087      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 8.087      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 8.083      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[1]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 8.083      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 8.083      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 8.083      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[4]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 8.083      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[5]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 8.083      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[6]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 8.083      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.119     ; 8.078      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.119     ; 8.078      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.119     ; 8.078      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.119     ; 8.078      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.119     ; 8.078      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.119     ; 8.078      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.119     ; 8.078      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.119     ; 8.078      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.119     ; 8.078      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.119     ; 8.078      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 8.094      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 8.084      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[11]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[10]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.107     ; 8.090      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[9]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.107     ; 8.090      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[8]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[7]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[6]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[5]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[4]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[3]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[2]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[1]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[0]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
; 9.432 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[16]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 8.081      ;
+-------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.249      ;
; 1.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.249      ;
; 1.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.249      ;
; 1.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.249      ;
; 1.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.249      ;
; 1.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.249      ;
; 1.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.249      ;
; 1.615 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 2.257      ;
; 1.615 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 2.257      ;
; 1.615 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 2.257      ;
; 1.615 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 2.257      ;
; 1.615 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 2.257      ;
; 1.615 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.431      ; 2.257      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.398      ; 2.595      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.396      ; 2.966      ;
; 4.781 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[24]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.126      ; 5.119      ;
; 4.781 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[9]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.130      ; 5.123      ;
; 4.781 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[1]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.130      ; 5.123      ;
; 4.781 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[10]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.130      ; 5.123      ;
; 4.781 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[2]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.130      ; 5.123      ;
; 4.781 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[11]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.130      ; 5.123      ;
; 4.781 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[3]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.130      ; 5.123      ;
; 4.781 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[6]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.130      ; 5.123      ;
; 4.781 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[7]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.130      ; 5.123      ;
; 4.782 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|sdram_request_reg                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.119      ; 5.113      ;
; 4.782 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|reply_sreg                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.119      ; 5.113      ;
; 4.782 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[17]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.118      ; 5.112      ;
; 4.782 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[18]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.118      ; 5.112      ;
; 4.782 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[19]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.118      ; 5.112      ;
; 4.782 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[0]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.125      ; 5.119      ;
; 4.789 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[12]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.123      ; 5.124      ;
; 4.789 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[11]                                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.120      ; 5.121      ;
; 4.789 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[2]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.120      ; 5.121      ;
; 4.789 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[1]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.120      ; 5.121      ;
; 4.794 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[0]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.105      ; 5.111      ;
; 4.798 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[20]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.125      ; 5.135      ;
; 4.798 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[89]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.123      ; 5.133      ;
; 4.798 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.123      ; 5.133      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.121      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.122      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.122      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.122      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.122      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.122      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.122      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.122      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.122      ;
; 4.678 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.204      ; 5.114      ;
; 4.679 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.122      ;
; 4.679 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.122      ;
; 4.679 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.122      ;
; 4.679 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.122      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.194      ; 5.112      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.686 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.192      ; 5.110      ;
; 4.688 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.132      ;
; 4.688 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.212      ; 5.132      ;
; 4.688 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.131      ;
; 4.688 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.211      ; 5.131      ;
; 5.229 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.582      ;
; 5.229 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.582      ;
; 5.229 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.582      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.210      ; 5.586      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.209      ; 5.585      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.208      ; 5.584      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 5.582      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 5.582      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 5.582      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.208      ; 5.584      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.209      ; 5.585      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.210      ; 5.586      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.209      ; 5.585      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.583      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.208      ; 5.584      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.207      ; 5.583      ;
; 5.230 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.206      ; 5.582      ;
; 5.236 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.215      ; 5.597      ;
; 5.236 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.215      ; 5.597      ;
; 5.256 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.159      ; 5.561      ;
; 5.264 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.143      ; 5.553      ;
; 5.265 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.172      ; 5.583      ;
; 5.267 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 5.565      ;
; 5.267 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.152      ; 5.565      ;
; 5.271 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 5.573      ;
; 5.273 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.148      ; 5.567      ;
; 5.273 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.148      ; 5.567      ;
; 5.278 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.158      ; 5.582      ;
; 5.279 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.162      ; 5.587      ;
; 5.279 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.154      ; 5.579      ;
; 5.280 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.151      ; 5.577      ;
; 5.288 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 5.594      ;
; 5.288 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.160      ; 5.594      ;
; 5.295 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.164      ; 5.605      ;
; 5.295 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.156      ; 5.597      ;
; 5.317 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 5.477      ;
; 5.317 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.075      ; 5.477      ;
; 5.318 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.077      ; 5.480      ;
; 5.318 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.078      ; 5.481      ;
; 5.318 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 5.477      ;
; 5.318 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.076      ; 5.479      ;
; 5.318 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 5.477      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                       ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[0]                                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[1]                                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[2]                                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[3]                                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[6]                                                                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_dly   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_reg   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|io_ef_n_reg      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[0] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[1] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[2] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[3] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick1_reg[4] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[0] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[1] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[2] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[3] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100]   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101]   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102]   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103]   ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[82]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[83]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[87]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[96]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[97]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[99]    ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[0]                                  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[0]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[10]                                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[11]                                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[12]                                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[13]                                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[14]                                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[15]                                                        ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[1]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[2]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[3]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[4]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[5]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[6]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[7]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[8]                                                         ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[9]                                                         ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[0]                                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[1]                                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[2]                                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[3]                                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[4]                                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[5]                                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[6]                                                                             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|ena_out                                                                            ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[0]                                                               ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[11]                                                              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[2]                                                               ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[7]                                                               ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[0]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[1]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[2]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[3]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[4]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[0]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[1]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[2]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[3]                                                                 ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_2                                                                         ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                                  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                                  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                   ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                   ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                   ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                   ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[0]       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[1]       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[2]       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[3]       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[4]       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[5]       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[6]       ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[7]       ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                                               ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------+
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36]              ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38]              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                           ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                           ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                           ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[2]                                                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[3]                                                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[4]                                                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[5]                                                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[6]                                                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[7]                                                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[8]                                                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_shift_reg[9]                                                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|fetched_w_r[15]                                                                ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|fetched_w_r[7]                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Vreg                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21]              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26]              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32]              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleEnd     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreRead ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[4]                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[5]                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[6]                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[1]                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[2]                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[3]                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[4]                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[5]                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[6]                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player2|shift_reg[7]                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[24]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[2]                                                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[31]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[5]                                                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[10]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[15]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[21]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[24]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[25]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[31]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[12]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[17]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[24]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[31]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[12]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[16]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[17]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[18]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[1]                                                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[24]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[31]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[5]                                                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[0]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[10]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[11]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[12]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[13]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[14]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[15]                                                                                ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[1]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[2]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[3]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[4]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[5]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[6]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[7]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[8]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[9]                                                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]                                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[3]                                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[4]                                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[5]                                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[6]                                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[7]                                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                                    ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[0]                                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[1]                                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[2]                                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[3]                                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[4]                                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[5]                                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[6]                                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[7]                                       ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1]           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[2]           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[0]                                    ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[11]                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[12]                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[13]                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[14]                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[15]                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[16]                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[1]                                    ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[2]                                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'clk8'                                                                                           ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.449  ; 62.449       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.481  ; 62.481       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.518  ; 62.518       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.551  ; 62.551       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.549 ; 2.757 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.422 ; 2.639 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 3.218 ; 3.271 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 3.218 ; 3.264 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 2.854 ; 2.913 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.944 ; 3.000 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 3.124 ; 3.271 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 2.349 ; 2.541 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 2.392 ; 2.639 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.339 ; 3.268 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.425 ; 2.295 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.903 ; 2.824 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.498 ; 2.383 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.228 ; 3.243 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.101 ; 3.033 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.518 ; 2.467 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.442 ; 2.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.786 ; 2.697 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.794 ; 2.802 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.851 ; 2.848 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.790 ; 2.796 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.650 ; 2.648 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.774 ; 2.717 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.272 ; 3.268 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.339 ; 3.238 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.263 ; 3.180 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 5.619 ; 5.843 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -1.780 ; -1.981 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -1.642 ; -1.841 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -1.913 ; -1.949 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -2.058 ; -2.075 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -1.913 ; -1.949 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -2.129 ; -2.198 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -2.273 ; -2.395 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -1.571 ; -1.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -1.603 ; -1.854 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.653 ; -0.702 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.644 ; -0.693 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.644 ; -0.693 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.606 ; -0.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.597 ; -0.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.598 ; -0.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.598 ; -0.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.597 ; -0.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.596 ; -0.644 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.658 ; -0.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.658 ; -0.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -4.706 ; -4.906 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.482 ; 6.559 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.482 ; 6.559 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.348 ; 4.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.597 ; 4.763 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.370 ; 4.494 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 5.900 ; 5.651 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.989 ; 6.243 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.739 ; 6.025 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.927 ; 5.026 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.881 ; 5.058 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.989 ; 6.243 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.821 ; 4.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.373 ; 3.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.653 ; 3.739 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.365 ; 3.320 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.454 ; 3.423 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.821 ; 4.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.637 ; 3.723 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.450 ; 3.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.450 ; 3.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.448 ; 3.417 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.810 ; 4.869 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.456 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.368 ; 3.323 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.456 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.433 ; 3.402 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.801 ; 4.860 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.442 ; 3.411 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.461 ; 3.404 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.449 ; 3.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.438 ; 3.381 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.449 ; 3.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.451 ; 3.394 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.357 ; 3.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.357 ; 3.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.428 ; 3.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.439 ; 3.382 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.438 ; 3.381 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 7.482 ; 7.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.339 ; 4.218 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 6.626 ; 6.346 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 5.462 ; 5.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.482 ; 7.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.849 ; 6.541 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.157 ; 4.994 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.778 ; 4.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.739 ; 4.632 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.707 ; 4.555 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 5.150 ; 4.947 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.157 ; 4.994 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.573 ; 5.741 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.076 ; 5.184 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 5.775 ; 5.802 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.084 ; 4.028 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.366 ; 4.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.063 ; 4.011 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 5.775 ; 5.802 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.684 ; 4.560 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.890 ; 6.736 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.663 ; 6.410 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.116 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.995 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 3.796 ; 3.889 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 5.906 ; 5.978 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 3.796 ; 3.889 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.036 ; 4.197 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 3.817 ; 3.938 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 5.289 ; 5.050 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 4.308 ; 4.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.132 ; 5.407 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.351 ; 4.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.308 ; 4.479 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.371 ; 5.617 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.847 ; 2.803 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 2.855 ; 2.811 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.134 ; 3.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 2.847 ; 2.803 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 2.936 ; 2.906 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.302 ; 4.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.119 ; 3.206 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 2.932 ; 2.902 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 2.932 ; 2.902 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 2.930 ; 2.900 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.293 ; 4.353 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 2.936 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 2.850 ; 2.806 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 2.936 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.370 ; 4.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.916 ; 2.886 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.283 ; 4.343 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.924 ; 2.894 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.941 ; 2.885 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.929 ; 2.873 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.918 ; 2.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.370 ; 4.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.929 ; 2.873 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.931 ; 2.875 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 2.908 ; 2.852 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 2.919 ; 2.863 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 2.918 ; 2.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.790 ; 3.673 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 3.790 ; 3.673 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.985 ; 5.714 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 4.866 ; 4.780 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 6.864 ; 6.754 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.198 ; 5.902 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 4.141 ; 3.994 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.214 ; 4.105 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.175 ; 4.072 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.141 ; 3.994 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.569 ; 4.375 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 4.576 ; 4.420 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.973 ; 5.136 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 4.496 ; 4.601 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 3.526 ; 3.476 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 3.544 ; 3.489 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 3.815 ; 3.710 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 3.526 ; 3.476 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 5.225 ; 5.254 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.119 ; 3.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.239 ; 6.091 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.023 ; 5.779 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 6.643 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.526 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.681 ; 4.681 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.765 ; 5.765 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.748 ; 5.748 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.748 ; 5.748 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.367 ; 5.367 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.425 ; 5.425 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.391 ; 5.391 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.689 ; 5.689 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.681 ; 4.681 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.681 ; 4.681 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.271 ; 5.271 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.689 ; 5.689 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.391 ; 5.391 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.373 ; 5.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.357 ; 5.357 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.700 ; 5.700 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.700 ; 5.700 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.569 ; 3.635 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.620 ; 4.680 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.604 ; 4.664 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.604 ; 4.664 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.229 ; 4.295 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.284 ; 4.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.251 ; 4.317 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.537 ; 4.603 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.569 ; 3.635 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.569 ; 3.635 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.135 ; 4.201 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.537 ; 4.603 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.251 ; 4.317 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.234 ; 4.300 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.219 ; 4.285 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.559 ; 4.619 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.559 ; 4.619 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.508     ; 4.645     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.560     ; 5.691     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.547     ; 5.678     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.547     ; 5.678     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.144     ; 5.281     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.196     ; 5.333     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.168     ; 5.305     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.407     ; 5.544     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.508     ; 4.645     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.508     ; 4.645     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.975     ; 5.112     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.407     ; 5.544     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.168     ; 5.305     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.154     ; 5.291     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.134     ; 5.271     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.438     ; 5.569     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.438     ; 5.569     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.535     ; 3.535     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.549     ; 4.549     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.536     ; 4.536     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.536     ; 4.536     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.146     ; 4.146     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.195     ; 4.195     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.168     ; 4.168     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.398     ; 4.398     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.535     ; 3.535     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.535     ; 3.535     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.983     ; 3.983     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.398     ; 4.398     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.168     ; 4.168     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.155     ; 4.155     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.136     ; 4.136     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.432     ; 4.432     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.432     ; 4.432     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


----------------------------------------------
; Slow 1200mV 85C Model Metastability Report ;
----------------------------------------------
No synchronizer chains to report.


+---------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Fmax Summary                                                     ;
+------------+-----------------+-------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                      ; Note ;
+------------+-----------------+-------------------------------------------------+------+
; 66.65 MHz  ; 66.65 MHz       ; pll|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 147.49 MHz ; 147.49 MHz      ; pll|altpll_component|auto_generated|pll1|clk[0] ;      ;
+------------+-----------------+-------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.558 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 2.034 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold Summary                                       ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.385 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.402 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery Summary                                   ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 2.680 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 9.697 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal Summary                                    ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.455 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.197 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width Summary                         ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.101  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.465  ; 0.000         ;
; clk8                                            ; 62.394 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                    ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.558 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 7.085      ;
; 1.759 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.884      ;
; 1.783 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.860      ;
; 1.825 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.160     ; 6.831      ;
; 1.893 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.161     ; 6.762      ;
; 1.915 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.728      ;
; 1.979 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.191     ; 6.646      ;
; 1.990 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.186     ; 6.640      ;
; 1.994 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.650      ;
; 2.018 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 6.614      ;
; 2.062 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 6.570      ;
; 2.080 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.177     ; 6.559      ;
; 2.084 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.170     ; 6.562      ;
; 2.103 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.178     ; 6.535      ;
; 2.186 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 6.446      ;
; 2.201 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.442      ;
; 2.217 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.169     ; 6.430      ;
; 2.248 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.395      ;
; 2.249 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.177     ; 6.390      ;
; 2.260 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; 0.278      ; 6.834      ;
; 2.282 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.186     ; 6.348      ;
; 2.296 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; 0.304      ; 6.824      ;
; 2.303 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.341      ;
; 2.310 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.334      ;
; 2.312 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.195     ; 6.309      ;
; 2.349 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; 0.278      ; 6.745      ;
; 2.356 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 6.280      ;
; 2.358 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.283      ;
; 2.405 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.165     ; 6.246      ;
; 2.443 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.200      ;
; 2.458 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.172     ; 6.186      ;
; 2.465 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 6.178      ;
; 2.479 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 6.153      ;
; 2.486 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.175     ; 6.155      ;
; 2.558 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.177     ; 6.081      ;
; 2.586 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.179     ; 6.051      ;
; 2.601 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.186     ; 6.029      ;
; 2.607 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.197     ; 6.012      ;
; 2.624 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 14.921     ;
; 2.625 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.918     ;
; 2.636 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.183     ; 5.997      ;
; 2.643 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.169     ; 6.004      ;
; 2.643 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.169     ; 6.004      ;
; 2.645 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[13] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.169     ; 6.002      ;
; 2.661 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 5.982      ;
; 2.669 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.169     ; 5.978      ;
; 2.675 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 5.968      ;
; 2.683 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 5.953      ;
; 2.698 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.179     ; 5.939      ;
; 2.699 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.177     ; 5.940      ;
; 2.725 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.818     ;
; 2.730 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 5.902      ;
; 2.734 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.193     ; 5.889      ;
; 2.790 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 5.842      ;
; 2.791 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.160     ; 5.865      ;
; 2.819 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 14.696     ;
; 2.833 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.188     ; 5.795      ;
; 2.867 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[41] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 5.778      ;
; 2.867 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.117     ; 14.646     ;
; 2.887 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 14.658     ;
; 2.888 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.655     ;
; 2.915 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 14.630     ;
; 2.916 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.627     ;
; 2.920 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 14.625     ;
; 2.921 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.622     ;
; 2.926 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 5.706      ;
; 2.930 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.613     ;
; 2.931 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 5.701      ;
; 2.931 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.195     ; 5.690      ;
; 2.934 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.167     ; 5.715      ;
; 2.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 14.611     ;
; 2.939 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.177     ; 5.700      ;
; 2.948 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 5.695      ;
; 2.948 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 5.695      ;
; 2.957 ; reset_n                                                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 14.598     ;
; 2.963 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.177     ; 5.676      ;
; 2.970 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.179     ; 5.667      ;
; 2.972 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.173     ; 5.671      ;
; 2.976 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.117     ; 14.537     ;
; 2.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 14.547     ;
; 2.988 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.555     ;
; 2.989 ; chameleon_cdtv_remote:myIr|key_rew                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.171     ; 5.656      ;
; 3.000 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[11]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 14.542     ;
; 3.001 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.182     ; 5.633      ;
; 3.016 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.527     ;
; 3.021 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.522     ;
; 3.028 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 14.497     ;
; 3.040 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.179     ; 5.597      ;
; 3.056 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 14.485     ;
; 3.077 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.466     ;
; 3.087 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.184     ; 5.545      ;
; 3.087 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.456     ;
; 3.087 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 14.428     ;
; 3.103 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[0]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 14.440     ;
; 3.106 ; chameleon_cdtv_remote:myIr|key_play                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.186     ; 5.524      ;
; 3.110 ; chameleon_cdtv_remote:myIr|key_ff                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.180     ; 5.526      ;
; 3.121 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[1]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 14.423     ;
; 3.121 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 14.423     ;
; 3.122 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[1]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 14.420     ;
; 3.122 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.088     ; 14.420     ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                           ;
+-------+--------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                        ; To Node                                         ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 2.034 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 6.565      ;
; 2.039 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                              ; chameleon_io:chameleon_io|mux_d_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.159     ; 6.618      ;
; 2.040 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 6.517      ;
; 2.054 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.134     ; 6.502      ;
; 2.061 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 6.538      ;
; 2.086 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.134     ; 6.470      ;
; 2.154 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 6.452      ;
; 2.154 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 6.410      ;
; 2.176 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.537      ;
; 2.186 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 6.420      ;
; 2.226 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 6.338      ;
; 2.267 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 6.339      ;
; 2.287 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 6.319      ;
; 2.348 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.134     ; 6.208      ;
; 2.363 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 6.190      ;
; 2.388 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 6.169      ;
; 2.396 ; chameleon_cdtv_remote:myIr|timer[7]                                                              ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.317      ;
; 2.396 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 6.157      ;
; 2.401 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.129     ; 6.160      ;
; 2.407 ; chameleon_cdtv_remote:myIr|timer[4]                                                              ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.306      ;
; 2.450 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 6.110      ;
; 2.451 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 6.264      ;
; 2.466 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.151      ;
; 2.471 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.242      ;
; 2.474 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.239      ;
; 2.474 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.239      ;
; 2.476 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 6.130      ;
; 2.490 ; chameleon_cdtv_remote:myIr|timer[3]                                                              ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 6.232      ;
; 2.515 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.122     ; 6.053      ;
; 2.525 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 6.039      ;
; 2.530 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.141     ; 6.019      ;
; 2.565 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|state.STATE_HIGH     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.178      ;
; 2.565 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|state.STATE_LOW      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.178      ;
; 2.565 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|state.STATE_START    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 6.178      ;
; 2.566 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.140     ; 5.984      ;
; 2.570 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|dq_out_reg[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.125     ; 5.995      ;
; 2.583 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.129     ; 5.978      ;
; 2.583 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 5.977      ;
; 2.587 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.122     ; 5.981      ;
; 2.599 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|dq_out_reg[13] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 6.019      ;
; 2.611 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 5.937      ;
; 2.618 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.134     ; 5.938      ;
; 2.621 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.933      ;
; 2.628 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.141     ; 5.921      ;
; 2.635 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 5.918      ;
; 2.640 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.084     ; 5.966      ;
; 2.647 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 5.906      ;
; 2.648 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.906      ;
; 2.657 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 5.896      ;
; 2.666 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 5.934      ;
; 2.671 ; chameleon_cdtv_remote:myIr|timer[7]                                                              ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 6.044      ;
; 2.682 ; chameleon_cdtv_remote:myIr|timer[4]                                                              ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.101     ; 6.033      ;
; 2.691 ; chameleon_cdtv_remote:myIr|timer[7]                                                              ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.022      ;
; 2.694 ; chameleon_cdtv_remote:myIr|timer[7]                                                              ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.019      ;
; 2.694 ; chameleon_cdtv_remote:myIr|timer[7]                                                              ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.019      ;
; 2.702 ; chameleon_cdtv_remote:myIr|timer[4]                                                              ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.011      ;
; 2.705 ; chameleon_cdtv_remote:myIr|timer[4]                                                              ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.008      ;
; 2.705 ; chameleon_cdtv_remote:myIr|timer[4]                                                              ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 6.008      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[0]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[1]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[2]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[3]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[4]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[6]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[7]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[8]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[9]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[10]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[11]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[12]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[13]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.712 ; chameleon_cdtv_remote:myIr|timer[5]                                                              ; chameleon_cdtv_remote:myIr|bitlength[5]         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 6.027      ;
; 2.717 ; chameleon_cdtv_remote:myIr|timer[0]                                                              ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 6.005      ;
; 2.725 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.135     ; 5.830      ;
; 2.732 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.129     ; 5.829      ;
; 2.742 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 5.811      ;
; 2.744 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 5.816      ;
; 2.749 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.129     ; 5.812      ;
; 2.761 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                              ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 5.792      ;
; 2.762 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 5.798      ;
; 2.765 ; chameleon_cdtv_remote:myIr|timer[3]                                                              ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 5.959      ;
; 2.770 ; reset_n                                                                                          ; chameleon_io:chameleon_io|mux_d_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.892      ;
; 2.771 ; chameleon_cdtv_remote:myIr|timer[8]                                                              ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.103     ; 5.942      ;
; 2.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|sio_out_reg ; chameleon_io:chameleon_io|mux_d_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.861      ;
; 2.783 ; chameleon_cdtv_remote:myIr|bitlength[3]                                                          ; chameleon_cdtv_remote:myIr|state.STATE_HIGH     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.068     ; 5.965      ;
; 2.783 ; chameleon_cdtv_remote:myIr|bitlength[3]                                                          ; chameleon_cdtv_remote:myIr|state.STATE_LOW      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.068     ; 5.965      ;
; 2.783 ; chameleon_cdtv_remote:myIr|bitlength[3]                                                          ; chameleon_cdtv_remote:myIr|state.STATE_START    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.068     ; 5.965      ;
; 2.783 ; chameleon_cdtv_remote:myIr|bitlength[0]                                                          ; chameleon_cdtv_remote:myIr|state.STATE_HIGH     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.068     ; 5.965      ;
; 2.783 ; chameleon_cdtv_remote:myIr|bitlength[0]                                                          ; chameleon_cdtv_remote:myIr|state.STATE_LOW      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.068     ; 5.965      ;
; 2.783 ; chameleon_cdtv_remote:myIr|bitlength[0]                                                          ; chameleon_cdtv_remote:myIr|state.STATE_START    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.068     ; 5.965      ;
; 2.785 ; chameleon_cdtv_remote:myIr|timer[7]                                                              ; chameleon_cdtv_remote:myIr|state.STATE_HIGH     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 5.958      ;
; 2.785 ; chameleon_cdtv_remote:myIr|timer[7]                                                              ; chameleon_cdtv_remote:myIr|state.STATE_LOW      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 5.958      ;
; 2.785 ; chameleon_cdtv_remote:myIr|timer[7]                                                              ; chameleon_cdtv_remote:myIr|state.STATE_START    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 5.958      ;
; 2.785 ; chameleon_cdtv_remote:myIr|timer[3]                                                              ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 5.937      ;
; 2.788 ; chameleon_cdtv_remote:myIr|timer[3]                                                              ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 5.934      ;
; 2.788 ; chameleon_cdtv_remote:myIr|timer[3]                                                              ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 5.934      ;
; 2.796 ; chameleon_cdtv_remote:myIr|timer[4]                                                              ; chameleon_cdtv_remote:myIr|state.STATE_HIGH     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 5.947      ;
; 2.796 ; chameleon_cdtv_remote:myIr|timer[4]                                                              ; chameleon_cdtv_remote:myIr|state.STATE_LOW      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 5.947      ;
; 2.796 ; chameleon_cdtv_remote:myIr|timer[4]                                                              ; chameleon_cdtv_remote:myIr|state.STATE_START    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 5.947      ;
; 2.797 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                                                    ; sdram_statemachine:sdram_adaptor|addr_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.135     ; 5.758      ;
+-------+--------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                     ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.385 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][3]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.041      ;
; 0.385 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][5]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.041      ;
; 0.385 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][5]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.041      ;
; 0.392 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][0]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.048      ;
; 0.392 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][2]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.048      ;
; 0.394 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:nmien_delay|shift_reg[31][1]                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.050      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][4]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.051      ;
; 0.398 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][4]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.054      ;
; 0.400 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][1]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.058      ;
; 0.400 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][3]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.059      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][6]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.057      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][3]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.059      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][6]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 1.061      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|first_line_of_instruction_reg                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[20]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[20]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[0]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dmactl_raw_reg[0]                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[33]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[33]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[54]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[54]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[5]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[5]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[41]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[41]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[43]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[43]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[13]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[13]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[9]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[9]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[1]                                                                                                                                                                 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[1]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|idle_reg[3]                                                                                                                                              ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|idle_reg[3]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[0]                                                                                                                                          ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[0]                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[1]                                                                                                                                          ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[1]                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[2]                                                                                                                                          ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[2]                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[3]                                                                                                                                          ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[3]                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[8]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[8]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[13]                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_cache_ready_reg                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[1]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[1]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[3]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[3]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[1]                                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[1]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[2]                                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[2]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[3]                                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serin_bitcount_reg[3]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|skctl_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[0]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|syncreset_enable_divider:enable_15_div|count_reg[3]                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[2]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf3_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|last_line_of_instruction_reg                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmist_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmist_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[4]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[1]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[2]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[3]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[3]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[7]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[5]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[1]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[3]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[3]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[5]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf1_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[1]                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_shift_reg[9]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_shift_reg[9]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_out_reg                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_out_reg                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|twotone_reg                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|twotone_reg                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[1]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[2]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[3]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[3]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[4]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[7]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[7]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|irqst_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hblank_reg                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hblank_reg                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[1]                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[1]                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[2]                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[2]                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[3]                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[3]                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[4]                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[4]                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[0]                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|simple_counter:counter_hpos|value_reg[0]                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[0]                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|count_reg[1]                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|count_reg[1]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|odd_scanline_reg                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|odd_scanline_reg                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[0]                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player3|shift_reg[0]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile3|count_reg[1]                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile3|count_reg[1]                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile3|shift_reg[7]                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile3|shift_reg[7]                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                         ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                              ; To Node                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.402 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.417 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.684      ;
; 0.418 ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.418 ; chameleon_io:chameleon_io|mux_toggle                                                                   ; chameleon_io:chameleon_io|mux_toggle                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.418 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.463 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.729      ;
; 0.470 ; chameleon_io:chameleon_io|mux_state.MUX_MMC7L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.737      ;
; 0.470 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.736      ;
; 0.470 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.736      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.738      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.471 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                    ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.738      ;
; 0.472 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.738      ;
; 0.473 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.739      ;
; 0.473 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.739      ;
; 0.473 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.739      ;
; 0.473 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.739      ;
; 0.475 ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.742      ;
; 0.477 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.744      ;
; 0.478 ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.744      ;
; 0.479 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.479 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.746      ;
; 0.479 ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.746      ;
; 0.479 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.745      ;
; 0.480 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.746      ;
; 0.480 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA1_B          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA2_B          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.747      ;
; 0.480 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.746      ;
; 0.480 ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.746      ;
; 0.480 ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.746      ;
; 0.481 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[83]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[82]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.747      ;
; 0.481 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[82]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.747      ;
; 0.481 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.747      ;
; 0.481 ; chameleon_io:chameleon_io|mux_state.MUX_RESET                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.748      ;
; 0.481 ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.747      ;
; 0.482 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[97]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[96]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.748      ;
; 0.484 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_MMC0L                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.751      ;
; 0.487 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.753      ;
; 0.488 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[7]     ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[7]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.754      ;
; 0.489 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|docking_station                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.755      ;
; 0.490 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.756      ;
; 0.490 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[3]     ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|irq_q_reg      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.756      ;
; 0.491 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.757      ;
; 0.492 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC4H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.759      ;
; 0.493 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[99]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.759      ;
; 0.494 ; chameleon_io:chameleon_io|mux_state.MUX_PS2                                                            ; chameleon_io:chameleon_io|mux_state.MUX_A2                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.760      ;
; 0.495 ; chameleon_io:chameleon_io|mux_state.MUX_ULTIMAX                                                        ; chameleon_io:chameleon_io|mux_state.MUX_MMC0H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.761      ;
; 0.495 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_MOB     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.761      ;
; 0.496 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA2_B          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[1]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.763      ;
; 0.498 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA2_B          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.SET_COL              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.765      ;
; 0.501 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.STORE_JOY2           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.READ_JOY34           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.767      ;
; 0.501 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.767      ;
; 0.504 ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.770      ;
; 0.512 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_LOW                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.778      ;
; 0.519 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[4]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.785      ;
; 0.520 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.786      ;
; 0.521 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[1]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.787      ;
; 0.523 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.789      ;
; 0.537 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_b[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.803      ;
; 0.538 ; chameleon_io:chameleon_io|mux_state.MUX_BUS                                                            ; chameleon_io:chameleon_io|mux_state.MUX_D0WR                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.805      ;
; 0.540 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|joystick_b[3]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.806      ;
; 0.542 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|joystick_a[3]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.808      ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 2.680 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.285     ; 5.714      ;
; 2.680 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.285     ; 5.714      ;
; 2.681 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.284     ; 5.714      ;
; 2.681 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.288     ; 5.710      ;
; 2.681 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.285     ; 5.713      ;
; 2.681 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.288     ; 5.710      ;
; 2.681 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.288     ; 5.710      ;
; 2.681 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.285     ; 5.713      ;
; 2.681 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.288     ; 5.710      ;
; 2.681 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.284     ; 5.714      ;
; 2.681 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.288     ; 5.710      ;
; 2.693 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.160     ; 5.837      ;
; 2.693 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.160     ; 5.837      ;
; 2.700 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.165     ; 5.825      ;
; 2.700 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.165     ; 5.825      ;
; 2.700 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.168     ; 5.822      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.164     ; 5.825      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.165     ; 5.824      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.168     ; 5.821      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.168     ; 5.821      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.168     ; 5.821      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.168     ; 5.821      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.168     ; 5.821      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.165     ; 5.824      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.164     ; 5.825      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.165     ; 5.824      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.167     ; 5.822      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.166     ; 5.823      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.168     ; 5.821      ;
; 2.701 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.167     ; 5.822      ;
; 2.704 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.211     ; 5.775      ;
; 2.706 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.202     ; 5.782      ;
; 2.709 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.337     ; 5.633      ;
; 2.709 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.337     ; 5.633      ;
; 2.711 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.342     ; 5.626      ;
; 2.712 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.334     ; 5.633      ;
; 2.712 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.334     ; 5.633      ;
; 2.712 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.206     ; 5.772      ;
; 2.712 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.206     ; 5.772      ;
; 2.714 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.205     ; 5.771      ;
; 2.714 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.213     ; 5.763      ;
; 2.714 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.210     ; 5.766      ;
; 2.714 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.215     ; 5.761      ;
; 2.721 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.210     ; 5.759      ;
; 2.729 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.217     ; 5.744      ;
; 2.729 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.217     ; 5.744      ;
; 2.731 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.222     ; 5.737      ;
; 2.732 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.214     ; 5.744      ;
; 2.732 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.214     ; 5.744      ;
; 2.732 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.198     ; 5.760      ;
; 2.738 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.208     ; 5.744      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.285      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.172     ; 5.270      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.175     ; 5.267      ;
; 3.374 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.285      ;
; 3.375 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.284      ;
; 3.375 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.284      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.163     ; 5.273      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 5.279      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 5.280      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 5.280      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 5.280      ;
; 3.380 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.156     ; 5.280      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                       ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                                                                                                    ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 9.697  ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 7.853      ;
; 9.818  ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.063     ; 7.749      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[6]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 7.419      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[0]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.431      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.431      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.431      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[3]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.431      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[4]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.431      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[5]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.431      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[6]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.431      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot_counter_reg[7]                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.431      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[3]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.432      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.432      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[2]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.432      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[2]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.432      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.432      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[7]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.432      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.432      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[0]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.432      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.431      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pot0_reg[6]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.432      ;
; 10.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.432      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 7.422      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[30]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 7.418      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 7.418      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 7.422      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[25]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 7.418      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[13]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 7.420      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[15]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 7.418      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 7.418      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 7.418      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[16]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 7.422      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 7.418      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 7.420      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[8]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 7.422      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 7.418      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[12]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.106     ; 7.422      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 7.423      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[3]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 7.423      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[2]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 7.423      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 7.423      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[16]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 7.423      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[17]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.105     ; 7.423      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.430      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.104     ; 7.424      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.430      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[11]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[8]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[7]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[6]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[5]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[4]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[3]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[2]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[1]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[0]                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[16]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[15]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[14]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[13]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[12]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 7.427      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[0]                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 7.425      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 7.425      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[1]                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 7.425      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[4]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[2]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[16]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[0]                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 7.425      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[11]                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 7.425      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.430      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[1]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.430      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[5]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.430      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 7.430      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[5]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[17]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[17]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[12]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[18]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 7.431      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[0]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 7.426      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[1]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 7.426      ;
; 10.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[2]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.102     ; 7.426      ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.455 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.028      ;
; 1.455 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.028      ;
; 1.455 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.028      ;
; 1.455 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.028      ;
; 1.455 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.028      ;
; 1.455 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.028      ;
; 1.455 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.028      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.382      ; 2.037      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.382      ; 2.037      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.382      ; 2.037      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.382      ; 2.037      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.382      ; 2.037      ;
; 1.465 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.382      ; 2.037      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 1.812 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.349      ; 2.351      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.693      ;
; 4.290 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[0]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.110      ; 4.595      ;
; 4.290 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[24]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.110      ; 4.595      ;
; 4.290 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[9]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.114      ; 4.599      ;
; 4.290 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[1]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.114      ; 4.599      ;
; 4.290 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[10]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.114      ; 4.599      ;
; 4.290 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[2]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.114      ; 4.599      ;
; 4.290 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[11]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.114      ; 4.599      ;
; 4.290 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[3]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.114      ; 4.599      ;
; 4.290 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[6]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.114      ; 4.599      ;
; 4.290 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[7]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.114      ; 4.599      ;
; 4.291 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|sdram_request_reg                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.104      ; 4.590      ;
; 4.291 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|reply_sreg                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.104      ; 4.590      ;
; 4.291 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[17]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.103      ; 4.589      ;
; 4.291 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[18]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.103      ; 4.589      ;
; 4.291 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[19]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.103      ; 4.589      ;
; 4.296 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[11]                                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.105      ; 4.596      ;
; 4.296 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[2]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.105      ; 4.596      ;
; 4.296 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[1]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.105      ; 4.596      ;
; 4.299 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[0]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.094      ; 4.588      ;
; 4.299 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[12]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.107      ; 4.601      ;
; 4.302 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[20]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.110      ; 4.607      ;
; 4.302 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[89]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.107      ; 4.604      ;
; 4.302 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 4.606      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.197 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 4.591      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 4.600      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 4.600      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 4.600      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 4.600      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 4.600      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 4.600      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 4.600      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.187      ; 4.600      ;
; 4.198 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.599      ;
; 4.203 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.604      ;
; 4.203 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.186      ; 4.604      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.167      ; 4.586      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 4.604      ;
; 4.204 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.185      ; 4.604      ;
; 4.206 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.170      ; 4.591      ;
; 4.702 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 5.017      ;
; 4.702 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 5.014      ;
; 4.702 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 5.013      ;
; 4.702 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 5.014      ;
; 4.702 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 5.017      ;
; 4.702 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.181      ; 5.015      ;
; 4.702 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 5.014      ;
; 4.702 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.181      ; 5.015      ;
; 4.702 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.180      ; 5.014      ;
; 4.703 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 5.018      ;
; 4.703 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 5.017      ;
; 4.703 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 5.014      ;
; 4.703 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.179      ; 5.014      ;
; 4.703 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 5.017      ;
; 4.703 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.183      ; 5.018      ;
; 4.703 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.182      ; 5.017      ;
; 4.703 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.181      ; 5.016      ;
; 4.711 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 5.031      ;
; 4.711 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.188      ; 5.031      ;
; 4.723 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.138      ; 4.993      ;
; 4.726 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.124      ; 4.982      ;
; 4.726 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.132      ; 4.990      ;
; 4.726 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.132      ; 4.990      ;
; 4.731 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.129      ; 4.992      ;
; 4.731 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.129      ; 4.992      ;
; 4.734 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.148      ; 5.014      ;
; 4.737 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 5.005      ;
; 4.742 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.142      ; 5.016      ;
; 4.744 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.133      ; 5.009      ;
; 4.745 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.130      ; 5.007      ;
; 4.746 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.136      ; 5.014      ;
; 4.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 5.021      ;
; 4.749 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.140      ; 5.021      ;
; 4.756 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.135      ; 5.023      ;
; 4.757 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.144      ; 5.033      ;
; 4.785 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 4.920      ;
; 4.785 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.054      ; 4.917      ;
; 4.785 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.053      ; 4.916      ;
; 4.785 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.054      ; 4.917      ;
; 4.785 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 4.920      ;
; 4.786 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.057      ; 4.921      ;
; 4.786 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.053      ; 4.917      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                      ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                 ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------+
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[0]                                                               ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[1]                                                               ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[2]                                                               ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[3]                                                               ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[4]                                                               ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[0]                                                               ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[1]                                                               ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[2]                                                               ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[3]                                                               ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_2                                                                       ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[13]                                                                ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[14]                                                                ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[15]                                                                ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[16]                                                                ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[17]                                                                ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                                 ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                                 ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[4]                                                                 ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[5]                                                                 ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_dly ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_reg ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[84]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[87]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ;
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[95]  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[0]                                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[1]                                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[2]                                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[3]                                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[4]                                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[5]                                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[6]                                                                           ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|ena_out                                                                          ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                                ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|io_ef_n_reg    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[99]  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[0]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[1]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[2]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[3]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[4]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[5]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[6]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[7]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgDelta[8]                                  ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[0]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[10]                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[11]                                   ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[1]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[2]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[3]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[4]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[5]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[6]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[7]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[8]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|avgLen[9]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[0]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[1]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[2]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[3]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[4]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[5]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[6]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                    ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|docking_station                              ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                                                                   ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.465 ; 8.681        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                                                          ;
; 8.467 ; 8.683        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36]                                  ;
; 8.467 ; 8.683        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38]                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[13]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[18]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[19]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[20]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[21]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[22]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[23]                                                ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[0]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Creg                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Nreg                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|PC[14]                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|PC[6]                                        ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Vreg                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[3]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[0]                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Zreg                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[6]                                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|irqActive                                    ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                                   ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21]                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22]                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26]                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]                                   ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31]                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32]                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]                                   ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]                                   ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycle3                           ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleEnd                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleIndirect                    ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleJump                        ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect                 ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreRead                     ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreWrite                    ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleRead2                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleWrite                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[5]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[6]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[7]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[3]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[7]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player0|shift_reg[0]                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player0|shift_reg[7]                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:player1|shift_reg[0]                                      ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|pmg_dma_state_reg[0]                                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|pmg_dma_state_reg[1]                                                  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[0]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[1]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[2]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[4]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[5]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[6]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|vdelay_reg[7]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[1]        ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[2]        ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[3]        ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[4]        ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|bincnt_reg[5]        ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_pressed_reg    ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[0] ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[1] ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[2] ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[3] ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[4] ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|compare_latch_reg[5] ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg  ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg    ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot0_reg[7]                                                         ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|sio_in_reg                                                          ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[28][4]                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|reg_file:gtia_mirror|digit_reg[28][7]                                            ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[13]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[14]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[15]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[16]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[17]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[18]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[19]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[20]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[21]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[22]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_fwd_p1[23]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[12]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[13]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[14]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[15]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[16]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[17]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[18]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[19]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[20]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[21]                                                                                                                       ;
; 8.509 ; 8.725        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; hq_dac:dac_right|r_data_lpf_p2[22]                                                                                                                       ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'clk8'                                                                                            ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.449  ; 62.449       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.473  ; 62.473       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.526  ; 62.526       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.551  ; 62.551       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.229 ; 2.516 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.119 ; 2.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 2.821 ; 3.021 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 2.821 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 2.496 ; 2.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.573 ; 2.742 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 2.744 ; 3.021 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 2.047 ; 2.317 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 2.083 ; 2.417 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.052 ; 2.849 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.208 ; 1.968 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.653 ; 2.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.265 ; 2.057 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.944 ; 2.838 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.863 ; 2.630 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.295 ; 2.135 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.198 ; 2.089 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.540 ; 2.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.541 ; 2.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.596 ; 2.474 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.534 ; 2.433 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.411 ; 2.302 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.556 ; 2.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.991 ; 2.849 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.052 ; 2.825 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.985 ; 2.771 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 5.003 ; 5.017 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -1.549 ; -1.827 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -1.428 ; -1.696 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -1.658 ; -1.790 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.806 ; -1.910 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -1.658 ; -1.790 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -1.851 ; -2.026 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.989 ; -2.224 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -1.359 ; -1.611 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -1.384 ; -1.716 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.533 ; -0.583 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.525 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.525 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.494 ; -0.543 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.485 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.485 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.538 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.538 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -4.192 ; -4.194 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.382 ; 6.561 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.382 ; 6.561 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.303 ; 4.444 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.534 ; 4.769 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.318 ; 4.494 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 5.864 ; 5.490 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.770 ; 6.213 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.553 ; 6.027 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.792 ; 5.041 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.789 ; 5.063 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.770 ; 6.213 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.866 ; 4.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.702 ; 3.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.414 ; 3.376 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.502 ; 3.478 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.866 ; 4.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.685 ; 3.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.495 ; 3.471 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.416 ; 3.378 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.483 ; 3.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.850 ; 4.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.491 ; 3.467 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.503 ; 3.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.471 ; 3.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 7.490 ; 7.146 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.366 ; 4.184 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 6.630 ; 6.076 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 5.465 ; 5.201 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.490 ; 7.146 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.828 ; 6.280 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.154 ; 4.901 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.785 ; 4.602 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.749 ; 4.577 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.716 ; 4.504 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 5.147 ; 4.851 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.154 ; 4.901 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.367 ; 5.737 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 4.934 ; 5.187 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 5.796 ; 5.764 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.112 ; 4.023 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.389 ; 4.226 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.102 ; 4.001 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 5.796 ; 5.764 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.684 ; 4.479 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.821 ; 6.486 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.625 ; 6.162 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.251 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.103 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 3.820 ; 3.957 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 5.879 ; 6.047 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 3.820 ; 3.957 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.041 ; 4.268 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 3.835 ; 4.006 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 5.322 ; 4.963 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 4.287 ; 4.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.020 ; 5.476 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.289 ; 4.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.287 ; 4.551 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.229 ; 5.656 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.960 ; 2.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 2.968 ; 2.931 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.247 ; 3.341 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 2.960 ; 2.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.048 ; 3.025 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.412 ; 4.479 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.231 ; 3.325 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.045 ; 3.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.045 ; 3.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.041 ; 3.018 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.405 ; 4.472 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.042 ; 2.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 2.962 ; 2.925 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.042 ; 2.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.476 ; 4.528 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.029 ; 3.006 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.396 ; 4.463 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.037 ; 3.014 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.048 ; 2.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.476 ; 4.528 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.038 ; 2.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.015 ; 2.966 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.026 ; 2.977 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.025 ; 2.976 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.882 ; 3.705 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 3.882 ; 3.705 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 6.055 ; 5.522 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 4.937 ; 4.682 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 6.938 ; 6.611 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.245 ; 5.718 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 4.215 ; 4.011 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.287 ; 4.111 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.251 ; 4.086 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.215 ; 4.011 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.634 ; 4.349 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 4.640 ; 4.397 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.842 ; 5.198 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 4.426 ; 4.671 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 3.631 ; 3.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 3.639 ; 3.552 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 3.904 ; 3.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 3.631 ; 3.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 5.312 ; 5.284 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.185 ; 3.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.240 ; 5.918 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.053 ; 5.607 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 6.838 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.695 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.303 ; 4.303 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.355 ; 5.355 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.342 ; 5.342 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.342 ; 5.342 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.964 ; 4.964 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.016 ; 5.016 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.985 ; 4.985 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.285 ; 5.285 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.303 ; 4.303 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.303 ; 4.303 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.882 ; 4.882 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.285 ; 5.285 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.985 ; 4.985 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.968 ; 4.968 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.954 ; 4.954 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.296 ; 5.296 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.296 ; 5.296 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.594 ; 3.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.612 ; 4.608 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.600 ; 4.596 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.600 ; 4.596 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.229 ; 4.222 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.279 ; 4.272 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.249 ; 4.242 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.537 ; 4.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.594 ; 3.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.594 ; 3.587 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.150 ; 4.143 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.537 ; 4.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.249 ; 4.242 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.232 ; 4.225 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.219 ; 4.212 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.556 ; 4.552 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.556 ; 4.552 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.055     ; 4.188     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.998     ; 5.119     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.988     ; 5.109     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.988     ; 5.109     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.630     ; 4.763     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.679     ; 4.812     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.649     ; 4.782     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.859     ; 4.992     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.055     ; 4.188     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.055     ; 4.188     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.470     ; 4.603     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.859     ; 4.992     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.649     ; 4.782     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.642     ; 4.775     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.620     ; 4.753     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.911     ; 5.032     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.911     ; 5.032     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.477     ; 3.477     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.382     ; 4.382     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.373     ; 4.373     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.373     ; 4.373     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.030     ; 4.030     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.076     ; 4.076     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.047     ; 4.047     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.249     ; 4.249     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.477     ; 3.477     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.477     ; 3.477     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.875     ; 3.875     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.249     ; 4.249     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.047     ; 4.047     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.041     ; 4.041     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.020     ; 4.020     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.299     ; 4.299     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.299     ; 4.299     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


---------------------------------------------
; Slow 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 5.501 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 5.627 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold Summary                                       ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.135 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.186 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery Summary                                    ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 5.820  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 13.630 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal Summary                                    ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.681 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 2.146 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width Summary                         ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.190  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.561  ; 0.000         ;
; clk8                                            ; 62.089 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                              ;
+-------+---------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                           ; To Node                                         ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.501 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 3.176      ;
; 5.538 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 3.139      ;
; 5.542 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.053     ; 3.159      ;
; 5.568 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.053     ; 3.133      ;
; 5.624 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk ; chameleon_io:chameleon_io|mux_d_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 3.094      ;
; 5.625 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 3.050      ;
; 5.625 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 3.054      ;
; 5.638 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 3.065      ;
; 5.638 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 3.043      ;
; 5.658 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 3.045      ;
; 5.665 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 3.016      ;
; 5.667 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 3.008      ;
; 5.693 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.984      ;
; 5.704 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 2.999      ;
; 5.705 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 2.998      ;
; 5.726 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.952      ;
; 5.735 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 3.006      ;
; 5.739 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.972      ;
; 5.749 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.930      ;
; 5.751 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.926      ;
; 5.765 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.914      ;
; 5.766 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.909      ;
; 5.773 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 2.930      ;
; 5.792 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                 ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.883      ;
; 5.792 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[13] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 2.920      ;
; 5.804 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                 ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.053     ; 2.897      ;
; 5.811 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 2.873      ;
; 5.817 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 2.864      ;
; 5.819 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.857      ;
; 5.820 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 2.861      ;
; 5.821 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.856      ;
; 5.822 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.853      ;
; 5.822 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.858      ;
; 5.833 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 2.850      ;
; 5.836 ; chameleon_cdtv_remote:myIr|timer[4]                                 ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.905      ;
; 5.843 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.832      ;
; 5.844 ; chameleon_cdtv_remote:myIr|timer[7]                                 ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.897      ;
; 5.851 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.827      ;
; 5.853 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.826      ;
; 5.858 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.883      ;
; 5.859 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.882      ;
; 5.859 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.882      ;
; 5.860 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 2.823      ;
; 5.862 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.816      ;
; 5.867 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.810      ;
; 5.869 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.876      ;
; 5.874 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|ba_reg[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.053     ; 2.827      ;
; 5.874 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.801      ;
; 5.876 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.796      ;
; 5.876 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.800      ;
; 5.881 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.797      ;
; 5.884 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|ba_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 2.819      ;
; 5.886 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.790      ;
; 5.889 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|addr_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.051     ; 2.814      ;
; 5.889 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.785      ;
; 5.893 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.780      ;
; 5.895 ; chameleon_cdtv_remote:myIr|timer[3]                                 ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.852      ;
; 5.898 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|ldqm_reg       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.802      ;
; 5.907 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.804      ;
; 5.907 ; reset_n                                                             ; chameleon_io:chameleon_io|mux_d_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.811      ;
; 5.912 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|ba_reg[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.055     ; 2.787      ;
; 5.916 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.758      ;
; 5.917 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.761      ;
; 5.920 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                       ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.758      ;
; 5.921 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                 ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.752      ;
; 5.922 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|ba_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.053     ; 2.779      ;
; 5.929 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                       ; sdram_statemachine:sdram_adaptor|addr_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.748      ;
; 5.937 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 2.775      ;
; 5.939 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[7]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.737      ;
; 5.942 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|addr_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 2.739      ;
; 5.949 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.726      ;
; 5.949 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|ldqm_reg       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.751      ;
; 5.957 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.721      ;
; 5.959 ; chameleon_cdtv_remote:myIr|timer[4]                                 ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.782      ;
; 5.959 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[13] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.042     ; 2.753      ;
; 5.960 ; chameleon_cdtv_remote:myIr|timer[4]                                 ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.781      ;
; 5.960 ; chameleon_cdtv_remote:myIr|timer[4]                                 ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.781      ;
; 5.961 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|ba_reg[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.055     ; 2.738      ;
; 5.963 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 2.718      ;
; 5.964 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.747      ;
; 5.967 ; chameleon_cdtv_remote:myIr|timer[7]                                 ; chameleon_cdtv_remote:myIr|current_code[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.774      ;
; 5.968 ; chameleon_cdtv_remote:myIr|timer[7]                                 ; chameleon_cdtv_remote:myIr|current_code[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.773      ;
; 5.968 ; chameleon_cdtv_remote:myIr|timer[7]                                 ; chameleon_cdtv_remote:myIr|current_code[2]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.773      ;
; 5.970 ; chameleon_cdtv_remote:myIr|timer[4]                                 ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.775      ;
; 5.971 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|ba_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.053     ; 2.730      ;
; 5.974 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                 ; sdram_statemachine:sdram_adaptor|addr_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.699      ;
; 5.977 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                 ; sdram_statemachine:sdram_adaptor|ldqm_reg       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.721      ;
; 5.978 ; chameleon_cdtv_remote:myIr|timer[7]                                 ; chameleon_cdtv_remote:myIr|current_code[3]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.767      ;
; 5.979 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.070     ; 2.705      ;
; 5.980 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                 ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.696      ;
; 5.982 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                       ; sdram_statemachine:sdram_adaptor|addr_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.696      ;
; 5.984 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|state.STATE_HIGH     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.038     ; 2.779      ;
; 5.984 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|state.STATE_LOW      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.038     ; 2.779      ;
; 5.984 ; chameleon_cdtv_remote:myIr|timer[5]                                 ; chameleon_cdtv_remote:myIr|state.STATE_START    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.038     ; 2.779      ;
; 5.984 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                       ; sdram_statemachine:sdram_adaptor|addr_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.075     ; 2.695      ;
; 5.990 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                 ; sdram_statemachine:sdram_adaptor|addr_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.685      ;
; 5.990 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.690      ;
; 5.995 ; chameleon_cdtv_remote:myIr|timer[8]                                 ; chameleon_cdtv_remote:myIr|current_code[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.060     ; 2.746      ;
; 5.999 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 2.684      ;
; 6.001 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                       ; sdram_statemachine:sdram_adaptor|ba_reg[0]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.053     ; 2.700      ;
+-------+---------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                           ;
+-------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.627 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 3.080      ;
; 5.668 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.095     ; 3.038      ;
; 5.691 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.087     ; 3.023      ;
; 5.724 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.983      ;
; 5.767 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.102     ; 2.932      ;
; 5.774 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.934      ;
; 5.776 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.105     ; 2.920      ;
; 5.788 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.088     ; 2.925      ;
; 5.789 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.918      ;
; 5.792 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.102     ; 2.907      ;
; 5.798 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.105     ; 2.898      ;
; 5.846 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.092     ; 2.863      ;
; 5.848 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.857      ;
; 5.851 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.856      ;
; 5.865 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.842      ;
; 5.867 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.102     ; 2.832      ;
; 5.868 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp2_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.836      ;
; 5.877 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.828      ;
; 5.883 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.105     ; 2.813      ;
; 5.886 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; 0.109      ; 3.024      ;
; 5.897 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.810      ;
; 5.908 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 2.802      ;
; 5.912 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.108     ; 2.781      ;
; 5.917 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[38] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; 0.097      ; 2.981      ;
; 5.945 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.763      ;
; 5.953 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; 0.097      ; 2.945      ;
; 5.954 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.748      ;
; 5.957 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.747      ;
; 5.959 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.748      ;
; 5.980 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.086     ; 2.735      ;
; 5.992 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.712      ;
; 5.995 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.712      ;
; 5.996 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.111     ; 2.694      ;
; 6.007 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.700      ;
; 6.008 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.108     ; 2.685      ;
; 6.020 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.681      ;
; 6.024 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.683      ;
; 6.026 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.681      ;
; 6.032 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.672      ;
; 6.042 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.663      ;
; 6.052 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.105     ; 2.644      ;
; 6.054 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.651      ;
; 6.057 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.645      ;
; 6.065 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[18] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.646      ;
; 6.066 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[20] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.641      ;
; 6.078 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.627      ;
; 6.081 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.630      ;
; 6.082 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[13] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.629      ;
; 6.082 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|doReg[0]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.629      ;
; 6.097 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.610      ;
; 6.102 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.599      ;
; 6.127 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.577      ;
; 6.137 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[39] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.087     ; 2.577      ;
; 6.145 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.563      ;
; 6.148 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[23] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.102     ; 2.551      ;
; 6.157 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.102     ; 2.542      ;
; 6.187 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.108     ; 2.506      ;
; 6.188 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.512      ;
; 6.196 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.508      ;
; 6.199 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.502      ;
; 6.205 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.090     ; 2.506      ;
; 6.208 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.499      ;
; 6.208 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.499      ;
; 6.211 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.493      ;
; 6.219 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.486      ;
; 6.221 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[41] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.487      ;
; 6.224 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.096     ; 2.481      ;
; 6.227 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.477      ;
; 6.230 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 2.477      ;
; 6.250 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.108     ; 2.443      ;
; 6.254 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[16] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.450      ;
; 6.262 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.442      ;
; 6.264 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.437      ;
; 6.269 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.111     ; 2.421      ;
; 6.275 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.099     ; 2.427      ;
; 6.291 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[43] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.417      ;
; 6.294 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.077     ; 2.430      ;
; 6.294 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[0]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.077     ; 2.430      ;
; 6.294 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.077     ; 2.430      ;
; 6.294 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.077     ; 2.430      ;
; 6.294 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.077     ; 2.430      ;
; 6.294 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.077     ; 2.430      ;
; 6.298 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp0_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.101     ; 2.402      ;
; 6.299 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 2.417      ;
; 6.299 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[7]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 2.417      ;
; 6.299 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[7]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 2.417      ;
; 6.299 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[6]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 2.417      ;
; 6.299 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[4]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 2.417      ;
; 6.299 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[5]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 2.417      ;
; 6.299 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[5]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 2.417      ;
; 6.301 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[10]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.407      ;
; 6.307 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.394      ;
; 6.314 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[3]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.404      ;
; 6.314 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penv_reg[3]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 2.404      ;
; 6.339 ; chameleon_cdtv_remote:myIr|key_rew                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.369      ;
; 6.344 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.360      ;
; 6.346 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|joystick2_reg[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|penh_reg[4]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.081     ; 2.374      ;
; 6.349 ; chameleon_cdtv_remote:myIr|key_ff                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.097     ; 2.355      ;
; 6.352 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 2.356      ;
; 6.367 ; chameleon_cdtv_remote:myIr|key_play                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.100     ; 2.334      ;
+-------+----------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.464      ;
; 0.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.464      ;
; 0.135 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.464      ;
; 0.137 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.466      ;
; 0.137 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.466      ;
; 0.140 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.469      ;
; 0.140 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.469      ;
; 0.141 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:nmien_delay|shift_reg[31][1]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.470      ;
; 0.143 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.472      ;
; 0.143 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.473      ;
; 0.143 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][2]                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.472      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.473      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.475      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.474      ;
; 0.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.475      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.475      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.228      ; 0.478      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.473      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.477      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][1]                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.477      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][0]                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.477      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.475      ;
; 0.150 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.480      ;
; 0.150 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.476      ;
; 0.150 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[10]                                                                                                                                                    ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.477      ;
; 0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.477      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.482      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.478      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.481      ;
; 0.152 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[8]                                                                                                                                                     ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.479      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:nmien_delay|shift_reg[31][0]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.483      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.481      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.484      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.486      ;
; 0.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.482      ;
; 0.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.483      ;
; 0.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe3a[0]                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~portb_address_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.488      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.489      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe3a[0]                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~portb_address_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.488      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.490      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.488      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.489      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.493      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.496      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_address_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.496      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.497      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.241      ; 0.511      ;
; 0.167 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.239      ; 0.510      ;
; 0.170 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.241      ; 0.515      ;
; 0.171 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.239      ; 0.514      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.503      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.506      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.504      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.502      ;
; 0.175 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.241      ; 0.520      ;
; 0.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.503      ;
; 0.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.239      ; 0.519      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.238      ; 0.520      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.241      ; 0.525      ;
; 0.181 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_address_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.511      ;
; 0.181 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.239      ; 0.524      ;
; 0.183 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.238      ; 0.525      ;
; 0.184 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[5] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.241      ; 0.529      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|pending_extended_reg                                                                                                                                       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|pending_extended_reg                                                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|pending_keyup_reg                                                                                                                                          ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|pending_keyup_reg                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[1]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[2]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[4]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[5]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[6]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[7]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[3]                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|hcount_reg[3]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[7]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[7]                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[20]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[20]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[91]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[91]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[21]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[21]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[28]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[28]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[22]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[54]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[54]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[51]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[51]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[90]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[90]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[44]                                                                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[44]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[11]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[11]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[12]                                                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[12]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|write_enable_reg                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|write_enable_reg                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|cpu_fetch_real_reg                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|cpu_fetch_real_reg                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|idle_reg[3]                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|idle_reg[3]                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[0]                                                                                                                                            ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[0]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[1]                                                                                                                                            ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[1]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[2]                                                                                                                                            ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[2]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[3]                                                                                                                                            ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|bitcount_reg[3]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vblank_reg                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                                                                                         ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                              ; To Node                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.186 ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; chameleon_cdtv_remote:myIr|timer[12]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; chameleon_cdtv_remote:myIr|timer[9]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.186 ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; chameleon_cdtv_remote:myIr|timer[14]                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[0]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[1]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; chameleon_cdtv_remote:myIr|bitcount[4]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; sdram_statemachine:sdram_adaptor|reply_reg                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; chameleon_io:chameleon_io|c64_ba_reg                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; chameleon_io:chameleon_io|c64_data_reg[4]                                                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joy34_flag                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; chameleon_cdtv_remote:myIr|current_code[4]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; chameleon_cdtv_remote:myIr|current_code[3]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; chameleon_cdtv_remote:myIr|current_code[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; chameleon_cdtv_remote:myIr|current_code[5]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; chameleon_cdtv_remote:myIr|current_code[7]                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.193 ; chameleon_io:chameleon_io|mux_state.MUX_MMC7L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                         ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.193 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.193 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.313      ;
; 0.194 ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; chameleon_io:chameleon_io|mux_clk_reg                                                                  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|mux_toggle                                                                   ; chameleon_io:chameleon_io|mux_toggle                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.194 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.195 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPreHalf                                 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.315      ;
; 0.195 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.315      ;
; 0.195 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.315      ;
; 0.195 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localHalf                                    ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.315      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.196 ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.316      ;
; 0.197 ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.197 ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.317      ;
; 0.198 ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA1_B          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA2_B          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[83]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[82]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.198 ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.318      ;
; 0.199 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.319      ;
; 0.199 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                         ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.319      ;
; 0.199 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[82]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.319      ;
; 0.199 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[81]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[80]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.319      ;
; 0.200 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.320      ;
; 0.200 ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; chameleon_io:chameleon_io|c64_cs_loc                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.320      ;
; 0.200 ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.320      ;
; 0.201 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; chameleon_io:chameleon_io|mux_state.MUX_MMC0L                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
; 0.201 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[97]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[96]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
; 0.201 ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.321      ;
; 0.202 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.322      ;
; 0.202 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.322      ;
; 0.203 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|docking_station                              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.323      ;
; 0.204 ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                           ; chameleon_io:chameleon_io|mux_state.MUX_MMC4H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.325      ;
; 0.205 ; chameleon_io:chameleon_io|mux_state.MUX_PS2                                                            ; chameleon_io:chameleon_io|mux_state.MUX_A2                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.325      ;
; 0.205 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[99]  ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.325      ;
; 0.207 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA2_B          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.SET_COL              ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.327      ;
; 0.208 ; chameleon_io:chameleon_io|mux_state.MUX_ULTIMAX                                                        ; chameleon_io:chameleon_io|mux_state.MUX_MMC0H                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.328      ;
; 0.208 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_MOB     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.328      ;
; 0.209 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                    ; chameleon_io:chameleon_io|c64_kb_ack                                                                   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.329      ;
; 0.210 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.STORE_JOY2           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.READ_JOY34           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.330      ;
; 0.210 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_CIA2_B          ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[1]                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.330      ;
; 0.212 ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.332      ;
; 0.213 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[3]     ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|irq_q_reg      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.333      ;
; 0.214 ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[7]     ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[7]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.334      ;
; 0.215 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                     ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.335      ;
; 0.217 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                            ; chameleon_cdtv_remote:myIr|state.STATE_LOW                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.337      ;
; 0.217 ; chameleon_io:chameleon_io|mux_state.MUX_RESET                                                          ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.337      ;
; 0.226 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_b[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.346      ;
; 0.230 ; chameleon_io:chameleon_io|mux_state.MUX_BUS                                                            ; chameleon_io:chameleon_io|mux_state.MUX_D0WR                                                           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 0.351      ;
; 0.234 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[4]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.354      ;
; 0.235 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_b[1]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.355      ;
; 0.235 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[0]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.355      ;
; 0.236 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_b[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.356      ;
; 0.236 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[2]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.356      ;
; 0.237 ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ; chameleon_cdtv_remote:myIr|joystick_a[1]                                                               ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.357      ;
+-------+--------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                               ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.820 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.115     ; 2.819      ;
; 5.821 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.122     ; 2.811      ;
; 5.824 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 2.752      ;
; 5.824 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.176     ; 2.752      ;
; 5.825 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 2.750      ;
; 5.825 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.177     ; 2.750      ;
; 5.827 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.180     ; 2.745      ;
; 5.828 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.117     ; 2.809      ;
; 5.828 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 2.808      ;
; 5.828 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.118     ; 2.808      ;
; 5.829 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.119     ; 2.806      ;
; 5.830 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.121     ; 2.803      ;
; 5.830 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 2.801      ;
; 5.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.119     ; 2.800      ;
; 5.835 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.113     ; 2.806      ;
; 5.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.122     ; 2.796      ;
; 5.836 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.122     ; 2.796      ;
; 5.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 2.794      ;
; 5.837 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 2.794      ;
; 5.839 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 2.789      ;
; 5.843 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.117     ; 2.794      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 2.757      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 2.758      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.152     ; 2.754      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 2.757      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.153     ; 2.753      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 2.757      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.152     ; 2.754      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 2.758      ;
; 5.846 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 2.757      ;
; 5.847 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 2.754      ;
; 5.847 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.151     ; 2.754      ;
; 5.850 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 2.811      ;
; 5.850 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 2.811      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 2.802      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 2.801      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 2.801      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.098     ; 2.798      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.098     ; 2.798      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 2.797      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 2.801      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 2.801      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.094     ; 2.802      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 2.801      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 2.800      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.799      ;
; 5.858 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.799      ;
; 5.859 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.798      ;
; 5.859 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.798      ;
; 5.859 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 2.799      ;
; 5.859 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 2.799      ;
; 6.101 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 2.614      ;
; 6.101 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 2.614      ;
; 6.101 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 2.614      ;
; 6.101 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 2.614      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.092     ; 2.606      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.103 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.097     ; 2.601      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.108 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 2.605      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 2.610      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.611      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.611      ;
; 6.109 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.611      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                        ;
+--------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                                                                                     ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 13.630 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.046     ; 3.939      ;
; 13.653 ; reset_n                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.928      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[23]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[23]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[29]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[10]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[10]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[15]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[15]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[9]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[9]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[19]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[19]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[14]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[14]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[20]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.808 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[20]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[23]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[23]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[30]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[30]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[30]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[30]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[29]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[29]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[28]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[28]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[27]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[27]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[26]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[26]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[13]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[13]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.748      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[6]                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.748      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|sio_in_reg                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.748      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[4]                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.748      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.748      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.748      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.748      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_last_reg                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.748      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.748      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.748      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|enabled_out_reg ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[1]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[4]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[5]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[6]    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|enabled_out_reg ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.061     ; 3.745      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[10]          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.750      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[9]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.750      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[14]                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[3]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[2]                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[3]                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[2]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[7]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[6]                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[7]                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[5]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[4]                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[4]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addrend_reg[5]                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[21]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[21]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[7]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[7]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[0]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[0]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[19]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[19]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[18]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[6]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[6]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[22]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[22]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.052     ; 3.754      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[22]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[22]                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.753      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[16]                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[17]                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[18]                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[19]                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[20]                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[21]                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[22]                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
; 13.809 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pause_reg[23]                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.749      ;
+--------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.681 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.977      ;
; 0.681 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.977      ;
; 0.681 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.977      ;
; 0.681 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.977      ;
; 0.681 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.977      ;
; 0.681 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.977      ;
; 0.688 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.984      ;
; 0.688 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.984      ;
; 0.688 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.984      ;
; 0.688 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.984      ;
; 0.688 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.984      ;
; 0.688 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.984      ;
; 0.688 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 0.984      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 0.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.187      ; 1.151      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 1.059 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.333      ;
; 2.207 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|sdram_request_reg                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.059      ; 2.350      ;
; 2.207 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|reply_sreg                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.059      ; 2.350      ;
; 2.207 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[17]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.058      ; 2.349      ;
; 2.207 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[18]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.058      ; 2.349      ;
; 2.207 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[19]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.058      ; 2.349      ;
; 2.208 ; reset_n                                                                                                                                                                             ; ir_fkeys_reg[0]                                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.059      ; 2.351      ;
; 2.208 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_IN_sreg[24]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.059      ; 2.351      ;
; 2.208 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[9]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 2.355      ;
; 2.208 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[1]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 2.355      ;
; 2.208 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[10]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 2.355      ;
; 2.208 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[2]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 2.355      ;
; 2.208 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[11]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 2.355      ;
; 2.208 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[3]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 2.355      ;
; 2.208 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[6]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 2.355      ;
; 2.208 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[7]                                                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.063      ; 2.355      ;
; 2.213 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[10]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.049      ; 2.346      ;
; 2.213 ; reset_n                                                                                                                                                                             ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[0]                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.051      ; 2.348      ;
; 2.213 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[131]                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.049      ; 2.346      ;
; 2.213 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[20]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.057      ; 2.354      ;
; 2.213 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[89]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.055      ; 2.352      ;
; 2.213 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[18]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.056      ; 2.353      ;
; 2.213 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.055      ; 2.352      ;
; 2.213 ; reset_n                                                                                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[93]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.055      ; 2.352      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 2.146 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.354      ;
; 2.146 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.354      ;
; 2.146 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.354      ;
; 2.146 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.354      ;
; 2.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.355      ;
; 2.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.355      ;
; 2.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.355      ;
; 2.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.355      ;
; 2.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.355      ;
; 2.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.355      ;
; 2.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.355      ;
; 2.147 ; reset_n   ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.104      ; 2.355      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.102      ; 2.354      ;
; 2.148 ; reset_n   ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.348      ;
; 2.152 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 2.354      ;
; 2.152 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 2.354      ;
; 2.153 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 2.355      ;
; 2.153 ; reset_n   ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.098      ; 2.355      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 2.350      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.154 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.087      ; 2.345      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 2.555      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 2.554      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.552      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 2.551      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.090      ; 2.551      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.552      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 2.554      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.094      ; 2.555      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 2.554      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|we_n_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 2.553      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.552      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 2.553      ;
; 2.383 ; reset_n   ; sdram_statemachine:sdram_adaptor|udqm_reg                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.091      ; 2.552      ;
; 2.384 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 2.555      ;
; 2.384 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.089      ; 2.551      ;
; 2.384 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.093      ; 2.555      ;
; 2.384 ; reset_n   ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.092      ; 2.554      ;
; 2.390 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.564      ;
; 2.390 ; reset_n   ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.096      ; 2.564      ;
; 2.402 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 2.550      ;
; 2.406 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 2.548      ;
; 2.406 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.064      ; 2.548      ;
; 2.407 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.065      ; 2.550      ;
; 2.407 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.065      ; 2.550      ;
; 2.408 ; reset_n   ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.060      ; 2.546      ;
; 2.408 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.074      ; 2.560      ;
; 2.410 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.068      ; 2.556      ;
; 2.411 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 2.499      ;
; 2.411 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 2.495      ;
; 2.411 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 2.498      ;
; 2.411 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 2.496      ;
; 2.411 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 2.498      ;
; 2.411 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.034      ; 2.495      ;
; 2.411 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.038      ; 2.499      ;
; 2.411 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 2.496      ;
; 2.412 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 2.499      ;
; 2.412 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.033      ; 2.495      ;
; 2.412 ; reset_n   ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.037      ; 2.499      ;
; 2.415 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[3]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.066      ; 2.559      ;
; 2.416 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.070      ; 2.564      ;
; 2.416 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.563      ;
; 2.416 ; reset_n   ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.069      ; 2.563      ;
+-------+-----------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                      ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                 ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------+
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[0]                                                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[1]                                                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[2]                                                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[3]                                                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[4]                                                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[5]                                                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|cnt[6]                                                                           ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_1mhz:my1Mhz|ena_out                                                                          ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[0]                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[11]                                                            ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[2]                                                             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[0]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[1]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[2]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[3]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_a[4]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[0]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[1]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[2]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|joystick_b[3]                                                               ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|key_2                                                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                 ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[0]                                                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[1]                                                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[2]                                                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[3]                                                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_cdtv_remote:myIr|timer[6]                                                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[0]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[1]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[2]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[3]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[4]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[5]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[6]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|bit_cnt[7]     ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_dly ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|dotclock_n_reg ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|io_ef_n_reg    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|irq_q_reg      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|rom_lh_n_reg   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[100] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[101] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[102] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[103] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[85]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[86]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[87]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[88]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[89]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[90]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[91]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[92]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[93]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[94]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[98]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_docking_station:\genDockingStation:myDockingStation|shift_reg[99]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[0]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[1]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[2]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[3]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[4]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[5]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[6]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|c64Cnt[7]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|docking_station                              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[0]                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[1]                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[2]                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|fracCnt[3]                                   ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[0]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[1]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[2]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[3]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[4]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[5]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[6]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phi2_n_reg[7]                                ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|phiSync                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|slvCnt[0]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|slvCnt[1]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|slvCnt[2]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|slvCnt[3]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|slvCnt[5]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|slvCnt[6]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|slvCnt[7]                                    ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[0]                                                       ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[10]                                                      ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[11]                                                      ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                        ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type            ; Clock                                           ; Clock Edge ; Target                                                                                                                                                                                                                                    ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_address_reg0   ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_address_reg0  ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a10~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a1~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a7~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                               ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                           ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~portb_address_reg0   ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~portb_address_reg0  ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a11~porta_address_reg0                                                                                                                                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a14~porta_address_reg0                                                                                                                                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a17~porta_address_reg0                                                                                                                                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a20~porta_address_reg0                                                                                                                                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a21~porta_address_reg0                                                                                                                                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a3~porta_address_reg0                                                                                                                                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a5~porta_address_reg0                                                                                                                                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a8~porta_address_reg0                                                                                                                                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                           ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                          ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                            ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5                      ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54                     ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'clk8'                                                                                            ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.123  ; 62.123       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.131  ; 62.131       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.869  ; 62.869       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.877  ; 62.877       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 1.276 ; 1.596 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 1.230 ; 1.553 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 1.691 ; 1.908 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 1.691 ; 1.908 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 1.529 ; 1.760 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 1.544 ; 1.759 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 1.608 ; 1.851 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 1.190 ; 1.522 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 1.236 ; 1.537 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.495 ; 2.025 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.080 ; 1.517 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 1.304 ; 1.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.135 ; 1.580 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.485 ; 2.018 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.387 ; 1.907 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.170 ; 1.657 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.151 ; 1.618 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.288 ; 1.783 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.280 ; 1.800 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.317 ; 1.830 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 1.306 ; 1.802 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.234 ; 1.732 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.275 ; 1.785 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.495 ; 2.025 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.493 ; 1.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.461 ; 1.963 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 2.676 ; 3.333 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -0.920 ; -1.242 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -0.871 ; -1.189 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -1.047 ; -1.311 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.158 ; -1.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -1.047 ; -1.311 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -1.164 ; -1.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.221 ; -1.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -0.832 ; -1.159 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -0.871 ; -1.181 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.365 ; -0.741 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.361 ; -0.737 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.361 ; -0.737 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.356 ; -0.738 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.340 ; -0.722 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.340 ; -0.722 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.341 ; -0.723 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.346 ; -0.728 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.370 ; -0.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.370 ; -0.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -2.254 ; -2.895 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 3.387 ; 3.220 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 3.387 ; 3.220 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 2.116 ; 2.028 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 2.252 ; 2.151 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 2.146 ; 2.051 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 2.629 ; 2.779 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 2.971 ; 2.780 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 2.822 ; 2.669 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 2.370 ; 2.253 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 2.381 ; 2.267 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.971 ; 2.780 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.606 ; 1.605 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.784 ; 1.856 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.601 ; 1.600 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.652 ; 1.673 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.769 ; 1.841 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.645 ; 1.666 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.645 ; 1.666 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.644 ; 1.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.642 ; 1.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.603 ; 1.602 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.642 ; 1.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.636 ; 1.657 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.518 ; 2.576 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.640 ; 1.661 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.650 ; 1.649 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.627 ; 1.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.626 ; 1.625 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.626 ; 1.625 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.625 ; 1.624 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.640 ; 1.639 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.598 ; 1.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.598 ; 1.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.618 ; 1.617 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.628 ; 1.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.627 ; 1.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.628 ; 1.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.614 ; 3.844 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 1.978 ; 2.055 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.922 ; 3.118 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.451 ; 2.610 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.614 ; 3.844 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 3.040 ; 3.248 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 2.324 ; 2.447 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 2.189 ; 2.289 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 2.159 ; 2.260 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 2.121 ; 2.205 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.308 ; 2.446 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.324 ; 2.447 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.721 ; 2.569 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.471 ; 2.341 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 2.906 ; 3.042 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 1.884 ; 1.946 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 1.989 ; 2.061 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 1.872 ; 1.944 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 2.906 ; 3.042 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 2.120 ; 2.230 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 3.106 ; 3.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.960 ; 3.196 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.690 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.729 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 1.848 ; 1.763 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 3.108 ; 2.945 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 1.848 ; 1.763 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 1.977 ; 1.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 1.877 ; 1.786 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 2.341 ; 2.487 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 2.092 ; 1.979 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 2.526 ; 2.379 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 2.092 ; 1.979 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 2.103 ; 1.992 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.669 ; 2.485 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.532 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.400 ; 1.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.517 ; 1.589 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.392 ; 1.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.351 ; 1.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.385 ; 1.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.266 ; 2.324 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.388 ; 1.409 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.397 ; 1.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.372 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.387 ; 1.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.365 ; 1.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 1.716 ; 1.790 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 1.716 ; 1.790 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.621 ; 2.810 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.168 ; 2.321 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.323 ; 3.547 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.735 ; 2.935 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 1.852 ; 1.933 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 1.920 ; 2.017 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 1.891 ; 1.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 1.852 ; 1.933 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.034 ; 2.168 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.049 ; 2.169 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.429 ; 2.283 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.189 ; 2.064 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 1.615 ; 1.685 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 1.625 ; 1.685 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 1.726 ; 1.796 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 1.615 ; 1.686 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 2.643 ; 2.777 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 1.852 ; 1.957 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 2.799 ; 3.056 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.659 ; 2.886 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.461 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.499 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 2.890 ; 2.887 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.348 ; 3.344 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.339 ; 3.335 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.339 ; 3.335 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.187 ; 3.184 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.204 ; 3.201 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.191 ; 3.188 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.288 ; 3.285 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.890 ; 2.887 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.890 ; 2.887 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.102 ; 3.099 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.288 ; 3.285 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.191 ; 3.188 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.187 ; 3.184 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.177 ; 3.174 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.315 ; 3.311 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.315 ; 3.311 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 1.785 ; 1.785 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.221 ; 2.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.213 ; 2.213 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.213 ; 2.213 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.071 ; 2.071 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.086 ; 2.086 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.074 ; 2.074 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.167 ; 2.167 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.785 ; 1.785 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.785 ; 1.785 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.988 ; 1.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.167 ; 2.167 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.074 ; 2.074 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.070 ; 2.070 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.061 ; 2.061 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.190 ; 2.190 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.190 ; 2.190 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 2.957     ; 2.957     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.495     ; 3.495     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.483     ; 3.483     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.483     ; 3.483     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.307     ; 3.307     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.333     ; 3.333     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.313     ; 3.313     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.423     ; 3.423     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.957     ; 2.957     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.957     ; 2.957     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.187     ; 3.187     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.423     ; 3.423     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.313     ; 3.313     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.313     ; 3.313     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.297     ; 3.297     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.443     ; 3.443     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.443     ; 3.443     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 1.850     ; 1.916     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.363     ; 2.421     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.351     ; 2.409     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.351     ; 2.409     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.186     ; 2.252     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.210     ; 2.276     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.192     ; 2.258     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.296     ; 2.362     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.850     ; 1.916     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.850     ; 1.916     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.070     ; 2.136     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.296     ; 2.362     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.192     ; 2.258     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.192     ; 2.258     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.176     ; 2.242     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.313     ; 2.371     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.313     ; 2.371     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


---------------------------------------------
; Fast 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                         ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+
; Clock                                            ; Setup ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+
; Worst-case Slack                                 ; 1.073 ; 0.135 ; 2.263    ; 0.681   ; 4.099               ;
;  clk8                                            ; N/A   ; N/A   ; N/A      ; N/A     ; 62.089              ;
;  pll|altpll_component|auto_generated|pll1|clk[0] ; 1.544 ; 0.186 ; 2.263    ; 2.146   ; 4.099               ;
;  pll|altpll_component|auto_generated|pll1|clk[1] ; 1.073 ; 0.135 ; 9.007    ; 0.681   ; 8.465               ;
; Design-wide TNS                                  ; 0.0   ; 0.0   ; 0.0      ; 0.0     ; 0.0                 ;
;  clk8                                            ; N/A   ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; 2.549 ; 2.757 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; 2.422 ; 2.639 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; 3.218 ; 3.271 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; 3.218 ; 3.264 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; 2.854 ; 2.913 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; 2.944 ; 3.000 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; 3.124 ; 3.271 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; 2.349 ; 2.541 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; 2.392 ; 2.639 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 3.339 ; 3.268 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.425 ; 2.295 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.903 ; 2.824 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.498 ; 2.383 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.228 ; 3.243 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.101 ; 3.033 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.518 ; 2.467 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.442 ; 2.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.786 ; 2.697 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.794 ; 2.802 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.851 ; 2.848 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.790 ; 2.796 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.650 ; 2.648 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.774 ; 2.717 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.272 ; 3.268 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.339 ; 3.238 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.263 ; 3.180 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; 5.619 ; 5.843 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; dotclock_n   ; clk8       ; -0.920 ; -1.242 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; ioef_n       ; clk8       ; -0.871 ; -1.189 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_q[*]     ; clk8       ; -1.047 ; -1.311 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[0]    ; clk8       ; -1.158 ; -1.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[1]    ; clk8       ; -1.047 ; -1.311 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[2]    ; clk8       ; -1.164 ; -1.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_q[3]    ; clk8       ; -1.221 ; -1.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; phi2_n       ; clk8       ; -0.832 ; -1.159 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; romlh_n      ; clk8       ; -0.871 ; -1.181 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.365 ; -0.583 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.361 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.361 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.356 ; -0.543 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.347 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.347 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.340 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.340 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.341 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.347 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.347 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.346 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.370 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.370 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; spi_miso     ; clk8       ; -2.254 ; -2.895 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 6.482 ; 6.561 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 6.482 ; 6.561 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 4.348 ; 4.444 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 4.597 ; 4.769 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 4.370 ; 4.494 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 5.900 ; 5.651 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 5.989 ; 6.243 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 5.739 ; 6.027 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 4.927 ; 5.041 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 4.881 ; 5.063 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 5.989 ; 6.243 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 4.866 ; 4.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.702 ; 3.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.414 ; 3.376 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.502 ; 3.478 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.866 ; 4.932 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.685 ; 3.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.495 ; 3.471 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.416 ; 3.378 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.483 ; 3.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.850 ; 4.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.491 ; 3.467 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.503 ; 3.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.471 ; 3.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 7.490 ; 7.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.366 ; 4.218 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 6.630 ; 6.346 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 5.465 ; 5.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.490 ; 7.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.849 ; 6.541 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 5.157 ; 4.994 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.785 ; 4.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.749 ; 4.632 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.716 ; 4.555 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 5.150 ; 4.947 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 5.157 ; 4.994 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.573 ; 5.741 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.076 ; 5.187 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 5.796 ; 5.802 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.112 ; 4.028 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.389 ; 4.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.102 ; 4.011 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 5.796 ; 5.802 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.684 ; 4.560 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.890 ; 6.736 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.663 ; 6.410 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.251 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.103 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; mux[*]       ; clk8       ; 1.848 ; 1.763 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[0]      ; clk8       ; 3.108 ; 2.945 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[1]      ; clk8       ; 1.848 ; 1.763 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[2]      ; clk8       ; 1.977 ; 1.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux[3]      ; clk8       ; 1.877 ; 1.786 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_clk      ; clk8       ; 2.341 ; 2.487 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; mux_d[*]     ; clk8       ; 2.092 ; 1.979 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[0]    ; clk8       ; 2.526 ; 2.379 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[1]    ; clk8       ; 2.092 ; 1.979 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[2]    ; clk8       ; 2.103 ; 1.992 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  mux_d[3]    ; clk8       ; 2.669 ; 2.485 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_addr[*]   ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.532 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.400 ; 1.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.517 ; 1.589 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.392 ; 1.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.351 ; 1.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.385 ; 1.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.266 ; 2.324 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.388 ; 1.409 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.397 ; 1.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.372 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.387 ; 1.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.365 ; 1.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 1.716 ; 1.790 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 1.716 ; 1.790 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.621 ; 2.810 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.168 ; 2.321 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.323 ; 3.547 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.735 ; 2.935 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 1.852 ; 1.933 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 1.920 ; 2.017 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 1.891 ; 1.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 1.852 ; 1.933 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.034 ; 2.168 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 2.049 ; 2.169 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.429 ; 2.283 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.189 ; 2.064 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 1.615 ; 1.685 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 1.625 ; 1.685 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 1.726 ; 1.796 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 1.615 ; 1.686 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 2.643 ; 2.777 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 1.852 ; 1.957 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 2.799 ; 3.056 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.659 ; 2.886 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.461 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.499 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; Pin         ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; red[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; nHSync      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; nVSync      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_clk      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[0]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[1]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[2]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[3]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[4]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[5]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[6]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[7]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[8]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[9]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[10] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[11] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[12] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ba_0     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ba_1     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_we_n     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ras_n    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_cas_n    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ldqm     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_udqm     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_clk     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[0]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[1]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[2]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[3]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sigmaL      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sigmaR      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[0]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[1]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[2]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[3]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[4]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[5]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[6]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[7]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[8]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[9]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[10] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[11] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[12] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[13] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[14] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[15] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+


+----------------------------------------------------------------+
; Input Transition Times                                         ;
+-------------+--------------+-----------------+-----------------+
; Pin         ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+-------------+--------------+-----------------+-----------------+
; freeze_n    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mmc_cd_n    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mmc_wp      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_tx    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_clk   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_rts   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_cts   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[0]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[1]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[2]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[3]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[4]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[5]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[6]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[7]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[8]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[9]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[10] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[11] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[12] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[13] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[14] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[15] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; clk8        ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[1]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; phi2_n      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; dotclock_n  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; ioef_n      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; spi_miso    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[0]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[2]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[3]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; romlh_n     ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
+-------------+--------------+-----------------+-----------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; red[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; red[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; red[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; red[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; red[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; grn[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; grn[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; blu[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; blu[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; nHSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; nVSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_clk      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.64e-07 V                   ; 2.34 V              ; -0.00283 V          ; 0.121 V                              ; 0.028 V                              ; 1.16e-09 s                  ; 1.21e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.64e-07 V                  ; 2.34 V             ; -0.00283 V         ; 0.121 V                             ; 0.028 V                             ; 1.16e-09 s                 ; 1.21e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.64e-07 V                   ; 2.34 V              ; -0.00283 V          ; 0.121 V                              ; 0.028 V                              ; 1.16e-09 s                  ; 1.21e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.64e-07 V                  ; 2.34 V             ; -0.00283 V         ; 0.121 V                             ; 0.028 V                             ; 1.16e-09 s                 ; 1.21e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_0     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_1     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_we_n     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ras_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_cas_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; sd_ldqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_udqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_clk     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; mux[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; mux[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sigmaL      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sigmaR      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_data[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; sd_data[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[13] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[14] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[15] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; red[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; red[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; red[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; red[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; red[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; grn[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; grn[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; blu[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; blu[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; nHSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; nVSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_clk      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 5.17e-08 V                   ; 2.68 V              ; -0.0186 V           ; 0.221 V                              ; 0.079 V                              ; 6.92e-10 s                  ; 7.39e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 5.17e-08 V                  ; 2.68 V             ; -0.0186 V          ; 0.221 V                             ; 0.079 V                             ; 6.92e-10 s                 ; 7.39e-10 s                 ; No                        ; Yes                       ;
; sd_addr[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_addr[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 5.17e-08 V                   ; 2.68 V              ; -0.0186 V           ; 0.221 V                              ; 0.079 V                              ; 6.92e-10 s                  ; 7.39e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 5.17e-08 V                  ; 2.68 V             ; -0.0186 V          ; 0.221 V                             ; 0.079 V                             ; 6.92e-10 s                 ; 7.39e-10 s                 ; No                        ; Yes                       ;
; sd_addr[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_addr[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_0     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_1     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_we_n     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ras_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_cas_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; sd_ldqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_udqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_clk     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; mux[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; mux[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sigmaL      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sigmaR      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_data[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; sd_data[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[13] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[14] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[15] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                               ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 7251     ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 156      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 638      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 4677383  ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 7251     ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 156      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 638      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 4677383  ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                                                            ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 109      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 9079     ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                                                             ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 109      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 9079     ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 0     ; 0    ;
; Unconstrained Input Ports       ; 25    ; 25   ;
; Unconstrained Input Port Paths  ; 63    ; 63   ;
; Unconstrained Output Ports      ; 64    ; 64   ;
; Unconstrained Output Port Paths ; 80    ; 80   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Mon Jul 21 22:11:06 2014
Info: Command: quartus_sta atari800core -c atari800core
Info: qsta_default_script.tcl version: #1
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (21077): Core supply voltage is 1.2V
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Info (332104): Reading SDC File: 'atari800core.sdc'
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 156 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[0]} {pll|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 78 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[1]} {pll|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 156 -phase 180.00 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[2]} {pll|altpll_component|auto_generated|pll1|clk[2]}
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow 1200mV 85C Model
Info (332146): Worst-case setup slack is 1.073
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.073         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.544         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.404
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.404         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.454         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 2.263
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     2.263         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     9.007         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.606
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.606         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     4.678         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.099
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.099         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.501         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.409         0.000 clk8 
Info: Analyzing Slow 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 1.558
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.558         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     2.034         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.385
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.385         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.402         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 2.680
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     2.680         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     9.697         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.455
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.455         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     4.197         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.101
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.101         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.465         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.394         0.000 clk8 
Info: Analyzing Fast 1200mV 0C Model
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 5.501
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.501         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     5.627         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case hold slack is 0.135
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.135         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.186         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 5.820
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.820         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):    13.630         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 0.681
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.681         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     2.146         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case minimum pulse width slack is 4.190
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.190         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.561         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.089         0.000 clk8 
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 499 megabytes
    Info: Processing ended: Mon Jul 21 22:11:30 2014
    Info: Elapsed time: 00:00:24
    Info: Total CPU time (on all processors): 00:00:28


