TimeQuest Timing Analyzer report for atari800core
Fri Jul 18 21:42:18 2014
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow 1200mV 85C Model Fmax Summary
  7. Timing Closure Recommendations
  8. Slow 1200mV 85C Model Setup Summary
  9. Slow 1200mV 85C Model Hold Summary
 10. Slow 1200mV 85C Model Recovery Summary
 11. Slow 1200mV 85C Model Removal Summary
 12. Slow 1200mV 85C Model Minimum Pulse Width Summary
 13. Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 14. Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 15. Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 16. Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 17. Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 18. Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 19. Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 20. Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 21. Slow 1200mV 85C Model Minimum Pulse Width: 'clk8'
 22. Setup Times
 23. Hold Times
 24. Clock to Output Times
 25. Minimum Clock to Output Times
 26. Output Enable Times
 27. Minimum Output Enable Times
 28. Output Disable Times
 29. Minimum Output Disable Times
 30. Slow 1200mV 85C Model Metastability Report
 31. Slow 1200mV 0C Model Fmax Summary
 32. Slow 1200mV 0C Model Setup Summary
 33. Slow 1200mV 0C Model Hold Summary
 34. Slow 1200mV 0C Model Recovery Summary
 35. Slow 1200mV 0C Model Removal Summary
 36. Slow 1200mV 0C Model Minimum Pulse Width Summary
 37. Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 38. Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 39. Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 40. Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 41. Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 42. Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 43. Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 44. Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 45. Slow 1200mV 0C Model Minimum Pulse Width: 'clk8'
 46. Setup Times
 47. Hold Times
 48. Clock to Output Times
 49. Minimum Clock to Output Times
 50. Output Enable Times
 51. Minimum Output Enable Times
 52. Output Disable Times
 53. Minimum Output Disable Times
 54. Slow 1200mV 0C Model Metastability Report
 55. Fast 1200mV 0C Model Setup Summary
 56. Fast 1200mV 0C Model Hold Summary
 57. Fast 1200mV 0C Model Recovery Summary
 58. Fast 1200mV 0C Model Removal Summary
 59. Fast 1200mV 0C Model Minimum Pulse Width Summary
 60. Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 61. Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 62. Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 63. Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 64. Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 65. Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 66. Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'
 67. Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'
 68. Fast 1200mV 0C Model Minimum Pulse Width: 'clk8'
 69. Setup Times
 70. Hold Times
 71. Clock to Output Times
 72. Minimum Clock to Output Times
 73. Output Enable Times
 74. Minimum Output Enable Times
 75. Output Disable Times
 76. Minimum Output Disable Times
 77. Fast 1200mV 0C Model Metastability Report
 78. Multicorner Timing Analysis Summary
 79. Setup Times
 80. Hold Times
 81. Clock to Output Times
 82. Minimum Clock to Output Times
 83. Board Trace Model Assignments
 84. Input Transition Times
 85. Slow Corner Signal Integrity Metrics
 86. Fast Corner Signal Integrity Metrics
 87. Setup Transfers
 88. Hold Transfers
 89. Recovery Transfers
 90. Removal Transfers
 91. Report TCCS
 92. Report RSKM
 93. Unconstrained Paths
 94. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; atari800core                                                      ;
; Device Family      ; Cyclone III                                                       ;
; Device Name        ; EP3C25E144C8                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Enabled                                                           ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.28        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;  27.6%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------+
; SDC File List                                        ;
+------------------+--------+--------------------------+
; SDC File Path    ; Status ; Read at                  ;
+------------------+--------+--------------------------+
; atari800core.sdc ; OK     ; Fri Jul 18 21:41:52 2014 ;
+------------------+--------+--------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                             ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+
; Clock Name                                      ; Type      ; Period  ; Frequency  ; Rise  ; Fall   ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source                                            ; Targets                                             ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+
; clk8                                            ; Base      ; 125.000 ; 8.0 MHz    ; 0.000 ; 62.500 ;            ;           ;             ;       ;        ;           ;            ;          ;        ;                                                   ; { clk8 }                                            ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 8.814   ; 113.46 MHz ; 0.000 ; 4.407  ; 50.00      ; 11        ; 156         ;       ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[0] } ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 17.628  ; 56.73 MHz  ; 0.000 ; 8.814  ; 50.00      ; 11        ; 78          ;       ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[1] } ;
; pll|altpll_component|auto_generated|pll1|clk[2] ; Generated ; 8.814   ; 113.46 MHz ; 4.407 ; 8.814  ; 50.00      ; 11        ; 156         ; 180.0 ;        ;           ;            ; false    ; clk8   ; pll|altpll_component|auto_generated|pll1|inclk[0] ; { pll|altpll_component|auto_generated|pll1|clk[2] } ;
+-------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+---------------------------------------------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Fmax Summary                                                    ;
+------------+-----------------+-------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                      ; Note ;
+------------+-----------------+-------------------------------------------------+------+
; 62.41 MHz  ; 62.41 MHz       ; pll|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 146.78 MHz ; 146.78 MHz      ; pll|altpll_component|auto_generated|pll1|clk[0] ;      ;
+------------+-----------------+-------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


----------------------------------
; Timing Closure Recommendations ;
----------------------------------
HTML report is unavailable in plain text report export.


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup Summary                                     ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.606 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 2.001 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.402 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.454 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery Summary                                   ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 10.409 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal Summary                                   ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.662 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width Summary                        ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.099  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.505  ; 0.000         ;
; clk8                                            ; 62.409 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                         ;
+-------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                               ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 15.932     ;
; 1.623 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 15.923     ;
; 1.668 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.879     ;
; 1.710 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.091     ; 15.828     ;
; 1.714 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.830     ;
; 1.773 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.774     ;
; 1.810 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.737     ;
; 1.848 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 15.700     ;
; 1.864 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.680     ;
; 1.874 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 15.645     ;
; 1.875 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.659     ;
; 1.881 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.653     ;
; 1.884 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 15.665     ;
; 1.892 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.652     ;
; 1.894 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.099     ; 15.636     ;
; 1.900 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 15.621     ;
; 1.940 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.607     ;
; 1.951 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.596     ;
; 1.979 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.555     ;
; 1.985 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 15.549     ;
; 1.986 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 15.533     ;
; 2.032 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.515     ;
; 2.040 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.099     ; 15.490     ;
; 2.042 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.502     ;
; 2.044 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.109     ; 15.476     ;
; 2.044 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.500     ;
; 2.049 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.495     ;
; 2.049 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 15.472     ;
; 2.075 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 15.446     ;
; 2.089 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.456     ;
; 2.102 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 15.417     ;
; 2.105 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 15.408     ;
; 2.108 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 15.445     ;
; 2.108 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 15.448     ;
; 2.115 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 15.439     ;
; 2.117 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.427     ;
; 2.120 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 15.429     ;
; 2.121 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 15.425     ;
; 2.123 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.421     ;
; 2.129 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 15.392     ;
; 2.130 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 15.419     ;
; 2.132 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 15.387     ;
; 2.136 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 15.383     ;
; 2.140 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.405     ;
; 2.143 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.401     ;
; 2.153 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.099     ; 15.377     ;
; 2.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.392     ;
; 2.158 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.099     ; 15.372     ;
; 2.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.386     ;
; 2.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 15.348     ;
; 2.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 15.363     ;
; 2.183 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 15.370     ;
; 2.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[7]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 15.355     ;
; 2.190 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.109     ; 15.330     ;
; 2.194 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.345     ;
; 2.202 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.345     ;
; 2.210 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.337     ;
; 2.217 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 15.320     ;
; 2.220 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 15.298     ;
; 2.224 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.315     ;
; 2.225 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.083     ; 15.321     ;
; 2.225 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[7]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 15.325     ;
; 2.227 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 15.289     ;
; 2.237 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 15.300     ;
; 2.244 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.303     ;
; 2.244 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 15.275     ;
; 2.245 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 15.274     ;
; 2.250 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 15.269     ;
; 2.251 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 15.262     ;
; 2.274 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[29] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 15.279     ;
; 2.295 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[3]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 15.253     ;
; 2.296 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 15.248     ;
; 2.298 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.241     ;
; 2.303 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.109     ; 15.217     ;
; 2.303 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.086     ; 15.240     ;
; 2.308 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.109     ; 15.212     ;
; 2.311 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.234     ;
; 2.322 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.225     ;
; 2.327 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[4]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.118     ; 15.184     ;
; 2.328 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.090     ; 15.211     ;
; 2.329 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 15.220     ;
; 2.330 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 15.189     ;
; 2.333 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 15.222     ;
; 2.339 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[6]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 15.201     ;
; 2.348 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 15.165     ;
; 2.354 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.193     ;
; 2.355 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.192     ;
; 2.357 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.188     ;
; 2.359 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 15.198     ;
; 2.361 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.184     ;
; 2.363 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 15.182     ;
; 2.363 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 15.174     ;
; 2.364 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 15.149     ;
; 2.366 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.082     ; 15.181     ;
; 2.366 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[0]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 15.188     ;
; 2.369 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.116     ; 15.144     ;
; 2.377 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 15.172     ;
; 2.380 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|write_en_r                                                        ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 15.185     ;
; 2.383 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 15.166     ;
; 2.383 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.092     ; 15.154     ;
+-------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                      ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                ; To Node                                             ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 2.001 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 6.585      ;
; 2.061 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 6.518      ;
; 2.067 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 6.471      ;
; 2.092 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 6.446      ;
; 2.101 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.150     ; 6.434      ;
; 2.104 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.500      ;
; 2.148 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 6.390      ;
; 2.161 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 6.367      ;
; 2.189 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 6.349      ;
; 2.213 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 6.333      ;
; 2.216 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 6.315      ;
; 2.217 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 6.321      ;
; 2.218 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 6.328      ;
; 2.227 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 6.359      ;
; 2.228 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 6.358      ;
; 2.268 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.106     ; 6.311      ;
; 2.294 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 6.244      ;
; 2.327 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.150     ; 6.208      ;
; 2.328 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.150     ; 6.207      ;
; 2.334 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 6.209      ;
; 2.368 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.157     ; 6.160      ;
; 2.394 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 6.142      ;
; 2.402 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 6.129      ;
; 2.403 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 6.323      ;
; 2.403 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 6.135      ;
; 2.407 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.133      ;
; 2.415 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 6.123      ;
; 2.418 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 6.184      ;
; 2.432 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.301      ;
; 2.432 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 6.108      ;
; 2.441 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.152     ; 6.092      ;
; 2.456 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 6.075      ;
; 2.478 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.255      ;
; 2.521 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 6.085      ;
; 2.521 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 6.076      ;
; 2.526 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 6.066      ;
; 2.539 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.064      ;
; 2.544 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 5.996      ;
; 2.545 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.188      ;
; 2.560 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 5.983      ;
; 2.561 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 5.982      ;
; 2.573 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.099     ; 6.013      ;
; 2.586 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.100     ; 5.999      ;
; 2.593 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 6.011      ;
; 2.595 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 6.131      ;
; 2.601 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.149     ; 5.935      ;
; 2.602 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 6.124      ;
; 2.623 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.146     ; 5.916      ;
; 2.626 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 5.977      ;
; 2.628 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.146     ; 5.911      ;
; 2.634 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.145     ; 5.906      ;
; 2.636 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 5.969      ;
; 2.640 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 5.952      ;
; 2.645 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.135     ; 5.905      ;
; 2.647 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 5.958      ;
; 2.652 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.081      ;
; 2.659 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 6.067      ;
; 2.660 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.088     ; 5.937      ;
; 2.671 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 5.921      ;
; 2.673 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.150     ; 5.862      ;
; 2.674 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 5.863      ;
; 2.687 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.153     ; 5.845      ;
; 2.688 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.045      ;
; 2.694 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 5.910      ;
; 2.698 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.089     ; 6.028      ;
; 2.699 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 5.838      ;
; 2.704 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 6.016      ;
; 2.704 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 6.016      ;
; 2.704 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 6.016      ;
; 2.704 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 6.016      ;
; 2.704 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 6.016      ;
; 2.704 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 6.016      ;
; 2.704 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 6.016      ;
; 2.704 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 6.016      ;
; 2.718 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.813      ;
; 2.727 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 6.006      ;
; 2.727 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 5.865      ;
; 2.734 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 5.999      ;
; 2.736 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 5.866      ;
; 2.743 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.788      ;
; 2.746 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.785      ;
; 2.750 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.146     ; 5.789      ;
; 2.752 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 5.840      ;
; 2.753 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 5.839      ;
; 2.755 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.148     ; 5.782      ;
; 2.761 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.147     ; 5.777      ;
; 2.762 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.102     ; 5.821      ;
; 2.764 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.154     ; 5.767      ;
; 2.769 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.093     ; 5.823      ;
; 2.773 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.082     ; 5.960      ;
; 2.775 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.146     ; 5.764      ;
; 2.782 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 5.938      ;
; 2.782 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 5.938      ;
; 2.782 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 5.938      ;
; 2.782 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 5.938      ;
; 2.782 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 5.938      ;
; 2.782 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 5.938      ;
; 2.782 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 5.938      ;
; 2.782 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.095     ; 5.938      ;
; 2.787 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 5.817      ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                     ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.140      ;
; 0.404 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][4]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.138      ;
; 0.406 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][7]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.139      ;
; 0.407 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][1]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.141      ;
; 0.407 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][5]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.145      ;
; 0.413 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][2]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.152      ;
; 0.414 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.147      ;
; 0.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][2]                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.155      ;
; 0.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][5]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.149      ;
; 0.418 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.156      ;
; 0.419 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][3]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.153      ;
; 0.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][7]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.483      ; 1.157      ;
; 0.421 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][0]                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.160      ;
; 0.421 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][7]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.154      ;
; 0.422 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][3]                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.161      ;
; 0.422 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.160      ;
; 0.425 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][4]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.163      ;
; 0.425 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[1]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.163      ;
; 0.431 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][1]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.164      ;
; 0.432 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[10]                                                                                                                                                  ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.472      ; 1.158      ;
; 0.432 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][0]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.166      ;
; 0.433 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[8]                                                                                                                                                   ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.472      ; 1.159      ;
; 0.433 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][0]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.166      ;
; 0.436 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][3]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.169      ;
; 0.436 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.174      ;
; 0.437 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][6]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.170      ;
; 0.438 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[9]                                                                                                                                                   ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.472      ; 1.164      ;
; 0.440 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.178      ;
; 0.441 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][5]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.487      ; 1.182      ;
; 0.447 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][1]                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.485      ; 1.186      ;
; 0.447 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][1]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.180      ;
; 0.448 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][7]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.480      ; 1.182      ;
; 0.448 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.186      ;
; 0.449 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][1]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.484      ; 1.187      ;
; 0.450 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][4]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.183      ;
; 0.451 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_address_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.473      ; 1.178      ;
; 0.452 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][2]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.479      ; 1.185      ;
; 0.452 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][6]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.187      ;
; 0.453 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[7]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[7]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|write_enable_reg                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|write_enable_reg                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][4]                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.487      ; 1.194      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[3]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[2]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[0]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[1]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[4]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[5]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[6]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf0_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|spi_speed_reg[7]                                                                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                    ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_reg                                                                                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_reg                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[7]                                                                                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[7]                                                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[6]                                                                                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[6]                                                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_mult5                                                                                                                                          ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_mult5                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[11]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[11]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21]                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                                                                           ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|mosi~reg0                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|mosi~reg0                                                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                                                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                                                                                                                            ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                                                                                                                                 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                                                                                                                                 ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_ba_reg                                                                                                                                                                          ; chameleon_io:chameleon_io|c64_ba_reg                                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC                                                                                                            ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                                                                                                                            ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                                                                                                                            ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                                                                                                                            ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_1mhz:my1Mhz|cnt[0]                                                                                                                                                                                  ; chameleon_1mhz:my1Mhz|cnt[0]                                                                                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET                                                                                                                  ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                                                                                                                           ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_kb_ack                                                                                                                                                                          ; chameleon_io:chameleon_io|c64_kb_ack                                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; chameleon_io:chameleon_io|c64_cs_loc                                                                                                                                                                          ; chameleon_io:chameleon_io|c64_cs_loc                                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[1]                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[1]                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[2]                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[2]                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[3]                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[3]                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                      ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                     ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.454 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|reply_reg                    ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.466 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.758      ;
; 0.493 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.784      ;
; 0.579 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.871      ;
; 0.595 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.887      ;
; 0.717 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.009      ;
; 0.738 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.029      ;
; 0.741 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.032      ;
; 0.741 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.032      ;
; 0.741 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.032      ;
; 0.742 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.033      ;
; 0.743 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.034      ;
; 0.743 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.034      ;
; 0.747 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.038      ;
; 0.747 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.038      ;
; 0.747 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.038      ;
; 0.749 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.040      ;
; 0.750 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.041      ;
; 0.750 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.041      ;
; 0.750 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.041      ;
; 0.752 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.043      ;
; 0.752 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.043      ;
; 0.763 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.054      ;
; 0.765 ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.056      ;
; 0.771 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.062      ;
; 0.773 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.064      ;
; 0.775 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.066      ;
; 0.789 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.080      ;
; 0.795 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.086      ;
; 0.796 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.087      ;
; 0.843 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.135      ;
; 0.884 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.176      ;
; 0.912 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.204      ;
; 1.093 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.384      ;
; 1.095 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.386      ;
; 1.095 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.386      ;
; 1.098 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.390      ;
; 1.102 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.393      ;
; 1.102 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.393      ;
; 1.102 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.393      ;
; 1.102 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.393      ;
; 1.103 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.394      ;
; 1.103 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.394      ;
; 1.104 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.395      ;
; 1.104 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.395      ;
; 1.104 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.395      ;
; 1.111 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.402      ;
; 1.111 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.402      ;
; 1.111 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.402      ;
; 1.111 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.402      ;
; 1.113 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.404      ;
; 1.113 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.404      ;
; 1.113 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.404      ;
; 1.113 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.404      ;
; 1.117 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.408      ;
; 1.120 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.411      ;
; 1.120 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.411      ;
; 1.120 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.411      ;
; 1.122 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.413      ;
; 1.122 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.413      ;
; 1.126 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.417      ;
; 1.134 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.425      ;
; 1.136 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.427      ;
; 1.143 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.434      ;
; 1.145 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.436      ;
; 1.150 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.441      ;
; 1.150 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.441      ;
; 1.159 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.450      ;
; 1.220 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.512      ;
; 1.224 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.515      ;
; 1.226 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.517      ;
; 1.226 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.517      ;
; 1.233 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.524      ;
; 1.233 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.524      ;
; 1.234 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.525      ;
; 1.235 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.526      ;
; 1.235 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.526      ;
; 1.235 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.526      ;
; 1.237 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.529      ;
; 1.242 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.533      ;
; 1.242 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.533      ;
; 1.242 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.533      ;
; 1.243 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.534      ;
; 1.244 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.535      ;
; 1.244 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.535      ;
; 1.244 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.535      ;
; 1.248 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.539      ;
; 1.251 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.542      ;
; 1.251 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.542      ;
; 1.251 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.542      ;
; 1.251 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.542      ;
; 1.253 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.544      ;
; 1.253 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.544      ;
; 1.257 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.548      ;
; 1.257 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.548      ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                      ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                                                                                                    ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 10.409 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 7.131      ;
; 10.409 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 7.131      ;
; 10.409 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 7.131      ;
; 10.409 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.089     ; 7.131      ;
; 10.424 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[7]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.126      ;
; 10.455 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.095      ;
; 10.455 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.095      ;
; 10.455 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.096      ;
; 10.455 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.095      ;
; 10.455 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.095      ;
; 10.455 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.095      ;
; 10.455 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.096      ;
; 10.455 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 7.095      ;
; 10.455 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 7.096      ;
; 10.861 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 6.681      ;
; 10.861 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.087     ; 6.681      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 6.632      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 6.632      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 6.632      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 6.632      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 6.632      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 6.632      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.628      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.628      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.628      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.628      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.628      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.628      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.628      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.628      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.628      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.628      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_out_reg                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 6.632      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|twotone_reg                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 6.632      ;
; 10.886 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|sio_out_reg                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.111     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|sio_in_reg                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 6.634      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[3]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[5]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[1]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[4]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[5]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[6]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|enabled_out_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.110     ; 6.632      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 6.634      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.113     ; 6.629      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.108     ; 6.634      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[4]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[6]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.114     ; 6.628      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.627      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.627      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.627      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.627      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.627      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.627      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.627      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.115     ; 6.627      ;
; 10.887 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.112     ; 6.630      ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.662 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.395      ; 2.268      ;
; 1.892 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.535      ;
; 1.892 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.535      ;
; 1.892 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.535      ;
; 1.892 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.535      ;
; 1.892 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.535      ;
; 1.892 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.535      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.026 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.397      ; 2.634      ;
; 2.576 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 3.217      ;
; 2.576 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 3.217      ;
; 2.576 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 3.217      ;
; 2.576 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 3.217      ;
; 2.576 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 3.217      ;
; 2.576 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 3.217      ;
; 2.576 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 3.217      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_direction_reg[0]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.110      ; 5.064      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_input_reg[0]                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.110      ; 5.064      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[4]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[5]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[6]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[7]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[2]                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.108      ; 5.062      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|delay_line:serout_clock_delay|shift_reg[0]                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 5.063      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_clock_reg                                                                                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 5.063      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_clock_last_reg                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 5.063      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_holding_full_reg                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 5.063      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_holding_reg[1]                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 5.063      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_holding_reg[2]                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 5.063      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_holding_reg[3]                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 5.063      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_holding_reg[5]                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 5.063      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_shift_reg[9]                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 5.063      ;
; 4.742 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_holding_reg[7]                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.109      ; 5.063      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                            ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------+
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ;
; 4.100 ; 4.320        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ;
; 4.101 ; 4.321        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|reply_reg                    ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg                ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ;
; 4.106 ; 4.326        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ;
; 4.106 ; 4.326        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ;
; 4.106 ; 4.326        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ;
; 4.106 ; 4.326        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ;
; 4.106 ; 4.326        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ;
; 4.106 ; 4.326        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ;
; 4.106 ; 4.326        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ;
; 4.106 ; 4.326        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ;
; 4.107 ; 4.327        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ;
; 4.107 ; 4.327        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ;
; 4.107 ; 4.327        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ;
; 4.107 ; 4.327        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ;
; 4.196 ; 4.354        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ;
; 4.198 ; 4.356        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ;
; 4.198 ; 4.356        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ;
; 4.204 ; 4.362        ; 0.158          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ;
; 4.212 ; 4.365        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ;
; 4.212 ; 4.365        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|ras_n_reg                    ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|udqm_reg                     ;
; 4.213 ; 4.366        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|we_n_reg                     ;
; 4.214 ; 4.367        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ;
; 4.214 ; 4.367        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ;
; 4.214 ; 4.367        ; 0.153          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|ba_reg[0]                    ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                             ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                         ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+------------------------------------------------------------------------------------------------+
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_clk_reg                                                          ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[1]                                                         ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A1                                                     ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_2                                                 ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0VIC                                                  ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_1                                                 ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1RD_2                                                 ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC4                                                   ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC0L                                                  ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC2H                                                  ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5H                                                  ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC7H                                                  ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_RESET                                                  ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_WAIT0                                                  ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_WAIT1                                                  ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_toggle                                                           ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[0]                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[1]                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[2]                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[3]                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[4]                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[6]                              ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[0] ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[1] ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[2] ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[3] ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[4] ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[5] ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[6] ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[7] ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                     ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                     ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                     ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                     ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_last_reg                      ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                           ;
; 8.505 ; 8.725        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[4]                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[0]                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[11]                                                    ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[1]                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[2]                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[3]                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[4]                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[5]                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[7]                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_1                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_2                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_3                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_4                                                               ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_cdtv                                                            ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_ff                                                              ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_genlock                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_play                                                            ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_power                                                           ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_rew                                                             ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|key_stop                                                            ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[12]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[13]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[14]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[15]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[16]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[17]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[1]                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                        ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[2]                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[3]                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[4]                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[5]                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                         ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A0                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_A2                                                     ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_BUSVIC                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_1                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_2                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1VIC                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_2                                                 ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_END0                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC1                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC3                                                   ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_LED                                                    ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC1H                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC1L                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC2L                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC3H                                                  ;
; 8.506 ; 8.726        ; 0.220          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC3L                                                  ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'clk8'                                                                                           ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.409  ; 62.409       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.449  ; 62.449       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.481  ; 62.481       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.518  ; 62.518       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.551  ; 62.551       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.588  ; 62.588       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.557 ; 3.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.557 ; 3.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.048 ; 2.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.623 ; 2.542 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.165 ; 3.160 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.326 ; 3.167 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.677 ; 2.531 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.347 ; 2.266 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.954 ; 2.875 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.295 ; 2.224 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.768 ; 2.759 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.758 ; 2.682 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.675 ; 2.536 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.419 ; 3.207 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.226 ; 3.236 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.818 ; 2.719 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.402 ; 2.288 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; dotclock_n   ; clk8       ; 2.534 ; 2.671 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; ioef_n       ; clk8       ; 3.262 ; 3.420 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_q[*]     ; clk8       ; 2.918 ; 3.017 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[0]    ; clk8       ; 2.426 ; 2.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[1]    ; clk8       ; 2.918 ; 3.017 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[2]    ; clk8       ; 2.205 ; 2.426 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[3]    ; clk8       ; 2.421 ; 2.611 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; phi2_n       ; clk8       ; 2.684 ; 2.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; romlh_n      ; clk8       ; 2.415 ; 2.595 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; 5.381 ; 5.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.642 ; -0.691 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.644 ; -0.693 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.644 ; -0.693 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.606 ; -0.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.597 ; -0.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.598 ; -0.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.590 ; -0.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.589 ; -0.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.598 ; -0.646 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.597 ; -0.645 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.596 ; -0.644 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.658 ; -0.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.658 ; -0.707 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; dotclock_n   ; clk8       ; -1.749 ; -1.870 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; ioef_n       ; clk8       ; -2.466 ; -2.619 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_q[*]     ; clk8       ; -1.276 ; -1.368 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[0]    ; clk8       ; -1.276 ; -1.368 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[1]    ; clk8       ; -1.645 ; -1.750 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[2]    ; clk8       ; -1.422 ; -1.648 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[3]    ; clk8       ; -1.405 ; -1.556 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; phi2_n       ; clk8       ; -1.894 ; -1.974 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; romlh_n      ; clk8       ; -1.624 ; -1.812 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; -4.494 ; -4.737 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_addr[*]   ; clk8       ; 4.810 ; 4.869 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.373 ; 3.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.653 ; 3.739 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.365 ; 3.320 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.465 ; 3.434 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.808 ; 4.867 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.637 ; 3.723 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.450 ; 3.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.450 ; 3.419 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.448 ; 3.417 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.810 ; 4.869 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.456 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.368 ; 3.323 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.456 ; 3.399 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.444 ; 3.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.801 ; 4.860 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.442 ; 3.411 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.461 ; 3.404 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.449 ; 3.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.438 ; 3.381 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.890 ; 4.934 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.449 ; 3.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.450 ; 3.393 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.451 ; 3.394 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.357 ; 3.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.357 ; 3.312 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.428 ; 3.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.439 ; 3.382 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.437 ; 3.380 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.438 ; 3.381 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 8.293 ; 8.038 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.727 ; 4.596 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.488 ; 5.339 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 6.728 ; 6.458 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 8.293 ; 8.038 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.619 ; 6.501 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 4.726 ; 4.571 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.056 ; 4.001 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.408 ; 4.327 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.350 ; 4.264 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.726 ; 4.571 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 4.383 ; 4.290 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux[*]       ; clk8       ; 6.081 ; 6.149 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[0]      ; clk8       ; 6.081 ; 6.149 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[1]      ; clk8       ; 4.960 ; 5.131 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[2]      ; clk8       ; 4.905 ; 5.056 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[3]      ; clk8       ; 4.738 ; 4.943 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_clk      ; clk8       ; 5.427 ; 5.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_d[*]     ; clk8       ; 5.377 ; 5.535 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[0]    ; clk8       ; 4.774 ; 4.952 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[1]    ; clk8       ; 4.606 ; 4.723 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[2]    ; clk8       ; 4.533 ; 4.695 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[3]    ; clk8       ; 5.377 ; 5.535 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.728 ; 5.758 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 6.676 ; 6.904 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 6.097 ; 6.051 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.710 ; 4.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.792 ; 4.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 5.159 ; 4.987 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.097 ; 6.051 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.265 ; 4.147 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.851 ; 6.718 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 7.194 ; 6.812 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.116 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.995 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_addr[*]   ; clk8       ; 2.847 ; 2.803 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 2.855 ; 2.811 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.134 ; 3.221 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 2.847 ; 2.803 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 2.947 ; 2.917 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.290 ; 4.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.119 ; 3.206 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 2.932 ; 2.902 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 2.932 ; 2.902 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 2.930 ; 2.900 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.293 ; 4.353 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 2.936 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 2.850 ; 2.806 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 2.936 ; 2.880 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.370 ; 4.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.926 ; 2.896 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.283 ; 4.343 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.924 ; 2.894 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.941 ; 2.885 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.929 ; 2.873 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.918 ; 2.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.370 ; 4.415 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.929 ; 2.873 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.930 ; 2.874 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.931 ; 2.875 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.839 ; 2.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 2.908 ; 2.852 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 2.919 ; 2.863 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 2.917 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 2.918 ; 2.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 4.162 ; 4.035 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.162 ; 4.035 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 4.892 ; 4.748 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 6.082 ; 5.821 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.642 ; 7.400 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 5.977 ; 5.862 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 3.520 ; 3.467 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 3.520 ; 3.467 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 3.857 ; 3.779 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 3.798 ; 3.714 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.163 ; 4.013 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 3.833 ; 3.743 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux[*]       ; clk8       ; 4.170 ; 4.368 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[0]      ; clk8       ; 5.521 ; 5.584 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[1]      ; clk8       ; 4.383 ; 4.549 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[2]      ; clk8       ; 4.330 ; 4.476 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[3]      ; clk8       ; 4.170 ; 4.368 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_clk      ; clk8       ; 4.834 ; 4.793 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_d[*]     ; clk8       ; 3.974 ; 4.131 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[0]    ; clk8       ; 4.205 ; 4.378 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[1]    ; clk8       ; 4.043 ; 4.157 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[2]    ; clk8       ; 3.974 ; 4.131 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[3]    ; clk8       ; 4.784 ; 4.938 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.121 ; 5.151 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 6.031 ; 6.251 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 3.717 ; 3.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.146 ; 4.015 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.224 ; 4.064 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.579 ; 4.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 5.534 ; 5.492 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 3.717 ; 3.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.203 ; 6.074 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.531 ; 6.164 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 6.643 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.526 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 5.352 ; 5.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.832 ; 5.832 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.820 ; 5.820 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.820 ; 5.820 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.402 ; 5.402 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.398 ; 5.398 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.352 ; 5.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.489 ; 5.489 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.715 ; 5.715 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.715 ; 5.715 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.708 ; 5.708 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.489 ; 5.489 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.352 ; 5.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.406 ; 5.406 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.392 ; 5.392 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.455 ; 5.455 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.455 ; 5.455 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.213 ; 4.279 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.685 ; 4.745 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.673 ; 4.733 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.673 ; 4.733 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.262 ; 4.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.258 ; 4.324 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.213 ; 4.279 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.345 ; 4.411 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.562 ; 4.628 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.562 ; 4.628 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.555 ; 4.621 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.345 ; 4.411 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.213 ; 4.279 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.266 ; 4.332 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.252 ; 4.318 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.323 ; 4.383 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.323 ; 4.383 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 5.136     ; 5.273     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.608     ; 5.739     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.599     ; 5.730     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.599     ; 5.730     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 5.169     ; 5.306     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 5.177     ; 5.314     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 5.136     ; 5.273     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.281     ; 5.418     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.444     ; 5.581     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.444     ; 5.581     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.450     ; 5.587     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.281     ; 5.418     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 5.136     ; 5.273     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.174     ; 5.311     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 5.159     ; 5.296     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.270     ; 5.401     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.270     ; 5.401     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.137     ; 4.137     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.595     ; 4.595     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.587     ; 4.587     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.587     ; 4.587     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.170     ; 4.170     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.177     ; 4.177     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.137     ; 4.137     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.277     ; 4.277     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.433     ; 4.433     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.433     ; 4.433     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.439     ; 4.439     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.277     ; 4.277     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.137     ; 4.137     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.174     ; 4.174     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.160     ; 4.160     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.271     ; 4.271     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.271     ; 4.271     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


----------------------------------------------
; Slow 1200mV 85C Model Metastability Report ;
----------------------------------------------
No synchronizer chains to report.


+---------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Fmax Summary                                                     ;
+------------+-----------------+-------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                      ; Note ;
+------------+-----------------+-------------------------------------------------+------+
; 65.63 MHz  ; 65.63 MHz       ; pll|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 154.75 MHz ; 154.75 MHz      ; pll|altpll_component|auto_generated|pll1|clk[0] ;      ;
+------------+-----------------+-------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 2.352 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 2.390 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold Summary                                       ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.382 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.403 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery Summary                                    ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 10.960 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal Summary                                    ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 1.512 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width Summary                         ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.103  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.508  ; 0.000         ;
; clk8                                            ; 62.394 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                ; To Node                                             ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 2.352 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.248      ;
; 2.361 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 6.233      ;
; 2.463 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 6.094      ;
; 2.487 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 6.070      ;
; 2.535 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.065      ;
; 2.549 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 6.067      ;
; 2.549 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 6.008      ;
; 2.588 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 6.012      ;
; 2.599 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.096     ; 5.995      ;
; 2.605 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.132     ; 5.953      ;
; 2.607 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 5.950      ;
; 2.617 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.937      ;
; 2.626 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 5.922      ;
; 2.690 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 5.862      ;
; 2.695 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 5.862      ;
; 2.726 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 5.838      ;
; 2.729 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.126     ; 5.835      ;
; 2.762 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 5.798      ;
; 2.770 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.132     ; 5.788      ;
; 2.786 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 5.774      ;
; 2.788 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.127     ; 5.775      ;
; 2.790 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.132     ; 5.768      ;
; 2.800 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.754      ;
; 2.819 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.920      ;
; 2.825 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 5.919      ;
; 2.830 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.724      ;
; 2.831 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 5.720      ;
; 2.837 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.717      ;
; 2.839 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.090     ; 5.761      ;
; 2.842 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 5.715      ;
; 2.863 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 5.881      ;
; 2.864 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.142     ; 5.684      ;
; 2.890 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.138     ; 5.662      ;
; 2.891 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 5.714      ;
; 2.900 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 5.699      ;
; 2.906 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 5.654      ;
; 2.939 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.674      ;
; 2.952 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 5.792      ;
; 2.953 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.127     ; 5.610      ;
; 2.965 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 5.645      ;
; 2.973 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.127     ; 5.590      ;
; 2.983 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.630      ;
; 2.993 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.746      ;
; 2.994 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.745      ;
; 2.994 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.130     ; 5.566      ;
; 2.995 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 5.622      ;
; 3.002 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 5.603      ;
; 3.017 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.722      ;
; 3.023 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 5.721      ;
; 3.026 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 5.579      ;
; 3.030 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 5.586      ;
; 3.031 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 5.713      ;
; 3.039 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.691      ;
; 3.039 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.691      ;
; 3.039 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.691      ;
; 3.039 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.691      ;
; 3.039 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.691      ;
; 3.039 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.691      ;
; 3.039 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.691      ;
; 3.039 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.691      ;
; 3.040 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.137     ; 5.513      ;
; 3.043 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.135     ; 5.512      ;
; 3.047 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.692      ;
; 3.053 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 5.691      ;
; 3.058 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.672      ;
; 3.058 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.672      ;
; 3.058 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.672      ;
; 3.058 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.672      ;
; 3.058 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.672      ;
; 3.058 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.672      ;
; 3.058 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.672      ;
; 3.058 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|data_out_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.086     ; 5.672      ;
; 3.061 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 5.683      ;
; 3.063 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.131     ; 5.496      ;
; 3.064 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 5.552      ;
; 3.067 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.135     ; 5.488      ;
; 3.070 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.140     ; 5.480      ;
; 3.073 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.133     ; 5.484      ;
; 3.074 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 5.531      ;
; 3.087 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.131     ; 5.472      ;
; 3.088 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 5.517      ;
; 3.091 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 5.653      ;
; 3.094 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.140     ; 5.456      ;
; 3.100 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 5.513      ;
; 3.104 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.136     ; 5.450      ;
; 3.105 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 5.446      ;
; 3.109 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.139     ; 5.442      ;
; 3.113 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 5.503      ;
; 3.122 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.132     ; 5.436      ;
; 3.125 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 5.491      ;
; 3.127 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 5.478      ;
; 3.129 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.135     ; 5.426      ;
; 3.130 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.132     ; 5.428      ;
; 3.135 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.123     ; 5.432      ;
; 3.138 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.091     ; 5.461      ;
; 3.141 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 5.469      ;
; 3.146 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.085     ; 5.459      ;
; 3.149 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.132     ; 5.409      ;
; 3.150 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 5.594      ;
; 3.156 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.140     ; 5.394      ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                          ;
+-------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                               ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 2.390 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 15.165     ;
; 2.440 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 15.116     ;
; 2.521 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 15.035     ;
; 2.522 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 15.034     ;
; 2.544 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 14.989     ;
; 2.545 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 14.987     ;
; 2.588 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 14.962     ;
; 2.604 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 14.949     ;
; 2.651 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.905     ;
; 2.675 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.881     ;
; 2.699 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.857     ;
; 2.724 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 14.809     ;
; 2.741 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 14.809     ;
; 2.771 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 14.787     ;
; 2.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.776     ;
; 2.784 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 14.773     ;
; 2.795 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.761     ;
; 2.795 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 14.751     ;
; 2.798 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 14.759     ;
; 2.806 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 14.740     ;
; 2.816 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 14.729     ;
; 2.850 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 14.708     ;
; 2.857 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 14.708     ;
; 2.863 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 14.690     ;
; 2.869 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 14.660     ;
; 2.880 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.066     ; 14.684     ;
; 2.893 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.096     ; 14.641     ;
; 2.899 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 14.654     ;
; 2.906 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 14.627     ;
; 2.913 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 14.642     ;
; 2.920 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 14.638     ;
; 2.927 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 14.630     ;
; 2.929 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 14.603     ;
; 2.942 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 14.590     ;
; 2.943 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 14.592     ;
; 2.948 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 14.598     ;
; 2.949 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 14.596     ;
; 2.959 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 14.587     ;
; 2.968 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.588     ;
; 2.977 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 14.580     ;
; 2.981 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 14.585     ;
; 2.982 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 14.551     ;
; 2.982 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 14.583     ;
; 2.989 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 14.541     ;
; 2.991 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 14.559     ;
; 2.994 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.075     ; 14.561     ;
; 3.002 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 14.527     ;
; 3.003 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 14.547     ;
; 3.005 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 14.548     ;
; 3.012 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 14.517     ;
; 3.015 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.541     ;
; 3.016 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 14.537     ;
; 3.016 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[7]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 14.533     ;
; 3.020 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 14.537     ;
; 3.021 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.096     ; 14.513     ;
; 3.026 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 14.510     ;
; 3.032 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.524     ;
; 3.043 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 14.514     ;
; 3.049 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.507     ;
; 3.051 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.065     ; 14.514     ;
; 3.052 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.066     ; 14.512     ;
; 3.056 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[4]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 14.471     ;
; 3.056 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 14.501     ;
; 3.057 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 14.497     ;
; 3.061 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 14.488     ;
; 3.064 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[28] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 14.498     ;
; 3.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 14.483     ;
; 3.068 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 14.486     ;
; 3.076 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.480     ;
; 3.076 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 14.459     ;
; 3.080 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 14.466     ;
; 3.080 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.073     ; 14.477     ;
; 3.088 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 14.474     ;
; 3.096 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.460     ;
; 3.100 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 14.433     ;
; 3.101 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 14.431     ;
; 3.103 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.101     ; 14.426     ;
; 3.107 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[27] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.449     ;
; 3.107 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.449     ;
; 3.119 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.437     ;
; 3.123 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.433     ;
; 3.124 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 14.426     ;
; 3.127 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.429     ;
; 3.133 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 14.397     ;
; 3.136 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.080     ; 14.414     ;
; 3.141 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 14.410     ;
; 3.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 14.388     ;
; 3.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[6]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.081     ; 14.396     ;
; 3.159 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 14.377     ;
; 3.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.064     ; 14.405     ;
; 3.164 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.084     ; 14.382     ;
; 3.173 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.085     ; 14.372     ;
; 3.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.071     ; 14.383     ;
; 3.177 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.103     ; 14.350     ;
; 3.179 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 14.374     ;
; 3.188 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.368     ;
; 3.192 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 14.341     ;
; 3.200 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[15] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.074     ; 14.356     ;
; 3.204 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.079     ; 14.347     ;
; 3.207 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[3]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 14.329     ;
+-------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                               ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                  ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.382 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.040      ;
; 0.388 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][5]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.044      ;
; 0.390 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.423      ; 1.043      ;
; 0.391 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][2]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.429      ; 1.050      ;
; 0.397 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][2]                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.055      ;
; 0.397 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.423      ; 1.050      ;
; 0.398 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][7]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.427      ; 1.055      ;
; 0.398 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.056      ;
; 0.400 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 1.058      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[17]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[19]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                                     ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_reg                                                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_reg                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16]                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[16]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17]                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[11]                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[11]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19]                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[19]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21]                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21]                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|mosi~reg0                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|mosi~reg0                                                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                        ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|c64_ba_reg                                                                                                                       ; chameleon_io:chameleon_io|c64_ba_reg                                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC                                                         ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                                                                         ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                                                                         ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                                                                         ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET                                                               ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                                                                        ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|c64_kb_ack                                                                                                                       ; chameleon_io:chameleon_io|c64_kb_ack                                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|c64_cs_loc                                                                                                                       ; chameleon_io:chameleon_io|c64_cs_loc                                                                                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_io:chameleon_io|c64_data_reg[4]                                                                                                                  ; chameleon_io:chameleon_io|c64_data_reg[4]                                                                                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                                                                                ; chameleon_cdtv_remote:myIr|state.STATE_IDLE                                                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                                                                         ; chameleon_cdtv_remote:myIr|state.STATE_WAIT_REPEAT                                                                                                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                                                                            ; chameleon_cdtv_remote:myIr|state.STATE_END_CODE                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[1]                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Dreg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Dreg                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[3]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[3]                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Ireg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Ireg                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[5]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[5]                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[6]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[6]                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[4]                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[4]                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_clock_reg                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|serout_clock_reg                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf1_reg[3]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[3]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[3]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|audf0_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_clock_reg                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_clock_reg                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[0]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[6]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[6]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[7]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[7]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_clock_reg                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_clock_reg                                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_holding_full_reg                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_holding_full_reg                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[1]                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_shift_reg[9]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_shift_reg[9]                                                                                                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_active_reg                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_active_reg                                                                                                                                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_out_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_out_reg                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[0]                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[41]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[41]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[59]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[59]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                                              ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[43]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[43]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[35]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[35]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[61]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[61]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[93]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[93]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[84]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[84]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[29]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[29]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[27]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[27]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[102]                                                                                                            ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[102]                                                                                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                                             ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                       ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                     ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.403 ; sdram_statemachine:sdram_adaptor|reply_reg                    ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.418 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.684      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.721      ;
; 0.538 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.804      ;
; 0.562 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.828      ;
; 0.671 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.937      ;
; 0.686 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.952      ;
; 0.688 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.954      ;
; 0.689 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.955      ;
; 0.689 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.955      ;
; 0.692 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.958      ;
; 0.692 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.958      ;
; 0.692 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.958      ;
; 0.693 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.959      ;
; 0.694 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.960      ;
; 0.696 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.962      ;
; 0.698 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.964      ;
; 0.698 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.964      ;
; 0.699 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.965      ;
; 0.700 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.966      ;
; 0.700 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.966      ;
; 0.701 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.967      ;
; 0.708 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.974      ;
; 0.709 ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.975      ;
; 0.715 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.981      ;
; 0.721 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.987      ;
; 0.723 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.989      ;
; 0.734 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.000      ;
; 0.737 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.003      ;
; 0.743 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.009      ;
; 0.794 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.060      ;
; 0.836 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.102      ;
; 0.856 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.122      ;
; 1.007 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.273      ;
; 1.008 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.274      ;
; 1.009 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.275      ;
; 1.010 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.276      ;
; 1.010 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.276      ;
; 1.013 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.279      ;
; 1.013 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.279      ;
; 1.014 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.280      ;
; 1.015 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.281      ;
; 1.016 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.282      ;
; 1.017 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.283      ;
; 1.018 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.284      ;
; 1.018 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.284      ;
; 1.019 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.285      ;
; 1.019 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.285      ;
; 1.020 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.286      ;
; 1.022 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.288      ;
; 1.022 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.288      ;
; 1.023 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.289      ;
; 1.026 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.292      ;
; 1.026 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.292      ;
; 1.032 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.298      ;
; 1.032 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.298      ;
; 1.033 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.299      ;
; 1.034 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.300      ;
; 1.034 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.300      ;
; 1.035 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.301      ;
; 1.037 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.303      ;
; 1.038 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.304      ;
; 1.040 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.306      ;
; 1.051 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.317      ;
; 1.053 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.319      ;
; 1.055 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.321      ;
; 1.059 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.325      ;
; 1.068 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.334      ;
; 1.102 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.368      ;
; 1.108 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.374      ;
; 1.108 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.374      ;
; 1.110 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.376      ;
; 1.116 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.382      ;
; 1.119 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.385      ;
; 1.120 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.386      ;
; 1.126 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.392      ;
; 1.129 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.395      ;
; 1.132 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.398      ;
; 1.132 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.398      ;
; 1.133 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.399      ;
; 1.135 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.401      ;
; 1.135 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.401      ;
; 1.137 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.403      ;
; 1.139 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.405      ;
; 1.140 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.406      ;
; 1.140 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.406      ;
; 1.141 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.407      ;
; 1.142 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.408      ;
; 1.142 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.408      ;
; 1.144 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.410      ;
; 1.144 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.410      ;
; 1.145 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.411      ;
; 1.146 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.412      ;
; 1.148 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.414      ;
; 1.154 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.420      ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                       ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                                                                                                    ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 10.960 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.592      ;
; 10.960 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.592      ;
; 10.960 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.592      ;
; 10.960 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.078     ; 6.592      ;
; 10.976 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[7]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.070     ; 6.584      ;
; 11.005 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.556      ;
; 11.005 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.556      ;
; 11.005 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.557      ;
; 11.005 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.556      ;
; 11.005 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.557      ;
; 11.005 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.557      ;
; 11.005 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.557      ;
; 11.005 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.069     ; 6.556      ;
; 11.005 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.068     ; 6.557      ;
; 11.374 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 6.180      ;
; 11.374 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.076     ; 6.180      ;
; 11.408 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_32bit_reg               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.072     ; 6.150      ;
; 11.411 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 6.142      ;
; 11.411 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[3]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 6.142      ;
; 11.411 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 6.142      ;
; 11.411 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[1]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 6.142      ;
; 11.411 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 6.142      ;
; 11.411 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 6.142      ;
; 11.411 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.077     ; 6.142      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|sio_in_reg                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 6.121      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.119      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[1]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.119      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[2]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.119      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[3]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.119      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[4]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.119      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[5]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.119      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[6]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.119      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_15_div|enabled_out_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.119      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 6.121      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 6.121      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_clock_last_reg                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_full_reg                                               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_active_reg                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.117      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[2]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[3]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[4]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[5]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[7]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[6]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[1]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serout_holding_reg[0]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.100     ; 6.114      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.096     ; 6.117      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.096     ; 6.117      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 6.120      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_reg                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 6.120      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_clock_last_reg                                                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 6.120      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[1]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 6.120      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[2]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 6.120      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[3]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 6.120      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serin_bitcount_reg[0]                                                 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.093     ; 6.120      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[3]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 6.115      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[5]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 6.115      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 6.115      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.116      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.116      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[2]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[3]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[4]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|syncreset_enable_divider:enable_64_div|enabled_out_reg                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.095     ; 6.118      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 6.119      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 6.119      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 6.119      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[2]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 6.119      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 6.119      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 6.119      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 6.119      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf2_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.094     ; 6.119      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 6.115      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.098     ; 6.115      ;
; 11.417 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.097     ; 6.116      ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.512 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.345      ; 2.047      ;
; 1.713 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.286      ;
; 1.713 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.286      ;
; 1.713 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.286      ;
; 1.713 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.286      ;
; 1.713 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.286      ;
; 1.713 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.286      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 1.843 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.346      ; 2.379      ;
; 2.342 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.915      ;
; 2.342 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.915      ;
; 2.342 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.915      ;
; 2.342 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.915      ;
; 2.342 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.915      ;
; 2.342 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.915      ;
; 2.342 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.383      ; 2.915      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|skctl_reg[3]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audctl_reg[0]                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audctl_reg[5]                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[7]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf2_reg[2]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[4]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[5]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[6]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[7]                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[2]                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[1]                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[6]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[0]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[1]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[2]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[4]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
; 4.267 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|audf3_reg[5]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.096      ; 4.558      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                             ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------+
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ;
; 4.103 ; 4.319        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg                ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|reply_reg                    ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ;
; 4.104 ; 4.320        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ;
; 4.107 ; 4.323        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ;
; 4.107 ; 4.323        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ;
; 4.107 ; 4.323        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ;
; 4.107 ; 4.323        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ;
; 4.107 ; 4.323        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ;
; 4.107 ; 4.323        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ;
; 4.107 ; 4.323        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ;
; 4.107 ; 4.323        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ;
; 4.108 ; 4.324        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ;
; 4.108 ; 4.324        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ;
; 4.108 ; 4.324        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ;
; 4.108 ; 4.324        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ;
; 4.210 ; 4.365        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ;
; 4.210 ; 4.365        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ;
; 4.210 ; 4.365        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ;
; 4.210 ; 4.365        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ;
; 4.210 ; 4.365        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ;
; 4.211 ; 4.361        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ;
; 4.211 ; 4.366        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ;
; 4.211 ; 4.366        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ;
; 4.211 ; 4.366        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ;
; 4.211 ; 4.366        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ;
; 4.211 ; 4.366        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ;
; 4.211 ; 4.366        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ;
; 4.211 ; 4.366        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ;
; 4.212 ; 4.362        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ;
; 4.212 ; 4.362        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ;
; 4.212 ; 4.362        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ;
; 4.212 ; 4.362        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ;
; 4.212 ; 4.367        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ;
; 4.212 ; 4.367        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ;
; 4.212 ; 4.362        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ;
; 4.212 ; 4.362        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ;
; 4.213 ; 4.363        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ;
; 4.213 ; 4.363        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ;
; 4.213 ; 4.363        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ;
; 4.213 ; 4.363        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|ba_reg[1]                    ;
; 4.214 ; 4.364        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ;
; 4.214 ; 4.364        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ;
; 4.214 ; 4.364        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ;
; 4.214 ; 4.369        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ;
; 4.214 ; 4.369        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ;
; 4.214 ; 4.364        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ;
; 4.214 ; 4.364        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ;
; 4.216 ; 4.366        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cas_n_reg                    ;
; 4.216 ; 4.366        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ;
; 4.216 ; 4.366        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ;
; 4.216 ; 4.366        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]                ;
; 4.216 ; 4.366        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]                ;
; 4.216 ; 4.366        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]                ;
; 4.216 ; 4.366        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ;
; 4.216 ; 4.366        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ;
; 4.216 ; 4.366        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|ldqm_reg                     ;
; 4.216 ; 4.366        ; 0.150          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|udqm_reg                     ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                                                                                           ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------+
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|synchronizer:sio_in1_synchronizer|ff_reg[1] ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|synchronizer:sio_in1_synchronizer|ff_reg[2] ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[11]                                                                                      ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|current_code[7]                                                                                       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[0]                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[10]                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[11]                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[18]                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[19]                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[20]                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[21]                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[22]                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[23]                                                                                          ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[6]                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[7]                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[8]                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_cdtv_remote:myIr|shiftreg[9]                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|c64_cs_loc                                                                                             ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|c64_kb_ack                                                                                             ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[2]                                                 ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|a[4]                                                 ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[0]                                               ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[1]                                               ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[2]                                               ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|cnt[3]                                               ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[0]                                               ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[1]                                               ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|col[2]                                               ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[0]                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[1]                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[2]                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[3]                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick1[4]                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[0]                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[1]                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[2]                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[3]                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|joystick2[4]                                         ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[0]                                                 ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[1]                                                 ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[2]                                                 ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[3]                                                 ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[4]                                                 ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[5]                                                 ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|q[6]                                                 ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|req_reg                                              ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_DISABLE_VIC                               ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|chameleon_c64_joykeyb:\genC64JoyKeyb:myC64JoyKeyb|state.INIT_RESET                                     ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_clk_reg                                                                                            ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_d_reg[1]                                                                                           ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0RD_1                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR                                                                                     ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_1                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D0WR_2                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1VIC                                                                                    ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1WR                                                                                     ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_1                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_D1WR_2                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC2                                                                                     ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_IEC4                                                                                     ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC4H                                                                                    ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC4L                                                                                    ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5H                                                                                    ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC5L                                                                                    ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC6H                                                                                    ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC6L                                                                                    ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_state.MUX_MMC7L                                                                                    ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; chameleon_io:chameleon_io|mux_toggle                                                                                             ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_event_reg                                                               ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[0]                                                       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[1]                                                       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[2]                                                       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[3]                                                       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[4]                                                       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[5]                                                       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[6]                                                       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_last_reg[7]                                                       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_reg[1]                                                            ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_reg[2]                                                            ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keyboard:keyboard1|key_value_reg[7]                                                            ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[119]                                                                                  ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[26]                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[30]                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[42]                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[44]                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[46]                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[66]                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[67]                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[74]                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[75]                                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                                   ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                                              ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:serout_clock_delay|shift_reg[0]                                  ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:serout_clock_delay|shift_reg[1]                                  ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                        ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                                        ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[1]       ;
; 8.508 ; 8.724        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[2]       ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'clk8'                                                                                            ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.394  ; 62.394       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.449  ; 62.449       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.473  ; 62.473       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.526  ; 62.526       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.551  ; 62.551       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.604  ; 62.604       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.235 ; 3.101 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.235 ; 3.101 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.758 ; 2.609 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.376 ; 2.196 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.894 ; 2.761 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.078 ; 2.752 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.453 ; 2.180 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.118 ; 1.955 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.703 ; 2.486 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.070 ; 1.907 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.512 ; 2.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.513 ; 2.325 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.454 ; 2.176 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.170 ; 2.786 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.941 ; 2.817 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.573 ; 2.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.188 ; 1.958 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; dotclock_n   ; clk8       ; 2.188 ; 2.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; ioef_n       ; clk8       ; 2.841 ; 3.166 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_q[*]     ; clk8       ; 2.539 ; 2.739 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[0]    ; clk8       ; 2.095 ; 2.278 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[1]    ; clk8       ; 2.539 ; 2.739 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[2]    ; clk8       ; 1.900 ; 2.210 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[3]    ; clk8       ; 2.082 ; 2.379 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; phi2_n       ; clk8       ; 2.333 ; 2.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; romlh_n      ; clk8       ; 2.078 ; 2.379 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; 4.756 ; 4.863 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.524 ; -0.574 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.525 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.525 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.494 ; -0.543 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.485 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.478 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.477 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.485 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.484 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.538 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.538 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; dotclock_n   ; clk8       ; -1.494 ; -1.731 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; ioef_n       ; clk8       ; -2.137 ; -2.451 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_q[*]     ; clk8       ; -1.075 ; -1.236 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[0]    ; clk8       ; -1.075 ; -1.236 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[1]    ; clk8       ; -1.408 ; -1.605 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[2]    ; clk8       ; -1.208 ; -1.516 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[3]    ; clk8       ; -1.188 ; -1.422 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; phi2_n       ; clk8       ; -1.633 ; -1.812 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; romlh_n      ; clk8       ; -1.380 ; -1.679 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; -3.970 ; -4.071 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_addr[*]   ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.702 ; 3.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.414 ; 3.376 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.511 ; 3.487 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.857 ; 4.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.685 ; 3.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.495 ; 3.471 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.416 ; 3.378 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.492 ; 3.468 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.850 ; 4.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.491 ; 3.467 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.503 ; 3.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.471 ; 3.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 8.319 ; 7.733 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.732 ; 4.539 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.497 ; 5.183 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 6.711 ; 6.168 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 8.319 ; 7.733 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.598 ; 6.202 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 4.747 ; 4.511 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.098 ; 3.991 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.431 ; 4.276 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.374 ; 4.222 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.747 ; 4.511 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 4.417 ; 4.247 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux[*]       ; clk8       ; 6.028 ; 6.160 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[0]      ; clk8       ; 6.028 ; 6.160 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[1]      ; clk8       ; 4.846 ; 5.128 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[2]      ; clk8       ; 4.800 ; 5.063 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[3]      ; clk8       ; 4.632 ; 4.961 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_clk      ; clk8       ; 5.398 ; 5.252 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_d[*]     ; clk8       ; 5.217 ; 5.511 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[0]    ; clk8       ; 4.680 ; 4.968 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[1]    ; clk8       ; 4.538 ; 4.742 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[2]    ; clk8       ; 4.480 ; 4.706 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[3]    ; clk8       ; 5.217 ; 5.511 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.511 ; 5.745 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 6.343 ; 6.900 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 6.124 ; 5.956 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.714 ; 4.523 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.783 ; 4.553 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 5.154 ; 4.894 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.124 ; 5.956 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.314 ; 4.106 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.789 ; 6.436 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 7.159 ; 6.503 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.251 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.103 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_addr[*]   ; clk8       ; 2.960 ; 2.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 2.968 ; 2.931 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.247 ; 3.341 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 2.960 ; 2.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.057 ; 3.034 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.403 ; 4.470 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.231 ; 3.325 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.045 ; 3.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.045 ; 3.022 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.041 ; 3.018 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.405 ; 4.472 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.042 ; 2.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 2.962 ; 2.925 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.042 ; 2.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.476 ; 4.528 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.038 ; 3.015 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.396 ; 4.463 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.037 ; 3.014 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.048 ; 2.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.476 ; 4.528 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.037 ; 2.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.038 ; 2.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.953 ; 2.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.015 ; 2.966 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.026 ; 2.977 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.024 ; 2.975 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.025 ; 2.976 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 4.233 ; 4.047 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.233 ; 4.047 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 4.968 ; 4.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 6.132 ; 5.609 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 7.735 ; 7.175 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.024 ; 5.643 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 3.627 ; 3.523 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 3.627 ; 3.523 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 3.946 ; 3.798 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 3.888 ; 3.742 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.250 ; 4.023 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 3.933 ; 3.769 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux[*]       ; clk8       ; 4.135 ; 4.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[0]      ; clk8       ; 5.537 ; 5.662 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[1]      ; clk8       ; 4.341 ; 4.613 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[2]      ; clk8       ; 4.297 ; 4.550 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[3]      ; clk8       ; 4.135 ; 4.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_clk      ; clk8       ; 4.873 ; 4.733 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_d[*]     ; clk8       ; 3.990 ; 4.209 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[0]    ; clk8       ; 4.182 ; 4.459 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[1]    ; clk8       ; 4.045 ; 4.241 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[2]    ; clk8       ; 3.990 ; 4.209 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[3]    ; clk8       ; 4.698 ; 4.981 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 4.980 ; 5.206 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 5.779 ; 6.315 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 3.830 ; 3.630 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.217 ; 4.032 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.283 ; 4.061 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 4.640 ; 4.390 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 5.627 ; 5.469 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 3.830 ; 3.630 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.211 ; 5.871 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 6.565 ; 5.935 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 6.838 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 6.695 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.952 ; 4.952 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.396 ; 5.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.390 ; 5.390 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.390 ; 5.390 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.998 ; 4.998 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.993 ; 4.993 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.952 ; 4.952 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 5.062 ; 5.062 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 5.307 ; 5.307 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 5.307 ; 5.307 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 5.303 ; 5.303 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 5.062 ; 5.062 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.952 ; 4.952 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 5.001 ; 5.001 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.988 ; 4.988 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 5.041 ; 5.041 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 5.041 ; 5.041 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.217 ; 4.210 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.652 ; 4.648 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.646 ; 4.642 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.646 ; 4.642 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.262 ; 4.255 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.256 ; 4.249 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.217 ; 4.210 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.323 ; 4.316 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.558 ; 4.551 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.558 ; 4.551 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.554 ; 4.547 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.323 ; 4.316 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.217 ; 4.210 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.265 ; 4.258 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.252 ; 4.245 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.312 ; 4.308 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.312 ; 4.308 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.606     ; 4.739     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 5.059     ; 5.180     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 5.050     ; 5.171     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 5.050     ; 5.171     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.642     ; 4.775     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.643     ; 4.776     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.606     ; 4.739     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.752     ; 4.885     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.887     ; 5.020     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.887     ; 5.020     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.895     ; 5.028     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.752     ; 4.885     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.606     ; 4.739     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.652     ; 4.785     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.632     ; 4.765     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.749     ; 4.870     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.749     ; 4.870     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 4.006     ; 4.006     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 4.441     ; 4.441     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.432     ; 4.432     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 4.432     ; 4.432     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 4.041     ; 4.041     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 4.042     ; 4.042     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 4.006     ; 4.006     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 4.146     ; 4.146     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 4.276     ; 4.276     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 4.276     ; 4.276     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 4.283     ; 4.283     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.146     ; 4.146     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 4.006     ; 4.006     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 4.050     ; 4.050     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 4.031     ; 4.031     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 4.143     ; 4.143     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 4.143     ; 4.143     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


---------------------------------------------
; Slow 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup Summary                                      ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 5.740 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 7.313 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold Summary                                       ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.137 ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.187 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery Summary                                    ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 14.332 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+-------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal Summary                                    ;
+-------------------------------------------------+-------+---------------+
; Clock                                           ; Slack ; End Point TNS ;
+-------------------------------------------------+-------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.721 ; 0.000         ;
+-------------------------------------------------+-------+---------------+


+--------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width Summary                         ;
+-------------------------------------------------+--------+---------------+
; Clock                                           ; Slack  ; End Point TNS ;
+-------------------------------------------------+--------+---------------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; 4.190  ; 0.000         ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.561  ; 0.000         ;
; clk8                                            ; 62.089 ; 0.000         ;
+-------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                       ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                ; To Node                                             ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 5.740 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.958      ;
; 5.767 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.911      ;
; 5.776 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.924      ;
; 5.783 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.895      ;
; 5.788 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.885      ;
; 5.809 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.901      ;
; 5.819 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.881      ;
; 5.830 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.848      ;
; 5.830 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.848      ;
; 5.852 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.824      ;
; 5.859 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.814      ;
; 5.860 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.813      ;
; 5.862 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.814      ;
; 5.871 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.800      ;
; 5.873 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 2.810      ;
; 5.882 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.071     ; 2.801      ;
; 5.887 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.813      ;
; 5.896 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.782      ;
; 5.912 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.762      ;
; 5.912 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.786      ;
; 5.912 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.766      ;
; 5.915 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.765      ;
; 5.921 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.779      ;
; 5.923 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.753      ;
; 5.924 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.752      ;
; 5.939 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.737      ;
; 5.941 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|ba_reg[0]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.759      ;
; 5.941 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.737      ;
; 5.950 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.812      ;
; 5.954 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.083     ; 2.717      ;
; 5.957 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.052     ; 2.745      ;
; 5.959 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.799      ;
; 5.959 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.719      ;
; 5.986 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.694      ;
; 5.987 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.074     ; 2.693      ;
; 5.988 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.690      ;
; 5.989 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.047     ; 2.718      ;
; 6.000 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.052     ; 2.702      ;
; 6.003 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.759      ;
; 6.007 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.081     ; 2.666      ;
; 6.013 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.697      ;
; 6.016 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.660      ;
; 6.018 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.656      ;
; 6.025 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 2.683      ;
; 6.026 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 2.682      ;
; 6.027 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.735      ;
; 6.031 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.680      ;
; 6.034 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.642      ;
; 6.034 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]      ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.642      ;
; 6.035 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.640      ;
; 6.036 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.722      ;
; 6.036 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.674      ;
; 6.036 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.726      ;
; 6.040 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.722      ;
; 6.040 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.670      ;
; 6.044 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.052     ; 2.658      ;
; 6.049 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.709      ;
; 6.054 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.656      ;
; 6.054 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.656      ;
; 6.055 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[5]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 2.653      ;
; 6.055 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.643      ;
; 6.056 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.642      ;
; 6.060 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.052     ; 2.642      ;
; 6.060 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|udqm_reg           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.056     ; 2.638      ;
; 6.061 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.046     ; 2.647      ;
; 6.068 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.052     ; 2.634      ;
; 6.070 ; sdram_statemachine:sdram_adaptor|delay_reg[5]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.608      ;
; 6.071 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.605      ;
; 6.072 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.686      ;
; 6.080 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.682      ;
; 6.081 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.597      ;
; 6.084 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.072     ; 2.598      ;
; 6.089 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 2.592      ;
; 6.090 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.043     ; 2.668      ;
; 6.090 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.588      ;
; 6.093 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.669      ;
; 6.093 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.054     ; 2.607      ;
; 6.098 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]      ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.073     ; 2.583      ;
; 6.107 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.570      ;
; 6.107 ; sdram_statemachine:sdram_adaptor|delay_reg[2]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.052     ; 2.595      ;
; 6.107 ; sdram_statemachine:sdram_adaptor|delay_reg[4]            ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.052     ; 2.595      ;
; 6.110 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.078     ; 2.566      ;
; 6.111 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.079     ; 2.564      ;
; 6.113 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.649      ;
; 6.115 ; sdram_statemachine:sdram_adaptor|delay_reg[3]            ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.047     ; 2.592      ;
; 6.117 ; sdram_statemachine:sdram_adaptor|delay_reg[1]            ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.076     ; 2.561      ;
; 6.118 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[8]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.639      ;
; 6.118 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[11]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.639      ;
; 6.118 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[9]    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.639      ;
; 6.118 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[14]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.639      ;
; 6.118 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[12]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.639      ;
; 6.118 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[13]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.639      ;
; 6.118 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[15]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.639      ;
; 6.118 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|data_out_reg[10]   ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.044     ; 2.639      ;
; 6.118 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.644      ;
; 6.122 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.052     ; 2.580      ;
; 6.123 ; sdram_statemachine:sdram_adaptor|delay_reg[0]            ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.077     ; 2.554      ;
; 6.124 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.638      ;
; 6.126 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.039     ; 2.636      ;
; 6.126 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]      ; sdram_statemachine:sdram_adaptor|addr_reg[2]        ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 8.814        ; -0.080     ; 2.548      ;
+-------+----------------------------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                           ;
+--------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                               ; To Node                                                                                                                 ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 7.313  ; sdram_statemachine:sdram_adaptor|data_out_reg[27]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[27]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.036     ; 1.452      ;
; 7.326  ; sdram_statemachine:sdram_adaptor|data_out_reg[23]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[23]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.033     ; 1.442      ;
; 7.348  ; sdram_statemachine:sdram_adaptor|reply_reg                                                                              ; sdram_statemachine:sdram_adaptor|reply_sreg                                                                             ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.075     ; 1.378      ;
; 7.399  ; sdram_statemachine:sdram_adaptor|data_out_reg[29]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[29]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.037     ; 1.365      ;
; 7.400  ; sdram_statemachine:sdram_adaptor|data_out_reg[19]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[19]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.037     ; 1.364      ;
; 7.405  ; sdram_statemachine:sdram_adaptor|data_out_reg[30]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[30]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.008     ; 1.388      ;
; 7.418  ; sdram_statemachine:sdram_adaptor|data_out_reg[26]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[26]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.034     ; 1.349      ;
; 7.432  ; sdram_statemachine:sdram_adaptor|data_out_reg[5]                                                                        ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[5]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 1.289      ;
; 7.460  ; sdram_statemachine:sdram_adaptor|data_out_reg[7]                                                                        ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[7]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 1.261      ;
; 7.462  ; sdram_statemachine:sdram_adaptor|data_out_reg[6]                                                                        ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[6]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 1.259      ;
; 7.482  ; sdram_statemachine:sdram_adaptor|data_out_reg[3]                                                                        ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[3]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 1.236      ;
; 7.486  ; sdram_statemachine:sdram_adaptor|data_out_reg[24]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[24]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.033     ; 1.282      ;
; 7.487  ; sdram_statemachine:sdram_adaptor|data_out_reg[21]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[21]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.036     ; 1.278      ;
; 7.488  ; sdram_statemachine:sdram_adaptor|data_out_reg[20]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[20]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.036     ; 1.277      ;
; 7.501  ; sdram_statemachine:sdram_adaptor|data_out_reg[2]                                                                        ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[2]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 1.217      ;
; 7.509  ; sdram_statemachine:sdram_adaptor|data_out_reg[28]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[28]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.036     ; 1.256      ;
; 7.520  ; sdram_statemachine:sdram_adaptor|data_out_reg[0]                                                                        ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[0]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.083     ; 1.198      ;
; 7.523  ; sdram_statemachine:sdram_adaptor|data_out_reg[16]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[16]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.009     ; 1.269      ;
; 7.535  ; sdram_statemachine:sdram_adaptor|data_out_reg[18]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[18]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.007     ; 1.259      ;
; 7.543  ; sdram_statemachine:sdram_adaptor|data_out_reg[31]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[31]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.008     ; 1.250      ;
; 7.553  ; sdram_statemachine:sdram_adaptor|data_out_reg[22]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[22]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.034     ; 1.214      ;
; 7.584  ; sdram_statemachine:sdram_adaptor|data_out_reg[4]                                                                        ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[4]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.080     ; 1.137      ;
; 7.592  ; sdram_statemachine:sdram_adaptor|data_out_reg[25]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[25]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.032     ; 1.177      ;
; 7.613  ; sdram_statemachine:sdram_adaptor|data_out_reg[17]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[17]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.007     ; 1.181      ;
; 7.626  ; sdram_statemachine:sdram_adaptor|data_out_reg[1]                                                                        ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[1]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.084     ; 1.091      ;
; 7.664  ; sdram_statemachine:sdram_adaptor|data_out_reg[13]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[13]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 1.046      ;
; 7.679  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                                                                     ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 1.028      ;
; 7.711  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                                     ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 0.996      ;
; 7.871  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                                     ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.094     ; 0.836      ;
; 7.938  ; sdram_statemachine:sdram_adaptor|data_out_reg[9]                                                                        ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[9]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.091     ; 0.772      ;
; 8.067  ; sdram_statemachine:sdram_adaptor|data_out_reg[11]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[11]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.086     ; 0.648      ;
; 8.068  ; sdram_statemachine:sdram_adaptor|data_out_reg[15]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[15]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 0.648      ;
; 8.076  ; sdram_statemachine:sdram_adaptor|data_out_reg[8]                                                                        ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[8]                                                                       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 0.632      ;
; 8.078  ; sdram_statemachine:sdram_adaptor|data_out_reg[12]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[12]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.093     ; 0.630      ;
; 8.102  ; sdram_statemachine:sdram_adaptor|data_out_reg[10]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[10]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.086     ; 0.613      ;
; 8.154  ; sdram_statemachine:sdram_adaptor|data_out_reg[14]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[14]                                                                      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 8.814        ; -0.085     ; 0.562      ;
; 10.595 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.982      ;
; 10.617 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.960      ;
; 10.631 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 6.943      ;
; 10.690 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.039     ; 6.886      ;
; 10.692 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.885      ;
; 10.709 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.868      ;
; 10.739 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[7]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 6.833      ;
; 10.743 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 6.819      ;
; 10.749 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 6.813      ;
; 10.755 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.822      ;
; 10.756 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 6.806      ;
; 10.761 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 6.813      ;
; 10.765 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 6.809      ;
; 10.768 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.054     ; 6.793      ;
; 10.768 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 6.813      ;
; 10.770 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.054     ; 6.791      ;
; 10.774 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.033     ; 6.808      ;
; 10.776 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 6.786      ;
; 10.777 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 6.796      ;
; 10.783 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.045     ; 6.787      ;
; 10.784 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 6.774      ;
; 10.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.045     ; 6.783      ;
; 10.790 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 6.783      ;
; 10.790 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 6.769      ;
; 10.794 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.037     ; 6.784      ;
; 10.796 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[30] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.045     ; 6.774      ;
; 10.798 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.779      ;
; 10.800 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[31] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.045     ; 6.770      ;
; 10.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.776      ;
; 10.802 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.049     ; 6.764      ;
; 10.813 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[6]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.043     ; 6.759      ;
; 10.820 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.757      ;
; 10.821 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[37] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.756      ;
; 10.823 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[9]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.754      ;
; 10.823 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.037     ; 6.755      ;
; 10.830 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[4]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 6.725      ;
; 10.831 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[19] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.037     ; 6.747      ;
; 10.834 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[2]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 6.740      ;
; 10.850 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.727      ;
; 10.851 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[8]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[7]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.036     ; 6.728      ;
; 10.854 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.723      ;
; 10.854 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.723      ;
; 10.861 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 6.701      ;
; 10.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[3]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.054     ; 6.699      ;
; 10.864 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[2]                                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[22] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 6.710      ;
; 10.875 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 6.682      ;
; 10.876 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[2]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.049     ; 6.690      ;
; 10.876 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 6.697      ;
; 10.877 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|COLOUR_REG[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.049     ; 6.689      ;
; 10.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[0]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.699      ;
; 10.883 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp3_reg[1]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.060     ; 6.672      ;
; 10.888 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_fetch_reg                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.054     ; 6.673      ;
; 10.889 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[1]        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.035     ; 6.691      ;
; 10.889 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[26] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.042     ; 6.684      ;
; 10.893 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafm_reg[0]                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.062     ; 6.660      ;
; 10.894 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|HRCOLOUR_REG[1]                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.045     ; 6.676      ;
; 10.896 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[36] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.054     ; 6.665      ;
; 10.897 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[7]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 6.674      ;
; 10.899 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[9]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.044     ; 6.672      ;
; 10.900 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|write_en_r                                                        ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.031     ; 6.684      ;
; 10.900 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[0]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.037     ; 6.678      ;
; 10.900 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[3]  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.038     ; 6.677      ;
; 10.900 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|grafp1_reg[2]                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 6.662      ;
; 10.900 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[40] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.032     ; 6.683      ;
+--------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                       ; To Node                                                                                                                                                                                                                                   ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.137 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.466      ;
; 0.138 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.469      ;
; 0.141 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.471      ;
; 0.143 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.473      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][3]                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.474      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][0]                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.474      ;
; 0.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.474      ;
; 0.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.475      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.475      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.472      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.472      ;
; 0.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.472      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.473      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.472      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.473      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][2]                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.478      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.474      ;
; 0.149 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.475      ;
; 0.150 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.476      ;
; 0.150 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.228      ; 0.482      ;
; 0.150 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.480      ;
; 0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.477      ;
; 0.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.480      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|shift_reg[31][1]                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.482      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.478      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.482      ;
; 0.153 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[8]                                                                                                                                                     ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.477      ;
; 0.153 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[10]                                                                                                                                                    ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.477      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.479      ;
; 0.153 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.226      ; 0.483      ;
; 0.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.483      ;
; 0.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm3_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.483      ;
; 0.155 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_addr_reg[9]                                                                                                                                                     ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.479      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.482      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.484      ;
; 0.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp1_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.484      ;
; 0.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp2_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.482      ;
; 0.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[1]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_address_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.480      ;
; 0.157 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[5] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.486      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[5] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.485      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.488      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.485      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.488      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.487      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][4]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.228      ; 0.492      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[4] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.487      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.492      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.228      ; 0.493      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.490      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.491      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.228      ; 0.494      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[2] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.489      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.490      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.488      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp3_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.488      ;
; 0.163 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.492      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposp0_delay|shift_reg[4][6]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.490      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.493      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.491      ;
; 0.165 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|cntr_mpf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.492      ;
; 0.166 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                                                                               ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a10~porta_address_reg0                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.490      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|shift_reg[4][2]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.491      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe3a[0]                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~portb_address_reg0  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.220      ; 0.492      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][1]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.494      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.498      ;
; 0.170 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[3] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.497      ;
; 0.170 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm2_delay|shift_reg[4][5]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 0.501      ;
; 0.171 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][0]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.228      ; 0.503      ;
; 0.172 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.501      ;
; 0.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|cntr_npf:cntr1|counter_reg_bit[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.500      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[0]   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_address_reg0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.497      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][3]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.228      ; 0.506      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm1_delay|shift_reg[4][7]                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.228      ; 0.512      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                                                                                                               ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|irqst_reg[5]                                                                                                                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_overrun_reg                                                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|serial_ip_framing_reg                                                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                                                                                                                              ; chameleon_io:chameleon_io|chameleon_phi_clock:phiInstance|localPhi                                                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; chameleon_1mhz:my1Mhz|cnt[0]                                                                                                                                                                                    ; chameleon_1mhz:my1Mhz|cnt[0]                                                                                                                                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Vreg                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Vreg                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[7]                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[7]                                                                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[1]                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                                                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_clock_reg                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_clock_reg                                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[0]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Creg                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Creg                                                                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_control_reg[5]                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_control_reg[5]                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|cb2_edge_reg                                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|cb2_edge_reg                                                                                                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_control_reg[3]                                                                                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_control_reg[3]                                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CB2_output_reg                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CB2_output_reg                                                                                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                       ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                     ; To Node                                                       ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.187 ; sdram_statemachine:sdram_adaptor|reply_reg                    ; sdram_statemachine:sdram_adaptor|reply_reg                    ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.194 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.314      ;
; 0.198 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.317      ;
; 0.241 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.361      ;
; 0.247 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.367      ;
; 0.289 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.409      ;
; 0.294 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.414      ;
; 0.294 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.414      ;
; 0.295 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.295 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.296 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.296 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.296 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.298 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.417      ;
; 0.299 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.418      ;
; 0.300 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.419      ;
; 0.300 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.419      ;
; 0.300 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.419      ;
; 0.301 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.420      ;
; 0.301 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.420      ;
; 0.301 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.420      ;
; 0.302 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.421      ;
; 0.304 ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.424      ;
; 0.305 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.425      ;
; 0.309 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.429      ;
; 0.312 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.431      ;
; 0.312 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.432      ;
; 0.318 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.438      ;
; 0.321 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.441      ;
; 0.321 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.441      ;
; 0.347 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.467      ;
; 0.368 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.488      ;
; 0.379 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|dq_output_reg                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.499      ;
; 0.443 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.563      ;
; 0.444 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.564      ;
; 0.444 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.564      ;
; 0.447 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.566      ;
; 0.448 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.567      ;
; 0.449 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.568      ;
; 0.449 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.568      ;
; 0.450 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.569      ;
; 0.450 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.570      ;
; 0.452 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.572      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.575      ;
; 0.457 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.577      ;
; 0.457 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.577      ;
; 0.458 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.577      ;
; 0.458 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.578      ;
; 0.459 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.578      ;
; 0.459 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.578      ;
; 0.459 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.578      ;
; 0.460 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.579      ;
; 0.461 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.580      ;
; 0.462 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.581      ;
; 0.462 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.581      ;
; 0.462 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.581      ;
; 0.463 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.582      ;
; 0.468 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.588      ;
; 0.470 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.590      ;
; 0.470 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.590      ;
; 0.471 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.591      ;
; 0.473 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.593      ;
; 0.476 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.596      ;
; 0.479 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.599      ;
; 0.499 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.619      ;
; 0.506 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.626      ;
; 0.507 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.627      ;
; 0.507 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.627      ;
; 0.510 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.629      ;
; 0.510 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.630      ;
; 0.510 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.630      ;
; 0.512 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.631      ;
; 0.512 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.631      ;
; 0.513 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.632      ;
; 0.513 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.632      ;
; 0.515 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.634      ;
; 0.515 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.634      ;
; 0.516 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.635      ;
; 0.516 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.636      ;
; 0.517 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.637      ;
; 0.518 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.638      ;
; 0.520 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.640      ;
; 0.520 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.640      ;
; 0.520 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.640      ;
; 0.521 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.641      ;
; 0.521 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.641      ;
; 0.523 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.643      ;
; 0.524 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.643      ;
; 0.524 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.644      ;
; 0.525 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.644      ;
; 0.525 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.644      ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                       ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                                                                                                    ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 14.332 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.243      ;
; 14.332 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.243      ;
; 14.332 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.243      ;
; 14.332 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.243      ;
; 14.339 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[7]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.036     ; 3.240      ;
; 14.362 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[23]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.036     ; 3.217      ;
; 14.362 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.036     ; 3.217      ;
; 14.362 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.036     ; 3.217      ;
; 14.362 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[6]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.036     ; 3.217      ;
; 14.362 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[0]                                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.036     ; 3.217      ;
; 14.362 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[22]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.036     ; 3.217      ;
; 14.363 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.035     ; 3.217      ;
; 14.363 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[19]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.035     ; 3.217      ;
; 14.363 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[15]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.035     ; 3.217      ;
; 14.522 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.052      ;
; 14.522 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.052      ;
; 14.529 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 3.038      ;
; 14.529 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[7]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.048     ; 3.038      ;
; 14.543 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[0]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.031      ;
; 14.543 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[3]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.031      ;
; 14.543 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.031      ;
; 14.543 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[1]                   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.031      ;
; 14.543 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.031      ;
; 14.543 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.031      ;
; 14.543 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.031      ;
; 14.547 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|width_32bit_reg               ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.054     ; 3.014      ;
; 14.548 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.026      ;
; 14.548 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[7]                                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.041     ; 3.026      ;
; 14.548 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[0]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.027      ;
; 14.548 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[6]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.027      ;
; 14.548 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[2]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.027      ;
; 14.548 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[7]                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.040     ; 3.027      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.032      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.032      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.037     ; 3.029      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[10]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.032      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[18]                                                                           ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.034     ; 3.032      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_ready_reg                                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.037     ; 3.029      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.055     ; 3.011      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.055     ; 3.011      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|sio_in_reg                                                            ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.013      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.055     ; 3.011      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_reg                                                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.055     ; 3.011      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|clock_sync_reg                                                        ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.055     ; 3.011      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[3]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[5]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[0]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.010      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.010      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.010      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.010      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.010      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.010      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.010      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.010      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.010      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.056     ; 3.010      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.013      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[2]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf3_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.053     ; 3.013      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|skctl_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.055     ; 3.011      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[4]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audctl_reg[6]                                                         ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.057     ; 3.009      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[3]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 3.007      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 3.007      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[0]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.008      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[1]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 3.007      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[1]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.008      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[2]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 3.007      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[2]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.008      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[3]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.008      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 3.007      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[4]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 3.007      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[4]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.008      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[5]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 3.007      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[5]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.008      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[6]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.008      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf0_reg[7]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.059     ; 3.007      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[7]                             ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.008      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[2] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.008      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.058     ; 3.008      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[6]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.054     ; 3.012      ;
; 14.549 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|pokey:pokey1|audf1_reg[0]                                                          ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 17.628       ; -0.054     ; 3.012      ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                    ; Latch Clock                                     ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a63  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a62  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a61  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a60  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a59  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a58  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a57  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a56  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a55  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a54  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a53  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a52  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a51  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a50  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a49  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a48  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a39  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a38  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.721 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.183      ; 0.994      ;
; 0.803 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 1.099      ;
; 0.803 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 1.099      ;
; 0.803 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 1.099      ;
; 0.803 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 1.099      ;
; 0.803 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 1.099      ;
; 0.803 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.206      ; 1.099      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10  ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 0.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|dffe6   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0   ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.184      ; 1.152      ;
; 1.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.454      ;
; 1.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.454      ;
; 1.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.454      ;
; 1.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.454      ;
; 1.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.454      ;
; 1.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.454      ;
; 1.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0 ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.454      ;
; 2.226 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[6]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.053      ; 2.363      ;
; 2.226 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[5]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.053      ; 2.363      ;
; 2.226 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[3]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.053      ; 2.363      ;
; 2.226 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[2]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.053      ; 2.363      ;
; 2.226 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[7]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.053      ; 2.363      ;
; 2.226 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[4]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.053      ; 2.363      ;
; 2.226 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[1]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.053      ; 2.363      ;
; 2.226 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_input_reg[1]                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.053      ; 2.363      ;
; 2.226 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[0]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.053      ; 2.363      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|oldcpu_pending_reg                                                                                                       ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 2.361      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_direction_reg[0]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.052      ; 2.363      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_input_reg[0]                                                                                                                    ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.052      ; 2.363      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_counter_reg[0]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 2.361      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_counter_reg[1]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 2.361      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_counter_reg[2]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 2.361      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_counter_reg[3]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 2.361      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_counter_reg[4]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 2.361      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_counter_reg[5]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 2.361      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_counter_reg[6]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 2.361      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_counter_reg[7]                                                                                                                ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 2.361      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey2|pot_reset_reg                                                                                                                     ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.050      ; 2.361      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                                                                              ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.051      ; 2.362      ;
; 2.227 ; chameleon_io:chameleon_io|button_reset_n                                                                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|skctl_reg[3]                                                                                                                      ; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.051      ; 2.362      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------+-------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                             ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                           ; Clock Edge ; Target                                                        ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------+
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ;
; 4.190 ; 4.406        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|reply_reg                    ;
; 4.192 ; 4.408        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg                ;
; 4.192 ; 4.408        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ;
; 4.192 ; 4.408        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ;
; 4.192 ; 4.408        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ;
; 4.193 ; 4.409        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ;
; 4.193 ; 4.409        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ;
; 4.193 ; 4.409        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ;
; 4.193 ; 4.409        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ;
; 4.194 ; 4.349        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ;
; 4.194 ; 4.349        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ;
; 4.194 ; 4.349        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ;
; 4.194 ; 4.410        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ;
; 4.194 ; 4.410        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ;
; 4.194 ; 4.410        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ;
; 4.194 ; 4.410        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ;
; 4.194 ; 4.410        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ;
; 4.194 ; 4.410        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ;
; 4.194 ; 4.410        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ;
; 4.194 ; 4.410        ; 0.216          ; High Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ;
; 4.196 ; 4.351        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ;
; 4.196 ; 4.351        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ;
; 4.198 ; 4.353        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ;
; 4.198 ; 4.353        ; 0.155          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ;
; 4.219 ; 4.403        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg                ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ;
; 4.220 ; 4.404        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ;
; 4.221 ; 4.405        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ;
; 4.221 ; 4.405        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ;
; 4.221 ; 4.405        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ;
; 4.221 ; 4.405        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ;
; 4.221 ; 4.405        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ;
; 4.221 ; 4.405        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ;
; 4.221 ; 4.405        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ;
; 4.221 ; 4.405        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ;
; 4.221 ; 4.405        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ;
; 4.221 ; 4.405        ; 0.184          ; Low Pulse Width  ; pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ;
+-------+--------------+----------------+------------------+-------------------------------------------------+------------+---------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'pll|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                        ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type            ; Clock                                           ; Clock Edge ; Target                                                                                                                                                                                                                                    ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_address_reg0 ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_address_reg0   ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a10~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a14~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a1~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a20~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a21~porta_address_reg0                                                                                                                                     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a2~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a3~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a6~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a7~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a8~porta_address_reg0                                                                                                                                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                           ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a1                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a2                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a3                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a4                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a5                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a6                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~portb_address_reg0 ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a1                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a2                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a3                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a4                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a5                    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~portb_address_reg0   ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_address_reg0  ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a11~porta_address_reg0                                                                                                                                     ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a17~porta_address_reg0                                                                                                                                     ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a22~porta_address_reg0                                                                                                                                     ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a5~porta_address_reg0                                                                                                                                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                         ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_we_reg                                                                                                               ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_cjm:auto_generated|altsyncram_91b1:altsyncram2|ram_block5a0~porta_datain_reg0  ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4jm:auto_generated|altsyncram_a1b1:altsyncram2|ram_block5a0~porta_datain_reg0  ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a0~porta_datain_reg0    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a1                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a10                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a11                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a12                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a13                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a14                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a15                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~portb_address_reg0  ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a2                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a3                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a32                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a33                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a34                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a35                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a4                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a40                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a41                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a42                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a43                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a44                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a45                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a46                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a47                     ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a5                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a6                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a7                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a8                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a9                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer:pokey_mixer_l|altsyncram:Ram0_rtl_0|altsyncram_kt71:auto_generated|ram_block1a0~porta_address_reg0                                                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer:pokey_mixer_l|altsyncram:Ram0_rtl_0|altsyncram_kt71:auto_generated|ram_block1a7~porta_address_reg0                                                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer:pokey_mixer_r|altsyncram:Ram0_rtl_0|altsyncram_kt71:auto_generated|ram_block1a0~porta_address_reg0                                                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer:pokey_mixer_r|altsyncram:Ram0_rtl_0|altsyncram_kt71:auto_generated|ram_block1a7~porta_address_reg0                                                    ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_cc71:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                                      ;
; 8.563 ; 8.793        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_9f41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                            ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a16~porta_datain_reg0   ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a17                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a18                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a19                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a20                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a21                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a22                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a23                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a24                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a25                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a26                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a27                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a28                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a29                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a30                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a31                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a36                     ;
; 8.564 ; 8.794        ; 0.230          ; Low Pulse Width ; pll|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l4n:auto_generated|altsyncram_u761:altsyncram4|ram_block7a37                     ;
+-------+--------------+----------------+-----------------+-------------------------------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'clk8'                                                                                            ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; Slack   ; Actual Width ; Required Width ; Type             ; Clock ; Clock Edge ; Target                                                    ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.089  ; 62.089       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 62.123  ; 62.123       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.131  ; 62.131       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.500  ; 62.500       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.500  ; 62.500       ; 0.000          ; Low Pulse Width  ; clk8  ; Rise       ; clk8~input|i                                              ;
; 62.869  ; 62.869       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 62.877  ; 62.877       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; clk8~input|o                                              ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2]           ;
; 62.910  ; 62.910       ; 0.000          ; High Pulse Width ; clk8  ; Rise       ; pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 121.000 ; 125.000      ; 4.000          ; Port Rate        ; clk8  ; Rise       ; clk8                                                      ;
+---------+--------------+----------------+------------------+-------+------------+-----------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 1.640 ; 2.183 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.640 ; 2.183 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 1.393 ; 1.895 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.183 ; 1.651 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.453 ; 1.969 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.456 ; 1.960 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.191 ; 1.654 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.087 ; 1.529 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.321 ; 1.807 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.067 ; 1.517 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.282 ; 1.794 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 1.252 ; 1.715 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.203 ; 1.667 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.476 ; 1.963 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.467 ; 1.995 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.249 ; 1.705 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.083 ; 1.517 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; dotclock_n   ; clk8       ; 1.282 ; 1.568 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; ioef_n       ; clk8       ; 1.651 ; 1.872 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_q[*]     ; clk8       ; 1.522 ; 1.762 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[0]    ; clk8       ; 1.230 ; 1.529 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[1]    ; clk8       ; 1.522 ; 1.762 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[2]    ; clk8       ; 1.132 ; 1.461 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[3]    ; clk8       ; 1.238 ; 1.525 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; phi2_n       ; clk8       ; 1.369 ; 1.652 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; romlh_n      ; clk8       ; 1.232 ; 1.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; 2.561 ; 3.180 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.359 ; -0.735 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.361 ; -0.737 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.361 ; -0.737 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.356 ; -0.738 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.340 ; -0.722 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.340 ; -0.722 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.341 ; -0.723 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.339 ; -0.721 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.347 ; -0.729 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.346 ; -0.728 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.370 ; -0.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.370 ; -0.746 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; dotclock_n   ; clk8       ; -0.921 ; -1.204 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; ioef_n       ; clk8       ; -1.280 ; -1.507 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_q[*]     ; clk8       ; -0.699 ; -1.015 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[0]    ; clk8       ; -0.699 ; -1.015 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[1]    ; clk8       ; -0.878 ; -1.167 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[2]    ; clk8       ; -0.770 ; -1.108 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[3]    ; clk8       ; -0.732 ; -1.060 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; phi2_n       ; clk8       ; -1.004 ; -1.284 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; romlh_n      ; clk8       ; -0.866 ; -1.171 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; -2.148 ; -2.759 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_addr[*]   ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.606 ; 1.605 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.784 ; 1.856 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.601 ; 1.600 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.657 ; 1.678 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.522 ; 2.580 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.769 ; 1.841 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.645 ; 1.666 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.645 ; 1.666 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.644 ; 1.665 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.528 ; 2.586 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.642 ; 1.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.603 ; 1.602 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.642 ; 1.641 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.642 ; 1.663 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.518 ; 2.576 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.640 ; 1.661 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.650 ; 1.649 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.627 ; 1.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.626 ; 1.625 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.626 ; 1.625 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.625 ; 1.624 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.558 ; 2.615 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.639 ; 1.638 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.640 ; 1.639 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.598 ; 1.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.598 ; 1.597 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.618 ; 1.617 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.628 ; 1.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.627 ; 1.626 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.628 ; 1.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 3.923 ; 4.218 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 2.144 ; 2.233 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.449 ; 2.624 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.958 ; 3.171 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.923 ; 4.218 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.979 ; 3.207 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 2.124 ; 2.227 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 1.867 ; 1.938 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 2.010 ; 2.112 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 1.975 ; 2.053 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 2.124 ; 2.227 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 1.999 ; 2.087 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux[*]       ; clk8       ; 3.184 ; 3.044 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[0]      ; clk8       ; 3.184 ; 3.044 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[1]      ; clk8       ; 2.403 ; 2.289 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[2]      ; clk8       ; 2.388 ; 2.275 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[3]      ; clk8       ; 2.299 ; 2.208 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_clk      ; clk8       ; 2.466 ; 2.652 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_d[*]     ; clk8       ; 2.646 ; 2.476 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[0]    ; clk8       ; 2.314 ; 2.215 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[1]    ; clk8       ; 2.250 ; 2.140 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[2]    ; clk8       ; 2.200 ; 2.114 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[3]    ; clk8       ; 2.646 ; 2.476 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.816 ; 2.618 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 3.310 ; 3.049 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 3.011 ; 3.150 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 2.137 ; 2.226 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 2.184 ; 2.298 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 2.333 ; 2.454 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 3.011 ; 3.150 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 1.928 ; 1.989 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 3.070 ; 3.327 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 3.130 ; 3.358 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.690 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.729 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_addr[*]   ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.532 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.405 ; 1.426 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.270 ; 2.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.517 ; 1.589 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.392 ; 1.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.351 ; 1.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.390 ; 1.411 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.266 ; 2.324 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.388 ; 1.409 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.397 ; 1.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.372 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.387 ; 1.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.365 ; 1.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 1.875 ; 1.961 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 1.875 ; 1.961 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.166 ; 2.335 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.656 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.619 ; 3.906 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.676 ; 2.895 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 1.610 ; 1.680 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 1.610 ; 1.680 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 1.747 ; 1.846 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 1.712 ; 1.787 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 1.857 ; 1.957 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 1.737 ; 1.823 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux[*]       ; clk8       ; 2.024 ; 1.936 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[0]      ; clk8       ; 2.913 ; 2.776 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[1]      ; clk8       ; 2.124 ; 2.014 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[2]      ; clk8       ; 2.109 ; 2.000 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[3]      ; clk8       ; 2.024 ; 1.936 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_clk      ; clk8       ; 2.185 ; 2.365 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_d[*]     ; clk8       ; 1.929 ; 1.845 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[0]    ; clk8       ; 2.038 ; 1.942 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[1]    ; clk8       ; 1.977 ; 1.870 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[2]    ; clk8       ; 1.929 ; 1.845 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[3]    ; clk8       ; 2.357 ; 2.193 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.520 ; 2.330 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.994 ; 2.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 1.667 ; 1.726 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 1.868 ; 1.954 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 1.913 ; 2.024 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 2.058 ; 2.175 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 2.745 ; 2.881 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 1.667 ; 1.726 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 2.764 ; 3.012 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.822 ; 3.043 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.461 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.499 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.176 ; 3.173 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.411 ; 3.407 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.398 ; 3.394 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.398 ; 3.394 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.197 ; 3.194 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.195 ; 3.192 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.176 ; 3.173 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.238 ; 3.235 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.303 ; 3.300 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.303 ; 3.300 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.293 ; 3.290 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.238 ; 3.235 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.176 ; 3.173 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.194 ; 3.191 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.187 ; 3.184 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.244 ; 3.240 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.244 ; 3.240 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 2.060 ; 2.060 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.283 ; 2.283 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.270 ; 2.270 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.270 ; 2.270 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.081 ; 2.081 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.078 ; 2.078 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.060 ; 2.060 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.119 ; 2.119 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.182 ; 2.182 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.182 ; 2.182 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.172 ; 2.172 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.119 ; 2.119 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.060 ; 2.060 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.077 ; 2.077 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.071 ; 2.071 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.123 ; 2.123 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.123 ; 2.123 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                             ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.292     ; 3.292     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.535     ; 3.535     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.528     ; 3.528     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.528     ; 3.528     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.318     ; 3.318     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.315     ; 3.315     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.292     ; 3.292     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.365     ; 3.365     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.445     ; 3.445     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.445     ; 3.445     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.447     ; 3.447     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 3.365     ; 3.365     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.292     ; 3.292     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.314     ; 3.314     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.308     ; 3.308     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.361     ; 3.361     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.361     ; 3.361     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                     ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 2.171     ; 2.237     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 2.401     ; 2.459     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.395     ; 2.453     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.395     ; 2.453     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 2.197     ; 2.263     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 2.194     ; 2.260     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.171     ; 2.237     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.241     ; 2.307     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.318     ; 2.384     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.318     ; 2.384     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.320     ; 2.386     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.241     ; 2.307     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.171     ; 2.237     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 2.193     ; 2.259     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 2.187     ; 2.253     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.235     ; 2.293     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.235     ; 2.293     ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
+--------------+------------+-----------+-----------+------------+-------------------------------------------------+


---------------------------------------------
; Fast 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+-------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                         ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+
; Clock                                            ; Setup ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+
; Worst-case Slack                                 ; 1.606 ; 0.137 ; 10.409   ; 0.721   ; 4.099               ;
;  clk8                                            ; N/A   ; N/A   ; N/A      ; N/A     ; 62.089              ;
;  pll|altpll_component|auto_generated|pll1|clk[0] ; 2.001 ; 0.187 ; N/A      ; N/A     ; 4.099               ;
;  pll|altpll_component|auto_generated|pll1|clk[1] ; 1.606 ; 0.137 ; 10.409   ; 0.721   ; 8.505               ;
; Design-wide TNS                                  ; 0.0   ; 0.0   ; 0.0      ; 0.0     ; 0.0                 ;
;  clk8                                            ; N/A   ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  pll|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.000 ; N/A      ; N/A     ; 0.000               ;
;  pll|altpll_component|auto_generated|pll1|clk[1] ; 0.000 ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
+--------------------------------------------------+-------+-------+----------+---------+---------------------+


+----------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                              ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; 3.557 ; 3.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.557 ; 3.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 3.048 ; 2.999 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 2.623 ; 2.542 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.165 ; 3.160 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.326 ; 3.167 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 2.677 ; 2.531 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 2.347 ; 2.266 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 2.954 ; 2.875 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 2.295 ; 2.224 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 2.768 ; 2.759 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.758 ; 2.682 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 2.675 ; 2.536 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.419 ; 3.207 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.226 ; 3.236 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 2.818 ; 2.719 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 2.402 ; 2.288 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; dotclock_n   ; clk8       ; 2.534 ; 2.671 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; ioef_n       ; clk8       ; 3.262 ; 3.420 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_q[*]     ; clk8       ; 2.918 ; 3.017 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[0]    ; clk8       ; 2.426 ; 2.530 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[1]    ; clk8       ; 2.918 ; 3.017 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[2]    ; clk8       ; 2.205 ; 2.426 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[3]    ; clk8       ; 2.421 ; 2.611 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; phi2_n       ; clk8       ; 2.684 ; 2.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; romlh_n      ; clk8       ; 2.415 ; 2.595 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; 5.381 ; 5.637 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+
; sd_data[*]   ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; -0.359 ; -0.574 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; -0.361 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; -0.361 ; -0.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; -0.356 ; -0.543 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; -0.347 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; -0.347 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; -0.340 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; -0.340 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; -0.341 ; -0.527 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; -0.339 ; -0.526 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; -0.347 ; -0.534 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; -0.347 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; -0.346 ; -0.533 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; -0.370 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; -0.370 ; -0.588 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; dotclock_n   ; clk8       ; -0.921 ; -1.204 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; ioef_n       ; clk8       ; -1.280 ; -1.507 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_q[*]     ; clk8       ; -0.699 ; -1.015 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[0]    ; clk8       ; -0.699 ; -1.015 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[1]    ; clk8       ; -0.878 ; -1.167 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[2]    ; clk8       ; -0.770 ; -1.108 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_q[3]    ; clk8       ; -0.732 ; -1.060 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; phi2_n       ; clk8       ; -1.004 ; -1.284 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; romlh_n      ; clk8       ; -0.866 ; -1.171 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; spi_miso     ; clk8       ; -2.148 ; -2.759 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
+--------------+------------+--------+--------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                    ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_addr[*]   ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 3.422 ; 3.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 3.702 ; 3.795 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 3.414 ; 3.376 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 3.511 ; 3.487 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 4.857 ; 4.923 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 3.685 ; 3.778 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 3.499 ; 3.475 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 3.495 ; 3.471 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 4.858 ; 4.924 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 3.416 ; 3.378 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 3.498 ; 3.448 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 3.492 ; 3.468 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 4.850 ; 4.916 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 3.491 ; 3.467 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 3.503 ; 3.453 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 3.479 ; 3.429 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 4.932 ; 4.983 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 3.492 ; 3.442 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 3.493 ; 3.443 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 3.407 ; 3.369 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 3.471 ; 3.421 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 3.480 ; 3.430 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 3.481 ; 3.431 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 8.319 ; 8.038 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 4.732 ; 4.596 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 5.497 ; 5.339 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 6.728 ; 6.458 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 8.319 ; 8.038 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 6.619 ; 6.501 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 4.747 ; 4.571 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 4.098 ; 4.001 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 4.431 ; 4.327 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 4.374 ; 4.264 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 4.747 ; 4.571 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 4.417 ; 4.290 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux[*]       ; clk8       ; 6.081 ; 6.160 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[0]      ; clk8       ; 6.081 ; 6.160 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[1]      ; clk8       ; 4.960 ; 5.131 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[2]      ; clk8       ; 4.905 ; 5.063 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[3]      ; clk8       ; 4.738 ; 4.961 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_clk      ; clk8       ; 5.427 ; 5.384 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_d[*]     ; clk8       ; 5.377 ; 5.535 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[0]    ; clk8       ; 4.774 ; 4.968 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[1]    ; clk8       ; 4.606 ; 4.742 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[2]    ; clk8       ; 4.533 ; 4.706 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[3]    ; clk8       ; 5.377 ; 5.535 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 5.728 ; 5.758 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 6.676 ; 6.904 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 6.124 ; 6.051 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 4.714 ; 4.575 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 4.792 ; 4.627 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 5.159 ; 4.987 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 6.124 ; 6.051 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 4.314 ; 4.147 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 6.851 ; 6.718 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 7.194 ; 6.812 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 7.251 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 7.103 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                            ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                 ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+
; sd_addr[*]   ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[0]  ; clk8       ; 1.353 ; 1.352 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[1]  ; clk8       ; 1.532 ; 1.604 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[2]  ; clk8       ; 1.349 ; 1.348 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[3]  ; clk8       ; 1.405 ; 1.426 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[4]  ; clk8       ; 2.270 ; 2.328 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[5]  ; clk8       ; 1.517 ; 1.589 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[6]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[7]  ; clk8       ; 1.393 ; 1.414 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[8]  ; clk8       ; 1.392 ; 1.413 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[9]  ; clk8       ; 2.276 ; 2.334 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[10] ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_addr[11] ; clk8       ; 1.351 ; 1.350 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_0      ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ba_1      ; clk8       ; 1.388 ; 1.387 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_cas_n     ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_data[*]   ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[0]  ; clk8       ; 1.390 ; 1.411 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[1]  ; clk8       ; 2.266 ; 2.324 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[2]  ; clk8       ; 1.388 ; 1.409 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[3]  ; clk8       ; 1.397 ; 1.396 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[4]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[5]  ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[6]  ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[7]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[8]  ; clk8       ; 1.373 ; 1.372 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[9]  ; clk8       ; 1.372 ; 1.371 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[10] ; clk8       ; 2.305 ; 2.362 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[11] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[12] ; clk8       ; 1.386 ; 1.385 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[13] ; clk8       ; 1.387 ; 1.386 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[14] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
;  sd_data[15] ; clk8       ; 1.346 ; 1.345 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ldqm      ; clk8       ; 1.365 ; 1.364 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_ras_n     ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_udqm      ; clk8       ; 1.374 ; 1.373 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; sd_we_n      ; clk8       ; 1.375 ; 1.374 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[0] ;
; blu[*]       ; clk8       ; 1.875 ; 1.961 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[0]      ; clk8       ; 1.875 ; 1.961 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[1]      ; clk8       ; 2.166 ; 2.335 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[2]      ; clk8       ; 2.656 ; 2.861 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[3]      ; clk8       ; 3.619 ; 3.906 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  blu[4]      ; clk8       ; 2.676 ; 2.895 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; grn[*]       ; clk8       ; 1.610 ; 1.680 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[0]      ; clk8       ; 1.610 ; 1.680 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[1]      ; clk8       ; 1.747 ; 1.846 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[2]      ; clk8       ; 1.712 ; 1.787 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[3]      ; clk8       ; 1.857 ; 1.957 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  grn[4]      ; clk8       ; 1.737 ; 1.823 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux[*]       ; clk8       ; 2.024 ; 1.936 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[0]      ; clk8       ; 2.913 ; 2.776 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[1]      ; clk8       ; 2.124 ; 2.014 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[2]      ; clk8       ; 2.109 ; 2.000 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux[3]      ; clk8       ; 2.024 ; 1.936 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_clk      ; clk8       ; 2.185 ; 2.365 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; mux_d[*]     ; clk8       ; 1.929 ; 1.845 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[0]    ; clk8       ; 2.038 ; 1.942 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[1]    ; clk8       ; 1.977 ; 1.870 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[2]    ; clk8       ; 1.929 ; 1.845 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  mux_d[3]    ; clk8       ; 2.357 ; 2.193 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nHSync       ; clk8       ; 2.520 ; 2.330 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; nVSync       ; clk8       ; 2.994 ; 2.744 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; red[*]       ; clk8       ; 1.667 ; 1.726 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[0]      ; clk8       ; 1.868 ; 1.954 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[1]      ; clk8       ; 1.913 ; 2.024 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[2]      ; clk8       ; 2.058 ; 2.175 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[3]      ; clk8       ; 2.745 ; 2.881 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
;  red[4]      ; clk8       ; 1.667 ; 1.726 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaL       ; clk8       ; 2.764 ; 3.012 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sigmaR       ; clk8       ; 2.822 ; 3.043 ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[1] ;
; sd_clk       ; clk8       ; 5.461 ;       ; Rise       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
; sd_clk       ; clk8       ;       ; 5.499 ; Fall       ; pll|altpll_component|auto_generated|pll1|clk[2] ;
+--------------+------------+-------+-------+------------+-------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                                                                  ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; Pin         ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; red[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; red[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; grn[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; blu[4]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; nHSync      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; nVSync      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_clk      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[0]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[1]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[2]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[3]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[4]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[5]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[6]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[7]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[8]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[9]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[10] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[11] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_addr[12] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ba_0     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ba_1     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_we_n     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ras_n    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_cas_n    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_ldqm     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_udqm     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_clk     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[0]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[1]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[2]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux[3]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[0]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[1]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[2]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; mux_d[3]    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sigmaL      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sigmaR      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[0]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[1]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[2]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[3]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[4]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[5]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[6]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[7]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[8]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[9]  ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[10] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[11] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[12] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[13] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[14] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; sd_data[15] ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
+-------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+


+----------------------------------------------------------------+
; Input Transition Times                                         ;
+-------------+--------------+-----------------+-----------------+
; Pin         ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+-------------+--------------+-----------------+-----------------+
; freeze_n    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mmc_cd_n    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mmc_wp      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_tx    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_clk   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_rts   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; usart_cts   ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[0]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[1]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[2]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[3]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[4]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[5]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[6]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[7]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[8]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[9]  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[10] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[11] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[12] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[13] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[14] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; sd_data[15] ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; clk8        ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[1]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; phi2_n      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; dotclock_n  ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; ioef_n      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; spi_miso    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[0]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[2]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; mux_q[3]    ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; romlh_n     ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
+-------------+--------------+-----------------+-----------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; red[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; red[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; red[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; red[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; red[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; grn[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; grn[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; grn[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; blu[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; blu[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; blu[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; nHSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; nVSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_clk      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.64e-07 V                   ; 2.34 V              ; -0.00283 V          ; 0.121 V                              ; 0.028 V                              ; 1.16e-09 s                  ; 1.21e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.64e-07 V                  ; 2.34 V             ; -0.00283 V         ; 0.121 V                             ; 0.028 V                             ; 1.16e-09 s                 ; 1.21e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 3.64e-07 V                   ; 2.34 V              ; -0.00283 V          ; 0.121 V                              ; 0.028 V                              ; 1.16e-09 s                  ; 1.21e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 3.64e-07 V                  ; 2.34 V             ; -0.00283 V         ; 0.121 V                             ; 0.028 V                             ; 1.16e-09 s                 ; 1.21e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_addr[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_0     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_1     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_we_n     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_ras_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_cas_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; sd_ldqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_udqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_clk     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; mux[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; mux[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sigmaL      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sigmaR      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.33 V              ; -0.00219 V          ; 0.108 V                              ; 0.043 V                              ; 3.76e-09 s                  ; 3.48e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.33 V             ; -0.00219 V         ; 0.108 V                             ; 0.043 V                             ; 3.76e-09 s                 ; 3.48e-09 s                 ; Yes                       ; Yes                       ;
; sd_data[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.34 V              ; -0.00824 V          ; 0.139 V                              ; 0.044 V                              ; 6.89e-10 s                  ; 6.56e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.34 V             ; -0.00824 V         ; 0.139 V                             ; 0.044 V                             ; 6.89e-10 s                 ; 6.56e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.33 V              ; -0.0022 V           ; 0.091 V                              ; 0.044 V                              ; 3.77e-09 s                  ; 3.49e-09 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.33 V             ; -0.0022 V          ; 0.091 V                             ; 0.044 V                             ; 3.77e-09 s                 ; 3.49e-09 s                 ; Yes                       ; Yes                       ;
; sd_data[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[13] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.84e-07 V                   ; 2.35 V              ; -0.0105 V           ; 0.143 V                              ; 0.041 V                              ; 4.81e-10 s                  ; 4.81e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 2.84e-07 V                  ; 2.35 V             ; -0.0105 V          ; 0.143 V                             ; 0.041 V                             ; 4.81e-10 s                 ; 4.81e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[14] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[15] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.91e-07 V                   ; 2.35 V              ; -0.00711 V          ; 0.126 V                              ; 0.012 V                              ; 4.7e-10 s                   ; 4.63e-10 s                  ; Yes                        ; Yes                        ; 2.32 V                      ; 1.91e-07 V                  ; 2.35 V             ; -0.00711 V         ; 0.126 V                             ; 0.012 V                             ; 4.7e-10 s                  ; 4.63e-10 s                 ; Yes                       ; Yes                       ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin         ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; red[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; red[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; red[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; red[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; red[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; grn[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; grn[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; grn[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; blu[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; blu[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; blu[4]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; nHSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; nVSync      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_clk      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 5.17e-08 V                   ; 2.68 V              ; -0.0186 V           ; 0.221 V                              ; 0.079 V                              ; 6.92e-10 s                  ; 7.39e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 5.17e-08 V                  ; 2.68 V             ; -0.0186 V          ; 0.221 V                             ; 0.079 V                             ; 6.92e-10 s                 ; 7.39e-10 s                 ; No                        ; Yes                       ;
; sd_addr[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_addr[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 5.17e-08 V                   ; 2.68 V              ; -0.0186 V           ; 0.221 V                              ; 0.079 V                              ; 6.92e-10 s                  ; 7.39e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 5.17e-08 V                  ; 2.68 V             ; -0.0186 V          ; 0.221 V                             ; 0.079 V                             ; 6.92e-10 s                 ; 7.39e-10 s                 ; No                        ; Yes                       ;
; sd_addr[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_addr[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_addr[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_addr[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_0     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ba_1     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_we_n     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_ras_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_cas_n    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; sd_ldqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_udqm     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_clk     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; mux[0]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; mux[1]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux[2]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux[3]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[0]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[1]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[2]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; mux_d[3]    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sigmaL      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sigmaR      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[0]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[1]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.64 V              ; -0.0118 V           ; 0.201 V                              ; 0.175 V                              ; 2.38e-09 s                  ; 2.21e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.64 V             ; -0.0118 V          ; 0.201 V                             ; 0.175 V                             ; 2.38e-09 s                 ; 2.21e-09 s                 ; No                        ; Yes                       ;
; sd_data[2]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.71 V              ; -0.0354 V           ; 0.148 V                              ; 0.064 V                              ; 4.51e-10 s                  ; 4.14e-10 s                  ; No                         ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.71 V             ; -0.0354 V          ; 0.148 V                             ; 0.064 V                             ; 4.51e-10 s                 ; 4.14e-10 s                 ; No                        ; Yes                       ;
; sd_data[3]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[4]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[5]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[6]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[7]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[8]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[9]  ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[10] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.64 V              ; -0.0115 V           ; 0.204 V                              ; 0.12 V                               ; 2.38e-09 s                  ; 2.24e-09 s                  ; No                         ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.64 V             ; -0.0115 V          ; 0.204 V                             ; 0.12 V                              ; 2.38e-09 s                 ; 2.24e-09 s                 ; No                        ; Yes                       ;
; sd_data[11] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[12] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[13] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.02e-08 V                   ; 2.71 V              ; -0.0354 V           ; 0.174 V                              ; 0.098 V                              ; 2.73e-10 s                  ; 2.69e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 4.02e-08 V                  ; 2.71 V             ; -0.0354 V          ; 0.174 V                             ; 0.098 V                             ; 2.73e-10 s                 ; 2.69e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[14] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
; sd_data[15] ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.7e-08 V                    ; 2.72 V              ; -0.0401 V           ; 0.163 V                              ; 0.091 V                              ; 2.71e-10 s                  ; 2.61e-10 s                  ; Yes                        ; Yes                        ; 2.62 V                      ; 2.7e-08 V                   ; 2.72 V             ; -0.0401 V          ; 0.163 V                             ; 0.091 V                             ; 2.71e-10 s                 ; 2.61e-10 s                 ; Yes                       ; Yes                       ;
+-------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                               ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 1847     ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 118      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 36       ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 4731158  ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 1847     ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[0] ; 118      ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[0] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 36       ; 0        ; 0        ; 0        ;
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 4731158  ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                                                            ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 6285     ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                                                             ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; From Clock                                      ; To Clock                                        ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
; pll|altpll_component|auto_generated|pll1|clk[1] ; pll|altpll_component|auto_generated|pll1|clk[1] ; 6285     ; 0        ; 0        ; 0        ;
+-------------------------------------------------+-------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 0     ; 0    ;
; Unconstrained Input Ports       ; 25    ; 25   ;
; Unconstrained Input Port Paths  ; 63    ; 63   ;
; Unconstrained Output Ports      ; 64    ; 64   ;
; Unconstrained Output Port Paths ; 80    ; 80   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Fri Jul 18 21:41:45 2014
Info: Command: quartus_sta atari800core -c atari800core
Info: qsta_default_script.tcl version: #1
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (21077): Core supply voltage is 1.2V
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Info (332104): Reading SDC File: 'atari800core.sdc'
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 156 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[0]} {pll|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 78 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[1]} {pll|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 11 -multiply_by 156 -phase 180.00 -duty_cycle 50.00 -name {pll|altpll_component|auto_generated|pll1|clk[2]} {pll|altpll_component|auto_generated|pll1|clk[2]}
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow 1200mV 85C Model
Info (332146): Worst-case setup slack is 1.606
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.606         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     2.001         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case hold slack is 0.402
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.402         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.454         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 10.409
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    10.409         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.662
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.662         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case minimum pulse width slack is 4.099
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.099         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.505         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.409         0.000 clk8 
Info: Analyzing Slow 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 2.352
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     2.352         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     2.390         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case hold slack is 0.382
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.382         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.403         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 10.960
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    10.960         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.512
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.512         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case minimum pulse width slack is 4.103
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.103         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.508         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.394         0.000 clk8 
Info: Analyzing Fast 1200mV 0C Model
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 5.740
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.740         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     7.313         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case hold slack is 0.137
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.137         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.187         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
Info (332146): Worst-case recovery slack is 14.332
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    14.332         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 0.721
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.721         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case minimum pulse width slack is 4.190
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.190         0.000 pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.561         0.000 pll|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    62.089         0.000 clk8 
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 499 megabytes
    Info: Processing ended: Fri Jul 18 21:42:18 2014
    Info: Elapsed time: 00:00:33
    Info: Total CPU time (on all processors): 00:00:28


