bus_data_out[7:0] bus_data_out[7:0] HEXRADIX bus_data_oe bus_data_oe cart_addr[12:0] cart_addr[12:0] HEXRADIX cart_data[7:0] cart_data[7:0] HEXRADIX cart_rd5 cart_rd5 cart_rd4 cart_rd4 cart_s5 cart_s5 cart_s4 cart_s4 cart_phi2 cart_phi2 cart_ctl cart_ctl cart_rw cart_rw enable_179_early enable_179_early request request phi2 phi2 phi_edge_prev_reg phi_edge_prev_reg phi2_sync phi2_sync addr_in[12:0] addr_in[12:0] HEXRADIX data_in[7:0] data_in[7:0] HEXRADIX data_out[7:0] data_out[7:0] HEXRADIX state_reg[2:0] state_reg[2:0] delay_reg[60:0] delay_reg[60:0] bus_data_out[7:0] bus_data_out[7:0] HEXRADIX bus_drive bus_drive clk7x clk7x state_reg[2:0] state_reg[2:0] internal_memory_request internal_memory_request Outputs label 128 128 255 230 230 230 bus_data_out[7:0] bus_data_out[7:0] HEXRADIX bus_drive bus_drive bus_request bus_request addr_in[12:0] addr_in[12:0] HEXRADIX data_in[7:0] data_in[7:0] HEXRADIX rw_n rw_n s4_n s4_n s5_n s5_n ctl_n ctl_n