# -------------------------------------------------------------------------- # # # Copyright (C) 1991-2009 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any output files from any of the foregoing # (including device programming or simulation files), and any # associated documentation or information are expressly subject # to the terms and conditions of the Altera Program License # Subscription Agreement, Altera MegaCore Function License # Agreement, or other applicable license agreement, including, # without limitation, that your use is for the sole purpose of # programming logic devices manufactured by Altera and sold by # Altera or its authorized distributors. Please refer to the # applicable agreement for further details. # # -------------------------------------------------------------------------- # # # Quartus II # Version 9.0 Build 132 02/25/2009 SJ Web Edition # Date created = 20:12:08 December 25, 2009 # # -------------------------------------------------------------------------- # # # Notes: # # 1) The default values for assignments are stored in the file: # atari5200core_mcc_assignment_defaults.qdf # If this file doesn't exist, see file: # assignment_defaults.qdf # # 2) Altera recommends that you do not modify this file. This # file is updated automatically by the Quartus II software # and any changes you make may be lost or overwritten. # # -------------------------------------------------------------------------- # set_global_assignment -name DEVICE EP4CE15E22C7 set_global_assignment -name FAMILY "Cyclone IV E" set_global_assignment -name TOP_LEVEL_ENTITY atari5200core_mcc set_global_assignment -name ORIGINAL_QUARTUS_VERSION 9.0 set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:12:08 DECEMBER 25, 2009" set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE SPEED set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP" set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7 set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 set_global_assignment -name CYCLONEIII_CONFIGURATION_DEVICE EPCS128 set_global_assignment -name GENERATE_RBF_FILE ON set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVCMOS" set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION ON set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO" set_global_assignment -name FITTER_EFFORT "STANDARD FIT" set_global_assignment -name ENABLE_SIGNALTAP ON set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF set_global_assignment -name SIMULATION_MODE TIMING set_location_assignment PIN_46 -to AUDIO_L set_location_assignment PIN_49 -to AUDIO_R set_location_assignment PIN_55 -to FPGA_CLK set_location_assignment PIN_42 -to SD_CLK set_location_assignment PIN_43 -to SD_CMD set_location_assignment PIN_44 -to SD_DAT3 set_location_assignment PIN_52 -to SD_DAT0 set_location_assignment PIN_59 -to SDRAM_A[0] set_location_assignment PIN_58 -to SDRAM_A[1] set_location_assignment PIN_51 -to SDRAM_A[2] set_location_assignment PIN_50 -to SDRAM_A[3] set_location_assignment PIN_132 -to SDRAM_A[4] set_location_assignment PIN_125 -to SDRAM_A[5] set_location_assignment PIN_121 -to SDRAM_A[6] set_location_assignment PIN_120 -to SDRAM_A[7] set_location_assignment PIN_119 -to SDRAM_A[8] set_location_assignment PIN_115 -to SDRAM_A[9] set_location_assignment PIN_60 -to SDRAM_A[10] set_location_assignment PIN_114 -to SDRAM_A[11] set_location_assignment PIN_113 -to SDRAM_A[12] set_location_assignment PIN_111 -to SDRAM_CLK set_location_assignment PIN_110 -to SDRAM_DQMH_n set_location_assignment PIN_71 -to SDRAM_DQML_n set_location_assignment PIN_106 -to SDRAM_DQ[8] set_location_assignment PIN_105 -to SDRAM_DQ[9] set_location_assignment PIN_104 -to SDRAM_DQ[10] set_location_assignment PIN_103 -to SDRAM_DQ[11] set_location_assignment PIN_101 -to SDRAM_DQ[12] set_location_assignment PIN_100 -to SDRAM_DQ[13] set_location_assignment PIN_99 -to SDRAM_DQ[14] set_location_assignment PIN_98 -to SDRAM_DQ[15] set_location_assignment PIN_72 -to SDRAM_DQ[7] set_location_assignment PIN_76 -to SDRAM_DQ[6] set_location_assignment PIN_77 -to SDRAM_DQ[5] set_location_assignment PIN_80 -to SDRAM_DQ[4] set_location_assignment PIN_83 -to SDRAM_DQ[3] set_location_assignment PIN_85 -to SDRAM_DQ[2] set_location_assignment PIN_86 -to SDRAM_DQ[1] set_location_assignment PIN_87 -to SDRAM_DQ[0] set_location_assignment PIN_68 -to SDRAM_CAS_n set_location_assignment PIN_66 -to SDRAM_CS_n set_location_assignment PIN_64 -to SDRAM_BA[1] set_location_assignment PIN_65 -to SDRAM_BA[0] set_location_assignment PIN_67 -to SDRAM_RAS_n set_location_assignment PIN_69 -to SDRAM_WE_n set_location_assignment PIN_112 -to SDRAM_CKE set_location_assignment PIN_144 -to VGA_G[0] set_location_assignment PIN_143 -to VGA_G[1] set_location_assignment PIN_142 -to VGA_G[2] set_location_assignment PIN_141 -to VGA_G[3] set_location_assignment PIN_137 -to VGA_B[0] set_location_assignment PIN_136 -to VGA_B[1] set_location_assignment PIN_135 -to VGA_B[2] set_location_assignment PIN_133 -to VGA_B[3] set_location_assignment PIN_12 -to CFG_CLK set_location_assignment PIN_8 -to CFG_CS_n set_location_assignment PIN_13 -to CFG_DIN set_location_assignment PIN_6 -to CFG_DOUT set_location_assignment PIN_31 -to dplus1 set_location_assignment PIN_30 -to dminus1 set_location_assignment PIN_33 -to dplus2 set_location_assignment PIN_32 -to dminus2 set_instance_assignment -name FAST_INPUT_REGISTER ON -to CFG_DIN set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to CFG_CLK set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to CFG_CS_n set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to CFG_DOUT set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_CAS_n set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_CS_n set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH_n set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML_n set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_RAS_n set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_WE_n set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_B set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_G set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_HS set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_R set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_VS set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to VGA_B[3] set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region" set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region" set_global_assignment -name USE_SIGNALTAP_FILE atari.stp set_location_assignment PLL_2 -to "clk_reset:clk_rst_inst|pll_main:main_inst" set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[0] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[1] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[2] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[3] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[4] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[5] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[6] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[8] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[9] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[10] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_A[11] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[0] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[1] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[2] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[6] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[7] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[8] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[10] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[11] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[12] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[14] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQ[15] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_BA[0] set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_CS_n set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQMH_n set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_DQML_n set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_RAS_n set_instance_assignment -name CLOCK_TO_OUTPUT_DELAY 1 -to SDRAM_WE_n set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION ALWAYS set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS ON set_global_assignment -name IGNORE_LCELL_BUFFERS ON set_global_assignment -name IGNORE_CASCADE_BUFFERS ON set_location_assignment PLL_4 -to "clk_reset:clk_rst_inst|pll_5M_pal_ntsc:pll_5m_inst" -disable set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" set_global_assignment -name QIP_FILE usbpll.qip set_global_assignment -name QIP_FILE pal_pll.qip set_global_assignment -name QIP_FILE pll_downstream_pal.qip set_global_assignment -name QIP_FILE ntsc_pll.qip set_global_assignment -name QIP_FILE pll_downstream_ntsc.qip set_global_assignment -name QIP_FILE remote_update.qip set_global_assignment -name VHDL_FILE delayed_reconfig.vhd set_global_assignment -name SDC_FILE atari5200core.sdc set_global_assignment -name VERILOG_FILE sdram_ctrl_3_ports.v set_global_assignment -name VHDL_FILE zpu_rom.vhdl set_global_assignment -name VHDL_FILE atari5200core_mcc.vhd set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_global_assignment -name USE_CONFIGURATION_DEVICE OFF set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top