zpu_fetch zpu_fetch zpu_32bit_write_enable zpu_32bit_write_enable zpu_16bit_write_enable zpu_16bit_write_enable zpu_8bit_write_enable zpu_8bit_write_enable zpu_read_enable zpu_read_enable zpu_memory_ready zpu_memory_ready zpu_memory_data[31:0] zpu_memory_data[31:0] HEXRADIX zpu_addr_fetch[23:0] zpu_addr_fetch[23:0] HEXRADIX reset_n reset_n cpu_fetch cpu_fetch antic_fetch antic_fetch sdram_request sdram_request sdram_request_complete sdram_request_complete ram_request ram_request ram_request_complete ram_request_complete zpu_out1[31:0] zpu_out1[31:0] HEXRADIX zpu_out2[31:0] zpu_out2[31:0] HEXRADIX zpu_out3[31:0] zpu_out3[31:0] HEXRADIX zpu_out4[31:0] zpu_out4[31:0] HEXRADIX reset_n reset_n reset_atari reset_atari pause_atari pause_atari sdram_reset_n_reg sdram_reset_n_reg ap1_ram_sel ap1_ram_sel ap1_address[23:1] ap1_address[23:1] HEXRADIX ap1_rden ap1_rden ap1_wren ap1_wren ap1_bena[1:0] ap1_bena[1:0] HEXRADIX ap1_rddata[15:0] ap1_rddata[15:0] HEXRADIX ap1_wrdata[15:0] ap1_wrdata[15:0] HEXRADIX ap1_bst_siz[2:0] ap1_bst_siz[2:0] HEXRADIX ap1_wr_bst_act ap1_wr_bst_act pause_zpu pause_zpu pause_next[31:0] pause_next[31:0] HEXRADIX pause_reg[31:0] pause_reg[31:0] HEXRADIX addr[4:0] addr[4:0] HEXRADIX cpu_data_in[31:0] cpu_data_in[31:0] HEXRADIX wr_en wr_en sd_dat0 sd_dat0 sd_clk sd_clk sd_cmd sd_cmd sd_dat3 sd_dat3 .opcode dbg_o.opcode HEXRADIX .pc dbg_o.pc HEXRADIX .sp dbg_o.sp HEXRADIX .stk_a dbg_o.stk_a HEXRADIX .stk_b dbg_o.stk_b HEXRADIX