clk_a clk_a reset_n reset_n video_hs video_hs video_vs video_vs video_colour[7:0] video_colour[7:0] HEXRADIX bus_addr[15:0] bus_addr[15:0] HEXRADIX label addr[15:0] addr[15:0] addr[15:0](cpu) HEXRADIX label do[7:0] do[7:0] do[7:0](cpu) HEXRADIX bus_data[7:0] bus_data[7:0] HEXRADIX label rdata[7:0] rdata[7:0] HEXRADIX rdata[7:0](basic) label rdata[7:0] rdata[7:0] HEXRADIX rdata[7:0](os) q[7:0] q[7:0] HEXRADIX q_ram[7:0] q_ram[7:0] HEXRADIX mmu label addr[15:11] addr[15:11] HEXRADIX ref_n ref_n rd4 rd4 rd5 rd5 mpd_n mpd_n ren ren be_n be_n map_n map_n s4_n s4_n s5_n s5_n basic basic io io os os ci ci s4 s4 s5 s5 osen osen basic_int basic_int os_int os_int io_int io_int system system r_w_n r_w_n cs_basic cs_basic cs_io cs_io cs_os cs_os cs_gtia cs_gtia cs_d1 cs_d1 cs_pokey cs_pokey cs_pia cs_pia label data_out[7:0] data_out[7:0] HEXRADIX data_out[7:0] (pia) portb_input_reg[7:0] portb_input_reg[7:0] HEXRADIX portb_direction_reg[7:0] portb_direction_reg[7:0] HEXRADIX portb_control_reg[5:0] portb_control_reg[5:0] HEXRADIX portb_dir_out[7:0] portb_dir_out[7:0] HEXRADIX portb_out[7:0] portb_out[7:0] HEXRADIX portb_in[7:0] portb_in[7:0] HEXRADIX portb_out[7:0] portb_out[7:0] HEXRADIX cs_antic cs_antic cs_d5 cs_d5 cs_d6 cs_d6 cs_d7 cs_d7 ci ci pbi_extsel_n pbi_extsel_n refresh_out refresh_out antic label antic_ready antic_ready refresh_out refresh_out dma_fetch_out dma_fetch_out refresh_fetch_reg refresh_fetch_reg refresh_pending_reg refresh_pending_reg hcount_reg[7:0] hcount_reg[7:0] HEXRADIX vcount_reg[8:0] vcount_reg[8:0] HEXRADIX shift_cpu_run_reg[31:0] shift_cpu_run_reg[31:0] HEXRADIX run_cpu run_cpu memory_ready memory_ready throttle throttle rdy rdy cpudebug label debugopcode[7:0] debugopcode[7:0] HEXRADIX debugjam debugjam debugpc[15:0] debugpc[15:0] HEXRADIX pc[15:0] pc[15:0] HEXRADIX debuga[7:0] debuga[7:0] HEXRADIX debugx[7:0] debugx[7:0] HEXRADIX debugy[7:0] debugy[7:0] HEXRADIX debugs[7:0] debugs[7:0] HEXRADIX debug_flags[7:0] debug_flags[7:0] HEXRADIX t[7:0] t[7:0] HEXRADIX nextaddr nextaddr portb_out_int[7:0] portb_out_int[7:0] HEXRADIX portb_output_reg[7:0] portb_output_reg[7:0] HEXRADIX portb_direction_reg[7:0] portb_direction_reg[7:0] HEXRADIX