clk_a clk_a di[7:0] di[7:0] HEXRADIX a[15:0] a[15:0] HEXRADIX reset reset cpu_enable cpu_enable oldcpu_enable oldcpu_enable cpu_enable_out cpu_enable_out antic_enable_179 antic_enable_179 enable_179 enable_179 throttle_count_6502[5:0] throttle_count_6502[5:0] throttle_count_reg[5:0] throttle_count_reg[5:0] pause_6502 pause_6502 reset_n reset_n data[7:0] data[7:0] HEXRADIX address[18:0] address[18:0] HEXRADIX q[7:0] q[7:0] HEXRADIX we we ram_request_complete ram_request_complete ram_request ram_request we_next we_next we_reg we_reg ram_wr_enable ram_wr_enable