<?xml version="1.0" encoding="UTF-8"?>
<deploy
 date="2024.09.20.22:31:56"
 outputDirectory="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/">
 <perimeter>
  <parameter
     name="AUTO_GENERATION_ID"
     type="Integer"
     defaultValue="0"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_UNIQUE_ID"
     type="String"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE_FAMILY"
     type="String"
     defaultValue="Cyclone V"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE"
     type="String"
     defaultValue="5CEFA5F23C8"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE_SPEEDGRADE"
     type="String"
     defaultValue="8"
     onHdl="0"
     affectsHdl="1" />
  <interface name="asmi_access_granted" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <port
       name="asmi_access_granted"
       direction="input"
       role="asmi_access_granted"
       width="1" />
  </interface>
  <interface name="asmi_access_request" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <port
       name="asmi_access_request"
       direction="output"
       role="asmi_access_request"
       width="1" />
  </interface>
  <interface name="data_in" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <port name="data_in" direction="input" role="data_in" width="4" />
  </interface>
  <interface name="data_oe" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <port name="data_oe" direction="input" role="data_oe" width="4" />
  </interface>
  <interface name="data_out" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <port name="data_out" direction="output" role="data_out" width="4" />
  </interface>
  <interface name="dclk_in" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <port name="dclk_in" direction="input" role="dclkin" width="1" />
  </interface>
  <interface name="ncso_in" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <port name="ncso_in" direction="input" role="scein" width="1" />
  </interface>
  <interface name="noe_in" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <port name="noe_in" direction="input" role="noe" width="1" />
  </interface>
 </perimeter>
 <entity
   path=""
   parameterizationKey="sfl:1.0:AUTO_DEVICE=5CEFA5F23C8,AUTO_DEVICE_FAMILY=Cyclone V,AUTO_DEVICE_SPEEDGRADE=8,AUTO_GENERATION_ID=1726864315,AUTO_UNIQUE_ID=(altera_serial_flash_loader:23.1:ENABLE_QUAD_SPI_SUPPORT=true,ENABLE_SHARED_ACCESS=ON,ENHANCED_MODE=true,INTENDED_DEVICE_FAMILY=Cyclone V,NCSO_WIDTH=1,gui_shared_access=true(altera_serial_flash_loader:23.1:CLOCK_TYPE=0,DEVICE_FAMILY=Cyclone V,ENA_REGISTER_MODE=1,GUI_USE_ENA=true,NUMBER_OF_CLOCKS=1,USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION=false(altclkctrl:23.1:CLOCK_TYPE=0,DEVICE_FAMILY=Cyclone V,ENA_REGISTER_MODE=1,GUI_USE_ENA=true,NUMBER_OF_CLOCKS=1,USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION=false)))"
   instancePathKey="sfl"
   kind="sfl"
   version="1.0"
   name="sfl">
  <parameter name="AUTO_GENERATION_ID" value="1726864315" />
  <parameter name="AUTO_DEVICE" value="5CEFA5F23C8" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="AUTO_UNIQUE_ID" value="" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="8" />
  <generatedFiles>
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/synthesis/sfl.vhd"
       type="VHDL" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/synthesis/submodules/altera_serial_flash_loader.v"
       type="VERILOG"
       attributes="" />
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/synthesis/submodules/altclkctrl_inst.vhd"
       type="VHDL" />
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/synthesis/submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst.v"
       type="VERILOG"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl.qsys" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="/home/markw/intelFPGA_lite/23.1std/ip/altera/altera_serial_flash_loader/altera_serial_flash_loader_hw.tcl" />
   <file
       path="/home/markw/intelFPGA_lite/23.1std/ip/altera/megafunctions/altclkctrl/altclkctrl_hw.tcl" />
  </childSourceFiles>
  <messages>
   <message level="Debug" culprit="sfl">queue size: 0 starting:sfl "sfl"</message>
   <message level="Progress" culprit="min"></message>
   <message level="Progress" culprit="max"></message>
   <message level="Progress" culprit="current"></message>
   <message level="Debug">Transform: CustomInstructionTransform</message>
   <message level="Debug">No custom instruction connections, skipping transform </message>
   <message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>1</b> modules, <b>0</b> connections]]></message>
   <message level="Debug">Transform: MMTransform</message>
   <message level="Debug">Transform: InterruptMapperTransform</message>
   <message level="Debug">Transform: InterruptSyncTransform</message>
   <message level="Debug">Transform: InterruptFanoutTransform</message>
   <message level="Debug">Transform: AvalonStreamingTransform</message>
   <message level="Debug">Transform: ResetAdaptation</message>
   <message level="Debug" culprit="sfl"><![CDATA["<b>sfl</b>" reuses <b>altera_serial_flash_loader</b> "<b>submodules/altera_serial_flash_loader</b>"]]></message>
   <message level="Debug" culprit="sfl">queue size: 0 starting:altera_serial_flash_loader "submodules/altera_serial_flash_loader"</message>
   <message level="Info" culprit="serial_flash_loader_0">generating top-level entity altera_serial_flash_loader</message>
   <message level="Info" culprit="altclkctrl_inst">"Generating: altclkctrl_inst"</message>
   <message level="Debug" culprit="serial_flash_loader_0"><![CDATA["<b>serial_flash_loader_0</b>" reuses <b>altera_serial_flash_loader</b> "<b>submodules/altclkctrl_inst</b>"]]></message>
   <message level="Info" culprit="serial_flash_loader_0"><![CDATA["<b>sfl</b>" instantiated <b>altera_serial_flash_loader</b> "<b>serial_flash_loader_0</b>"]]></message>
   <message level="Debug" culprit="sfl">queue size: 0 starting:altera_serial_flash_loader "submodules/altclkctrl_inst"</message>
   <message level="Debug" culprit="altclkctrl_inst"><![CDATA["<b>altclkctrl_inst</b>" reuses <b>altclkctrl</b> "<b>submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst</b>"]]></message>
   <message level="Info" culprit="altclkctrl_inst"><![CDATA["<b>serial_flash_loader_0</b>" instantiated <b>altera_serial_flash_loader</b> "<b>altclkctrl_inst</b>"]]></message>
   <message level="Debug" culprit="sfl">queue size: 0 starting:altclkctrl "submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst"</message>
   <message level="Info" culprit="altclkctrl_inst">Generating top-level entity sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst.</message>
   <message level="Debug" culprit="altclkctrl_inst">Current quartus bindir: /home/markw/intelFPGA_lite/23.1std/quartus/linux64/.</message>
   <message level="Info" culprit="altclkctrl_inst"><![CDATA["<b>altclkctrl_inst</b>" instantiated <b>altclkctrl</b> "<b>altclkctrl_inst</b>"]]></message>
  </messages>
 </entity>
 <entity
   path="submodules/"
   parameterizationKey="altera_serial_flash_loader:23.1:ENABLE_QUAD_SPI_SUPPORT=true,ENABLE_SHARED_ACCESS=ON,ENHANCED_MODE=true,INTENDED_DEVICE_FAMILY=Cyclone V,NCSO_WIDTH=1,gui_shared_access=true(altera_serial_flash_loader:23.1:CLOCK_TYPE=0,DEVICE_FAMILY=Cyclone V,ENA_REGISTER_MODE=1,GUI_USE_ENA=true,NUMBER_OF_CLOCKS=1,USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION=false(altclkctrl:23.1:CLOCK_TYPE=0,DEVICE_FAMILY=Cyclone V,ENA_REGISTER_MODE=1,GUI_USE_ENA=true,NUMBER_OF_CLOCKS=1,USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION=false))"
   instancePathKey="sfl:.:serial_flash_loader_0"
   kind="altera_serial_flash_loader"
   version="23.1"
   name="altera_serial_flash_loader">
  <parameter name="ENABLE_SHARED_ACCESS" value="ON" />
  <parameter name="ENABLE_QUAD_SPI_SUPPORT" value="true" />
  <parameter name="ENHANCED_MODE" value="true" />
  <parameter name="gui_shared_access" value="true" />
  <parameter name="NCSO_WIDTH" value="1" />
  <parameter name="INTENDED_DEVICE_FAMILY" value="Cyclone V" />
  <generatedFiles>
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/synthesis/submodules/altera_serial_flash_loader.v"
       type="VERILOG"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/synthesis/submodules/altclkctrl_inst.vhd"
       type="VHDL" />
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/synthesis/submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst.v"
       type="VERILOG"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/home/markw/intelFPGA_lite/23.1std/ip/altera/altera_serial_flash_loader/altera_serial_flash_loader_hw.tcl" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="/home/markw/intelFPGA_lite/23.1std/ip/altera/megafunctions/altclkctrl/altclkctrl_hw.tcl" />
  </childSourceFiles>
  <instantiator instantiator="sfl" as="serial_flash_loader_0" />
  <messages>
   <message level="Debug" culprit="sfl">queue size: 0 starting:altera_serial_flash_loader "submodules/altera_serial_flash_loader"</message>
   <message level="Info" culprit="serial_flash_loader_0">generating top-level entity altera_serial_flash_loader</message>
   <message level="Info" culprit="altclkctrl_inst">"Generating: altclkctrl_inst"</message>
   <message level="Debug" culprit="serial_flash_loader_0"><![CDATA["<b>serial_flash_loader_0</b>" reuses <b>altera_serial_flash_loader</b> "<b>submodules/altclkctrl_inst</b>"]]></message>
   <message level="Info" culprit="serial_flash_loader_0"><![CDATA["<b>sfl</b>" instantiated <b>altera_serial_flash_loader</b> "<b>serial_flash_loader_0</b>"]]></message>
   <message level="Debug" culprit="sfl">queue size: 0 starting:altera_serial_flash_loader "submodules/altclkctrl_inst"</message>
   <message level="Debug" culprit="altclkctrl_inst"><![CDATA["<b>altclkctrl_inst</b>" reuses <b>altclkctrl</b> "<b>submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst</b>"]]></message>
   <message level="Info" culprit="altclkctrl_inst"><![CDATA["<b>serial_flash_loader_0</b>" instantiated <b>altera_serial_flash_loader</b> "<b>altclkctrl_inst</b>"]]></message>
   <message level="Debug" culprit="sfl">queue size: 0 starting:altclkctrl "submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst"</message>
   <message level="Info" culprit="altclkctrl_inst">Generating top-level entity sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst.</message>
   <message level="Debug" culprit="altclkctrl_inst">Current quartus bindir: /home/markw/intelFPGA_lite/23.1std/quartus/linux64/.</message>
   <message level="Info" culprit="altclkctrl_inst"><![CDATA["<b>altclkctrl_inst</b>" instantiated <b>altclkctrl</b> "<b>altclkctrl_inst</b>"]]></message>
  </messages>
 </entity>
 <entity
   path="submodules/"
   parameterizationKey="altera_serial_flash_loader:23.1:CLOCK_TYPE=0,DEVICE_FAMILY=Cyclone V,ENA_REGISTER_MODE=1,GUI_USE_ENA=true,NUMBER_OF_CLOCKS=1,USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION=false(altclkctrl:23.1:CLOCK_TYPE=0,DEVICE_FAMILY=Cyclone V,ENA_REGISTER_MODE=1,GUI_USE_ENA=true,NUMBER_OF_CLOCKS=1,USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION=false)"
   instancePathKey="sfl:.:serial_flash_loader_0:.:altclkctrl_inst"
   kind="altera_serial_flash_loader"
   version="23.1"
   name="altclkctrl_inst">
  <parameter name="NUMBER_OF_CLOCKS" value="1" />
  <parameter name="USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION" value="false" />
  <parameter name="GUI_USE_ENA" value="true" />
  <parameter name="DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="ENA_REGISTER_MODE" value="1" />
  <parameter name="CLOCK_TYPE" value="0" />
  <generatedFiles>
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/synthesis/submodules/altclkctrl_inst.vhd"
       type="VHDL" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/synthesis/submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst.v"
       type="VERILOG"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles/>
  <childSourceFiles>
   <file
       path="/home/markw/intelFPGA_lite/23.1std/ip/altera/megafunctions/altclkctrl/altclkctrl_hw.tcl" />
  </childSourceFiles>
  <instantiator instantiator="altera_serial_flash_loader" as="altclkctrl_inst" />
  <messages>
   <message level="Debug" culprit="sfl">queue size: 0 starting:altera_serial_flash_loader "submodules/altclkctrl_inst"</message>
   <message level="Debug" culprit="altclkctrl_inst"><![CDATA["<b>altclkctrl_inst</b>" reuses <b>altclkctrl</b> "<b>submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst</b>"]]></message>
   <message level="Info" culprit="altclkctrl_inst"><![CDATA["<b>serial_flash_loader_0</b>" instantiated <b>altera_serial_flash_loader</b> "<b>altclkctrl_inst</b>"]]></message>
   <message level="Debug" culprit="sfl">queue size: 0 starting:altclkctrl "submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst"</message>
   <message level="Info" culprit="altclkctrl_inst">Generating top-level entity sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst.</message>
   <message level="Debug" culprit="altclkctrl_inst">Current quartus bindir: /home/markw/intelFPGA_lite/23.1std/quartus/linux64/.</message>
   <message level="Info" culprit="altclkctrl_inst"><![CDATA["<b>altclkctrl_inst</b>" instantiated <b>altclkctrl</b> "<b>altclkctrl_inst</b>"]]></message>
  </messages>
 </entity>
 <entity
   path="submodules/"
   parameterizationKey="altclkctrl:23.1:CLOCK_TYPE=0,DEVICE_FAMILY=Cyclone V,ENA_REGISTER_MODE=1,GUI_USE_ENA=true,NUMBER_OF_CLOCKS=1,USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION=false"
   instancePathKey="sfl:.:serial_flash_loader_0:.:altclkctrl_inst:.:altclkctrl_inst"
   kind="altclkctrl"
   version="23.1"
   name="sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst">
  <parameter name="NUMBER_OF_CLOCKS" value="1" />
  <parameter name="USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION" value="false" />
  <parameter name="GUI_USE_ENA" value="true" />
  <parameter name="DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="ENA_REGISTER_MODE" value="1" />
  <parameter name="CLOCK_TYPE" value="0" />
  <generatedFiles>
   <file
       path="/home/markw/fpga/svn/repo/branches/trunkv37/atari_800xl/vampire_atari/sfl/synthesis/submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst.v"
       type="VERILOG"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles/>
  <sourceFiles>
   <file
       path="/home/markw/intelFPGA_lite/23.1std/ip/altera/megafunctions/altclkctrl/altclkctrl_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator instantiator="altclkctrl_inst" as="altclkctrl_inst" />
  <messages>
   <message level="Debug" culprit="sfl">queue size: 0 starting:altclkctrl "submodules/sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst"</message>
   <message level="Info" culprit="altclkctrl_inst">Generating top-level entity sfl_serial_flash_loader_0_altclkctrl_inst_altclkctrl_inst.</message>
   <message level="Debug" culprit="altclkctrl_inst">Current quartus bindir: /home/markw/intelFPGA_lite/23.1std/quartus/linux64/.</message>
   <message level="Info" culprit="altclkctrl_inst"><![CDATA["<b>altclkctrl_inst</b>" instantiated <b>altclkctrl</b> "<b>altclkctrl_inst</b>"]]></message>
  </messages>
 </entity>
</deploy>
