phi0 phi0 rst_n rst_n clk_slow clk_slow rdy rdy halt_n halt_n nmi_n nmi_n irq_n irq_n s0 s0 clk_out clk_out a[15:0] a[15:0] HEXRADIX w_n w_n sync sync phi1 phi1 phi2 phi2 d[7:0] d[7:0] HEXRADIX clk clk reset reset enable enable di[7:0] di[7:0] HEXRADIX irq_n irq_n nmi_n nmi_n memory_ready memory_ready throttle throttle rdy rdy do[7:0] do[7:0] HEXRADIX a[15:0] a[15:0] HEXRADIX r_w_n r_w_n cpu_fetch cpu_fetch antic_enable_179 antic_enable_179 oldcpu_enable oldcpu_enable cpu_enable_out cpu_enable_out clk clk reset_n reset_n antic_refresh antic_refresh memory_ready_cpu memory_ready_cpu memory_ready_antic memory_ready_antic pause_6502 pause_6502 throttle_count_6502[5:0] throttle_count_6502[5:0] oldcpu_pending_reg oldcpu_pending_reg cpu_extra_enable_reg cpu_extra_enable_reg speed_shift_reg[31:0] speed_shift_reg[31:0] enable_179 enable_179