# -------------------------------------------------------------------------- # # # Copyright (C) 2017 Intel Corporation. All rights reserved. # Your use of Intel Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any output files from any of the foregoing # (including device programming or simulation files), and any # associated documentation or information are expressly subject # to the terms and conditions of the Intel Program License # Subscription Agreement, the Intel Quartus Prime License Agreement, # the Intel MegaCore Function License Agreement, or other # applicable license agreement, including, without limitation, # that your use is for the sole purpose of programming logic # devices manufactured by Intel and sold by Intel or its # authorized distributors. Please refer to the applicable # agreement for further details. # # -------------------------------------------------------------------------- # # # Quartus Prime # Version 17.0.0 Build 595 04/25/2017 SJ Lite Edition # Date created = 19:35:48 June 01, 2018 # # -------------------------------------------------------------------------- # # # Notes: # # 1) The default values for assignments are stored in the file: # anticmax_assignment_defaults.qdf # If this file doesn't exist, see file: # assignment_defaults.qdf # # 2) Altera recommends that you do not modify this file. This # file is updated automatically by the Quartus Prime software # and any changes you make may be lost or overwritten. # # -------------------------------------------------------------------------- # set_global_assignment -name FAMILY "MAX 10" set_global_assignment -name DEVICE 10M02SCU169C8G set_global_assignment -name TOP_LEVEL_ENTITY anticmax set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.0.0 set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:35:48 JUNE 01, 2018" set_global_assignment -name LAST_QUARTUS_VERSION "18.0.0 Lite Edition" set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 set_global_assignment -name DEVICE_FILTER_PACKAGE UFBGA set_global_assignment -name DEVICE_FILTER_PIN_COUNT 169 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256 #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to IOX_RST #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to IOX_INT #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to IOX_SDA #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to IOX_SCL # #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PADDLE[0] #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PADDLE[1] #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PADDLE[2] #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PADDLE[3] #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PADDLE[4] #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PADDLE[5] #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PADDLE[6] #set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PADDLE[7] # #set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to AUD[1] #set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to AUD[2] #set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to AUD[3] #set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to AUD[4] set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW" set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)" set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER ON set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE "12.5 %" set_global_assignment -name ENABLE_OCT_DONE OFF set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "PASSIVE SERIAL" set_global_assignment -name USE_CONFIGURATION_DEVICE ON set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall set_global_assignment -name ENABLE_SIGNALTAP ON set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp1.stp set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to CLK_OUT set_global_assignment -name OPTIMIZATION_MODE BALANCED set_global_assignment -name VHDL_FILE slave_timing_6502.vhd set_global_assignment -name SDC_FILE anticmax.sdc set_global_assignment -name VHDL_FILE complete_address_decoder.vhdl set_global_assignment -name VHDL_FILE syncreset_enable_divider.vhd set_global_assignment -name VHDL_FILE delay_line.vhdl set_global_assignment -name VHDL_FILE latch_delay_line.vhdl set_global_assignment -name VHDL_FILE mult_infer.vhdl set_global_assignment -name VHDL_FILE phi_mult.vhdl set_global_assignment -name VHDL_FILE synchronizer.vhdl set_global_assignment -name VHDL_FILE anticmax.vhd set_global_assignment -name QIP_FILE int_osc/synthesis/int_osc.qip set_global_assignment -name QIP_FILE pll.qip set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top